WebSVN – HelenOS-historic – Diff – /kernel/trunk/arch/ia64/include/mm/page.h


/*
 * Copyright (C) 2005 - 2006 Jakub Jermar
 * Copyright (C) 2006 Jakub Vana
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the distribution.
 * - The name of the author may not be used to endorse or promote products
 *   derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */
 
 /** @addtogroup ia64mm
 * @{
 */
/** @file
 */
 
#ifndef __ia64_PAGE_H__
#define __ia64_PAGE_H__
 
#include <arch/mm/frame.h>
 
#define PAGE_SIZE   FRAME_SIZE
#define PAGE_WIDTH  FRAME_WIDTH
 
 
#ifdef KERNEL
 
/** Bit width of the TLB-locked portion of kernel address space. */
#define KERNEL_PAGE_WIDTH   28  /* 256M */
 
#define PPN_SHIFT           12
 
#define VRN_SHIFT           61
#define VRN_MASK            (7LL << VRN_SHIFT)
#define VA2VRN(va)          ((va)>>VRN_SHIFT)
 
#ifdef __ASM__
#define VRN_KERNEL          7
#else
#define VRN_KERNEL          7LL
#endif
 
#define REGION_REGISTERS        8
 
#define KA2PA(x)    ((__address) (x-(VRN_KERNEL<<VRN_SHIFT)))
#define PA2KA(x)    ((__address) (x+(VRN_KERNEL<<VRN_SHIFT)))
 
#define VHPT_WIDTH          20          /* 1M */
#define VHPT_SIZE           (1 << VHPT_WIDTH)
 
#define PTA_BASE_SHIFT          15
 
/** Memory Attributes. */
#define MA_WRITEBACK    0x0
#define MA_UNCACHEABLE  0x4
 
/** Privilege Levels. Only the most and the least privileged ones are ever used. */
#define PL_KERNEL   0x0
#define PL_USER     0x3
 
/* Access Rigths. Only certain combinations are used by the kernel. */
#define AR_READ     0x0
#define AR_EXECUTE  0x1
#define AR_WRITE    0x2
 
#ifndef __ASM__
 
#include <arch/mm/frame.h>
#include <arch/barrier.h>
#include <genarch/mm/page_ht.h>
#include <arch/mm/asid.h>
#include <arch/types.h>
#include <typedefs.h>
#include <debug.h>
 
struct vhpt_tag_info {
    unsigned long long tag : 63;
    unsigned ti : 1;
} __attribute__ ((packed));
 
union vhpt_tag {
    struct vhpt_tag_info tag_info;
    unsigned tag_word;
};
 
struct vhpt_entry_present {
    /* Word 0 */
    unsigned p : 1;
    unsigned : 1;
    unsigned ma : 3;
    unsigned a : 1;
    unsigned d : 1;
    unsigned pl : 2;
    unsigned ar : 3;
    unsigned long long ppn : 38;
    unsigned : 2;
    unsigned ed : 1;
    unsigned ig1 : 11;
   
    /* Word 1 */
    unsigned : 2;
    unsigned ps : 6;
    unsigned key : 24;
    unsigned : 32;
   
    /* Word 2 */
    union vhpt_tag tag;
   
    /* Word 3 */                                                   
    __u64 ig3 : 64;
} __attribute__ ((packed));
 
struct vhpt_entry_not_present {
    /* Word 0 */
    unsigned p : 1;
    unsigned long long ig0 : 52;
    unsigned ig1 : 11;
   
    /* Word 1 */
    unsigned : 2;
    unsigned ps : 6;
    unsigned long long ig2 : 56;
 
    /* Word 2 */
    union vhpt_tag tag;
   
    /* Word 3 */                                                   
    __u64 ig3 : 64;
} __attribute__ ((packed));
 
typedef union vhpt_entry {
    struct vhpt_entry_present present;
    struct vhpt_entry_not_present not_present;
    __u64 word[4];
} vhpt_entry_t;
 
struct region_register_map {
    unsigned ve : 1;
    unsigned : 1;
    unsigned ps : 6;
    unsigned rid : 24;
    unsigned : 32;
} __attribute__ ((packed));
 
typedef union region_register {
    struct region_register_map map;
    unsigned long long word;
} region_register;
 
struct pta_register_map {
    unsigned ve : 1;
    unsigned : 1;
    unsigned size : 6;
    unsigned vf : 1;
    unsigned : 6;
    unsigned long long base : 49;
} __attribute__ ((packed));
 
typedef union pta_register {
    struct pta_register_map map;
    __u64 word;
} pta_register;
 
/** Return Translation Hashed Entry Address.
 *
 * VRN bits are used to read RID (ASID) from one
 * of the eight region registers registers.
 *
 * @param va Virtual address including VRN bits.
 *
 * @return Address of the head of VHPT collision chain.
 */
static inline __u64 thash(__u64 va)
{
    __u64 ret;
 
    __asm__ volatile ("thash %0 = %1\n" : "=r" (ret) : "r" (va));
 
    return ret;
}
 
/** Return Translation Hashed Entry Tag.
 *
 * VRN bits are used to read RID (ASID) from one
 * of the eight region registers.
 *
 * @param va Virtual address including VRN bits.
 *
 * @return The unique tag for VPN and RID in the collision chain returned by thash().
 */
static inline __u64 ttag(__u64 va)
{
    __u64 ret;
 
    __asm__ volatile ("ttag %0 = %1\n" : "=r" (ret) : "r" (va));
 
    return ret;
}
 
/** Read Region Register.
 *
 * @param i Region register index.
 *
 * @return Current contents of rr[i].
 */
static inline __u64 rr_read(index_t i)
{
    __u64 ret;
    ASSERT(i < REGION_REGISTERS);
    __asm__ volatile ("mov %0 = rr[%1]\n" : "=r" (ret) : "r" (i << VRN_SHIFT));
    return ret;
}
 
/** Write Region Register.
 *
 * @param i Region register index.
 * @param v Value to be written to rr[i].
 */
static inline void rr_write(index_t i, __u64 v)
{
    ASSERT(i < REGION_REGISTERS);
    __asm__ volatile (
        "mov rr[%0] = %1\n"
        :
        : "r" (i << VRN_SHIFT), "r" (v)
    );
}
 
/** Read Page Table Register.
 *
 * @return Current value stored in PTA.
 */
static inline __u64 pta_read(void)
{
    __u64 ret;
   
    __asm__ volatile ("mov %0 = cr.pta\n" : "=r" (ret));
   
    return ret;
}
 
/** Write Page Table Register.
 *
 * @param v New value to be stored in PTA.
 */
static inline void pta_write(__u64 v)
{
    __asm__ volatile ("mov cr.pta = %0\n" : : "r" (v));
}
 
extern void page_arch_init(void);
 
extern vhpt_entry_t *vhpt_hash(__address page, asid_t asid);
extern bool vhpt_compare(__address page, asid_t asid, vhpt_entry_t *v);
extern void vhpt_set_record(vhpt_entry_t *v, __address page, asid_t asid, __address frame, int flags);
 
#endif /* __ASM__ */
 
#endif /* KERNEL */
 
#endif
 
 /** @}
 */
 
 

Rev 1210	Rev 1702
1	/*	1	/*
2	* Copyright (C) 2005 - 2006 Jakub Jermar	2	* Copyright (C) 2005 - 2006 Jakub Jermar
3	* Copyright (C) 2006 Jakub Vana	3	* Copyright (C) 2006 Jakub Vana
4	* All rights reserved.	4	* All rights reserved.
5	*	5	*
6	* Redistribution and use in source and binary forms, with or without	6	* Redistribution and use in source and binary forms, with or without
7	* modification, are permitted provided that the following conditions	7	* modification, are permitted provided that the following conditions
8	* are met:	8	* are met:
9	*	9	*
10	* - Redistributions of source code must retain the above copyright	10	* - Redistributions of source code must retain the above copyright
11	* notice, this list of conditions and the following disclaimer.	11	* notice, this list of conditions and the following disclaimer.
12	* - Redistributions in binary form must reproduce the above copyright	12	* - Redistributions in binary form must reproduce the above copyright
13	* notice, this list of conditions and the following disclaimer in the	13	* notice, this list of conditions and the following disclaimer in the
14	* documentation and/or other materials provided with the distribution.	14	* documentation and/or other materials provided with the distribution.
15	* - The name of the author may not be used to endorse or promote products	15	* - The name of the author may not be used to endorse or promote products
16	* derived from this software without specific prior written permission.	16	* derived from this software without specific prior written permission.
17	*	17	*
18	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR	18	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
19	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES	19	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
20	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.	20	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
21	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,	21	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
22	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT	22	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
23	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,	23	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY	24	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT	25	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF	26	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
27	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.	27	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28	*/	28	*/
29		29
-		30	/** @addtogroup ia64mm
-		31	* @{
-		32	*/
-		33	/** @file
-		34	*/
-		35
30	#ifndef __ia64_PAGE_H__	36	#ifndef __ia64_PAGE_H__
31	#define __ia64_PAGE_H__	37	#define __ia64_PAGE_H__
32		38
33	#include <arch/mm/frame.h>	39	#include <arch/mm/frame.h>
34		40
35	#define PAGE_SIZE FRAME_SIZE	41	#define PAGE_SIZE FRAME_SIZE
36	#define PAGE_WIDTH FRAME_WIDTH	42	#define PAGE_WIDTH FRAME_WIDTH
37		43
38		44
39	#ifdef KERNEL	45	#ifdef KERNEL
40		46
41	/** Bit width of the TLB-locked portion of kernel address space. */	47	/** Bit width of the TLB-locked portion of kernel address space. */
42	#define KERNEL_PAGE_WIDTH 28 /* 256M */	48	#define KERNEL_PAGE_WIDTH 28 /* 256M */
43		49
44	#define PPN_SHIFT 12	50	#define PPN_SHIFT 12
45		51
46	#define VRN_SHIFT 61	52	#define VRN_SHIFT 61
47	#define VRN_MASK (7LL << VRN_SHIFT)	53	#define VRN_MASK (7LL << VRN_SHIFT)
48	#define VA2VRN(va) ((va)>>VRN_SHIFT)	54	#define VA2VRN(va) ((va)>>VRN_SHIFT)
49		55
50	#ifdef __ASM__	56	#ifdef __ASM__
51	#define VRN_KERNEL 7	57	#define VRN_KERNEL 7
52	#else	58	#else
53	#define VRN_KERNEL 7LL	59	#define VRN_KERNEL 7LL
54	#endif	60	#endif
55		61
56	#define REGION_REGISTERS 8	62	#define REGION_REGISTERS 8
57		63
58	#define KA2PA(x) ((__address) (x-(VRN_KERNEL<<VRN_SHIFT)))	64	#define KA2PA(x) ((__address) (x-(VRN_KERNEL<<VRN_SHIFT)))
59	#define PA2KA(x) ((__address) (x+(VRN_KERNEL<<VRN_SHIFT)))	65	#define PA2KA(x) ((__address) (x+(VRN_KERNEL<<VRN_SHIFT)))
60		66
61	#define VHPT_WIDTH 20 /* 1M */	67	#define VHPT_WIDTH 20 /* 1M */
62	#define VHPT_SIZE (1 << VHPT_WIDTH)	68	#define VHPT_SIZE (1 << VHPT_WIDTH)
63		69
64	#define PTA_BASE_SHIFT 15	70	#define PTA_BASE_SHIFT 15
65		71
66	/** Memory Attributes. */	72	/** Memory Attributes. */
67	#define MA_WRITEBACK 0x0	73	#define MA_WRITEBACK 0x0
68	#define MA_UNCACHEABLE 0x4	74	#define MA_UNCACHEABLE 0x4
69		75
70	/** Privilege Levels. Only the most and the least privileged ones are ever used. */	76	/** Privilege Levels. Only the most and the least privileged ones are ever used. */
71	#define PL_KERNEL 0x0	77	#define PL_KERNEL 0x0
72	#define PL_USER 0x3	78	#define PL_USER 0x3
73		79
74	/* Access Rigths. Only certain combinations are used by the kernel. */	80	/* Access Rigths. Only certain combinations are used by the kernel. */
75	#define AR_READ 0x0	81	#define AR_READ 0x0
76	#define AR_EXECUTE 0x1	82	#define AR_EXECUTE 0x1
77	#define AR_WRITE 0x2	83	#define AR_WRITE 0x2
78		84
79	#ifndef __ASM__	85	#ifndef __ASM__
80		86
81	#include <arch/mm/frame.h>	87	#include <arch/mm/frame.h>
82	#include <arch/barrier.h>	88	#include <arch/barrier.h>
83	#include <genarch/mm/page_ht.h>	89	#include <genarch/mm/page_ht.h>
84	#include <arch/mm/asid.h>	90	#include <arch/mm/asid.h>
85	#include <arch/types.h>	91	#include <arch/types.h>
86	#include <typedefs.h>	92	#include <typedefs.h>
87	#include <debug.h>	93	#include <debug.h>
88		94
89	struct vhpt_tag_info {	95	struct vhpt_tag_info {
90	unsigned long long tag : 63;	96	unsigned long long tag : 63;
91	unsigned ti : 1;	97	unsigned ti : 1;
92	} __attribute__ ((packed));	98	} __attribute__ ((packed));
93		99
94	union vhpt_tag {	100	union vhpt_tag {
95	struct vhpt_tag_info tag_info;	101	struct vhpt_tag_info tag_info;
96	unsigned tag_word;	102	unsigned tag_word;
97	};	103	};
98		104
99	struct vhpt_entry_present {	105	struct vhpt_entry_present {
100	/* Word 0 */	106	/* Word 0 */
101	unsigned p : 1;	107	unsigned p : 1;
102	unsigned : 1;	108	unsigned : 1;
103	unsigned ma : 3;	109	unsigned ma : 3;
104	unsigned a : 1;	110	unsigned a : 1;
105	unsigned d : 1;	111	unsigned d : 1;
106	unsigned pl : 2;	112	unsigned pl : 2;
107	unsigned ar : 3;	113	unsigned ar : 3;
108	unsigned long long ppn : 38;	114	unsigned long long ppn : 38;
109	unsigned : 2;	115	unsigned : 2;
110	unsigned ed : 1;	116	unsigned ed : 1;
111	unsigned ig1 : 11;	117	unsigned ig1 : 11;
112		118
113	/* Word 1 */	119	/* Word 1 */
114	unsigned : 2;	120	unsigned : 2;
115	unsigned ps : 6;	121	unsigned ps : 6;
116	unsigned key : 24;	122	unsigned key : 24;
117	unsigned : 32;	123	unsigned : 32;
118		124
119	/* Word 2 */	125	/* Word 2 */
120	union vhpt_tag tag;	126	union vhpt_tag tag;
121		127
122	/* Word 3 */	128	/* Word 3 */
123	__u64 ig3 : 64;	129	__u64 ig3 : 64;
124	} __attribute__ ((packed));	130	} __attribute__ ((packed));
125		131
126	struct vhpt_entry_not_present {	132	struct vhpt_entry_not_present {
127	/* Word 0 */	133	/* Word 0 */
128	unsigned p : 1;	134	unsigned p : 1;
129	unsigned long long ig0 : 52;	135	unsigned long long ig0 : 52;
130	unsigned ig1 : 11;	136	unsigned ig1 : 11;
131		137
132	/* Word 1 */	138	/* Word 1 */
133	unsigned : 2;	139	unsigned : 2;
134	unsigned ps : 6;	140	unsigned ps : 6;
135	unsigned long long ig2 : 56;	141	unsigned long long ig2 : 56;
136		142
137	/* Word 2 */	143	/* Word 2 */
138	union vhpt_tag tag;	144	union vhpt_tag tag;
139		145
140	/* Word 3 */	146	/* Word 3 */
141	__u64 ig3 : 64;	147	__u64 ig3 : 64;
142	} __attribute__ ((packed));	148	} __attribute__ ((packed));
143		149
144	typedef union vhpt_entry {	150	typedef union vhpt_entry {
145	struct vhpt_entry_present present;	151	struct vhpt_entry_present present;
146	struct vhpt_entry_not_present not_present;	152	struct vhpt_entry_not_present not_present;
147	__u64 word[4];	153	__u64 word[4];
148	} vhpt_entry_t;	154	} vhpt_entry_t;
149		155
150	struct region_register_map {	156	struct region_register_map {
151	unsigned ve : 1;	157	unsigned ve : 1;
152	unsigned : 1;	158	unsigned : 1;
153	unsigned ps : 6;	159	unsigned ps : 6;
154	unsigned rid : 24;	160	unsigned rid : 24;
155	unsigned : 32;	161	unsigned : 32;
156	} __attribute__ ((packed));	162	} __attribute__ ((packed));
157		163
158	typedef union region_register {	164	typedef union region_register {
159	struct region_register_map map;	165	struct region_register_map map;
160	unsigned long long word;	166	unsigned long long word;
161	} region_register;	167	} region_register;
162		168
163	struct pta_register_map {	169	struct pta_register_map {
164	unsigned ve : 1;	170	unsigned ve : 1;
165	unsigned : 1;	171	unsigned : 1;
166	unsigned size : 6;	172	unsigned size : 6;
167	unsigned vf : 1;	173	unsigned vf : 1;
168	unsigned : 6;	174	unsigned : 6;
169	unsigned long long base : 49;	175	unsigned long long base : 49;
170	} __attribute__ ((packed));	176	} __attribute__ ((packed));
171		177
172	typedef union pta_register {	178	typedef union pta_register {
173	struct pta_register_map map;	179	struct pta_register_map map;
174	__u64 word;	180	__u64 word;
175	} pta_register;	181	} pta_register;
176		182
177	/** Return Translation Hashed Entry Address.	183	/** Return Translation Hashed Entry Address.
178	*	184	*
179	* VRN bits are used to read RID (ASID) from one	185	* VRN bits are used to read RID (ASID) from one
180	* of the eight region registers registers.	186	* of the eight region registers registers.
181	*	187	*
182	* @param va Virtual address including VRN bits.	188	* @param va Virtual address including VRN bits.
183	*	189	*
184	* @return Address of the head of VHPT collision chain.	190	* @return Address of the head of VHPT collision chain.
185	*/	191	*/
186	static inline __u64 thash(__u64 va)	192	static inline __u64 thash(__u64 va)
187	{	193	{
188	__u64 ret;	194	__u64 ret;
189		195
190	__asm__ volatile ("thash %0 = %1\n" : "=r" (ret) : "r" (va));	196	__asm__ volatile ("thash %0 = %1\n" : "=r" (ret) : "r" (va));
191		197
192	return ret;	198	return ret;
193	}	199	}
194		200
195	/** Return Translation Hashed Entry Tag.	201	/** Return Translation Hashed Entry Tag.
196	*	202	*
197	* VRN bits are used to read RID (ASID) from one	203	* VRN bits are used to read RID (ASID) from one
198	* of the eight region registers.	204	* of the eight region registers.
199	*	205	*
200	* @param va Virtual address including VRN bits.	206	* @param va Virtual address including VRN bits.
201	*	207	*
202	* @return The unique tag for VPN and RID in the collision chain returned by thash().	208	* @return The unique tag for VPN and RID in the collision chain returned by thash().
203	*/	209	*/
204	static inline __u64 ttag(__u64 va)	210	static inline __u64 ttag(__u64 va)
205	{	211	{
206	__u64 ret;	212	__u64 ret;
207		213
208	__asm__ volatile ("ttag %0 = %1\n" : "=r" (ret) : "r" (va));	214	__asm__ volatile ("ttag %0 = %1\n" : "=r" (ret) : "r" (va));
209		215
210	return ret;	216	return ret;
211	}	217	}
212		218
213	/** Read Region Register.	219	/** Read Region Register.
214	*	220	*
215	* @param i Region register index.	221	* @param i Region register index.
216	*	222	*
217	* @return Current contents of rr[i].	223	* @return Current contents of rr[i].
218	*/	224	*/
219	static inline __u64 rr_read(index_t i)	225	static inline __u64 rr_read(index_t i)
220	{	226	{
221	__u64 ret;	227	__u64 ret;
222	ASSERT(i < REGION_REGISTERS);	228	ASSERT(i < REGION_REGISTERS);
223	__asm__ volatile ("mov %0 = rr[%1]\n" : "=r" (ret) : "r" (i << VRN_SHIFT));	229	__asm__ volatile ("mov %0 = rr[%1]\n" : "=r" (ret) : "r" (i << VRN_SHIFT));
224	return ret;	230	return ret;
225	}	231	}
226		232
227	/** Write Region Register.	233	/** Write Region Register.
228	*	234	*
229	* @param i Region register index.	235	* @param i Region register index.
230	* @param v Value to be written to rr[i].	236	* @param v Value to be written to rr[i].
231	*/	237	*/
232	static inline void rr_write(index_t i, __u64 v)	238	static inline void rr_write(index_t i, __u64 v)
233	{	239	{
234	ASSERT(i < REGION_REGISTERS);	240	ASSERT(i < REGION_REGISTERS);
235	__asm__ volatile (	241	__asm__ volatile (
236	"mov rr[%0] = %1\n"	242	"mov rr[%0] = %1\n"
237	:	243	:
238	: "r" (i << VRN_SHIFT), "r" (v)	244	: "r" (i << VRN_SHIFT), "r" (v)
239	);	245	);
240	}	246	}
241		247
242	/** Read Page Table Register.	248	/** Read Page Table Register.
243	*	249	*
244	* @return Current value stored in PTA.	250	* @return Current value stored in PTA.
245	*/	251	*/
246	static inline __u64 pta_read(void)	252	static inline __u64 pta_read(void)
247	{	253	{
248	__u64 ret;	254	__u64 ret;
249		255
250	__asm__ volatile ("mov %0 = cr.pta\n" : "=r" (ret));	256	__asm__ volatile ("mov %0 = cr.pta\n" : "=r" (ret));
251		257
252	return ret;	258	return ret;
253	}	259	}
254		260
255	/** Write Page Table Register.	261	/** Write Page Table Register.
256	*	262	*
257	* @param v New value to be stored in PTA.	263	* @param v New value to be stored in PTA.
258	*/	264	*/
259	static inline void pta_write(__u64 v)	265	static inline void pta_write(__u64 v)
260	{	266	{
261	__asm__ volatile ("mov cr.pta = %0\n" : : "r" (v));	267	__asm__ volatile ("mov cr.pta = %0\n" : : "r" (v));
262	}	268	}
263		269
264	extern void page_arch_init(void);	270	extern void page_arch_init(void);
265		271
266	extern vhpt_entry_t *vhpt_hash(__address page, asid_t asid);	272	extern vhpt_entry_t *vhpt_hash(__address page, asid_t asid);
267	extern bool vhpt_compare(__address page, asid_t asid, vhpt_entry_t *v);	273	extern bool vhpt_compare(__address page, asid_t asid, vhpt_entry_t *v);
268	extern void vhpt_set_record(vhpt_entry_t *v, __address page, asid_t asid, __address frame, int flags);	274	extern void vhpt_set_record(vhpt_entry_t *v, __address page, asid_t asid, __address frame, int flags);
269		275
270	#endif /* __ASM__ */	276	#endif /* __ASM__ */
271		277
272	#endif /* KERNEL */	278	#endif /* KERNEL */
273		279
274	#endif	280	#endif
-		281
-		282	/** @}
-		283	*/
-		284
275		285

Subversion Repositories HelenOS-historic

(root)/kernel/trunk/arch/ia64/include/mm/page.h – Rev 1210 → 1702