WebSVN – HelenOS-historic – Diff – /kernel/trunk/arch/ia64/include/interrupt.h


/*
 * Copyright (C) 2005 Jakub Jermar
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the distribution.
 * - The name of the author may not be used to endorse or promote products
 *   derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */
 
#ifndef __ia64_INTERRUPT_H__
#define __ia64_INTERRUPT_H__
 
#include <typedefs.h>
#include <arch/types.h>
#include <arch/register.h>
 
#define IRQ_COUNT               257 /* 256 NOT suppotred IRQS*//* TODO */
#define IRQ_KBD                 256 /* One simulated interrupt for ski simulator keyboard*/
 
/** External Interrupt vectors. */
#define INTERRUPT_TIMER     0
#define INTERRUPT_SPURIOUS  15
 
/** General Exception codes. */
#define GE_ILLEGALOP        0
#define GE_PRIVOP       1
#define GE_PRIVREG      2
#define GE_RESREGFLD        3
#define GE_DISBLDISTRAN     4
#define GE_ILLEGALDEP       8
 
#define EOI 0       /**< The actual value doesn't matter. */
 
struct istate {
    __r128 f2;
    __r128 f3;
    __r128 f4;
    __r128 f5;
    __r128 f6;
    __r128 f7;
    __r128 f8;
    __r128 f9;
    __r128 f10;
    __r128 f11;
    __r128 f12;
    __r128 f13;
    __r128 f14;
    __r128 f15;
    __r128 f16;
    __r128 f17;
    __r128 f18;
    __r128 f19;
    __r128 f20;
    __r128 f21;
    __r128 f22;
    __r128 f23;
    __r128 f24;
    __r128 f25;
    __r128 f26;
    __r128 f27;
    __r128 f28;
    __r128 f29;
    __r128 f30;
    __r128 f31;
       
    __address ar_bsp;
    __address ar_bspstore;
    __address ar_bspstore_new;
    __u64 ar_rnat;
    __u64 ar_ifs;
    __u64 ar_pfs;
    __u64 ar_rsc;
    __address cr_ifa;
    cr_isr_t cr_isr;
    __address cr_iipa;
    psr_t cr_ipsr;
    __address cr_iip;
    __u64 pr;
    __address sp;
   
    /*
     * The following variables are defined only for break_instruction handler.
     */
    __u64 in0;
    __u64 in1;
    __u64 in2;
    __u64 in3;
    __u64 in4;
};
 
static inline void istate_set_retaddr(istate_t *istate, __address retaddr)
{
    istate->cr_iip = retaddr;
    istate->cr_ipsr.ri = 0;     /* return to instruction slot #0 */
}
 
static inline __native istate_get_pc(istate_t *istate)
{
    return istate->cr_iip;
}
#include <panic.h>
static inline int istate_from_uspace(istate_t *istate)
{
    return (istate->cr_iip)<0xe000000000000000ULL;
 
}
 
extern void *ivt;
 
extern void general_exception(__u64 vector, istate_t *istate);
extern int break_instruction(__u64 vector, istate_t *istate);
extern void universal_handler(__u64 vector, istate_t *istate);
extern void nop_handler(__u64 vector, istate_t *istate);
extern void external_interrupt(__u64 vector, istate_t *istate);
extern void virtual_interrupt(__u64 irq, void *param);
extern void disabled_fp_register(__u64 vector, istate_t *istate);
 
 
 
#endif
 

Rev 1595	Rev 1621
1	/*	1	/*
2	* Copyright (C) 2005 Jakub Jermar	2	* Copyright (C) 2005 Jakub Jermar
3	* All rights reserved.	3	* All rights reserved.
4	*	4	*
5	* Redistribution and use in source and binary forms, with or without	5	* Redistribution and use in source and binary forms, with or without
6	* modification, are permitted provided that the following conditions	6	* modification, are permitted provided that the following conditions
7	* are met:	7	* are met:
8	*	8	*
9	* - Redistributions of source code must retain the above copyright	9	* - Redistributions of source code must retain the above copyright
10	* notice, this list of conditions and the following disclaimer.	10	* notice, this list of conditions and the following disclaimer.
11	* - Redistributions in binary form must reproduce the above copyright	11	* - Redistributions in binary form must reproduce the above copyright
12	* notice, this list of conditions and the following disclaimer in the	12	* notice, this list of conditions and the following disclaimer in the
13	* documentation and/or other materials provided with the distribution.	13	* documentation and/or other materials provided with the distribution.
14	* - The name of the author may not be used to endorse or promote products	14	* - The name of the author may not be used to endorse or promote products
15	* derived from this software without specific prior written permission.	15	* derived from this software without specific prior written permission.
16	*	16	*
17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR	17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES	18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.	19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,	20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT	21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,	22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY	23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT	24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF	25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.	26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27	*/	27	*/
28		28
29	#ifndef __ia64_INTERRUPT_H__	29	#ifndef __ia64_INTERRUPT_H__
30	#define __ia64_INTERRUPT_H__	30	#define __ia64_INTERRUPT_H__
31		31
32	#include <typedefs.h>	32	#include <typedefs.h>
33	#include <arch/types.h>	33	#include <arch/types.h>
34	#include <arch/register.h>	34	#include <arch/register.h>
35		35
36	#define IRQ_COUNT 257 /* 256 NOT suppotred IRQS// TODO */	36	#define IRQ_COUNT 257 /* 256 NOT suppotred IRQS// TODO */
37	#define IRQ_KBD 256 /* One simulated interrupt for ski simulator keyboard*/	37	#define IRQ_KBD 256 /* One simulated interrupt for ski simulator keyboard*/
38		38
39	/** External Interrupt vectors. */	39	/** External Interrupt vectors. */
40	#define INTERRUPT_TIMER 0	40	#define INTERRUPT_TIMER 0
41	#define INTERRUPT_SPURIOUS 15	41	#define INTERRUPT_SPURIOUS 15
42		42
43	/** General Exception codes. */	43	/** General Exception codes. */
44	#define GE_ILLEGALOP 0	44	#define GE_ILLEGALOP 0
45	#define GE_PRIVOP 1	45	#define GE_PRIVOP 1
46	#define GE_PRIVREG 2	46	#define GE_PRIVREG 2
47	#define GE_RESREGFLD 3	47	#define GE_RESREGFLD 3
48	#define GE_DISBLDISTRAN 4	48	#define GE_DISBLDISTRAN 4
49	#define GE_ILLEGALDEP 8	49	#define GE_ILLEGALDEP 8
50		50
51	#define EOI 0 /*< The actual value doesn't matter. /	51	#define EOI 0 /*< The actual value doesn't matter. /
52		52
53	struct istate {	53	struct istate {
54	__r128 f2;	54	__r128 f2;
55	__r128 f3;	55	__r128 f3;
56	__r128 f4;	56	__r128 f4;
57	__r128 f5;	57	__r128 f5;
58	__r128 f6;	58	__r128 f6;
59	__r128 f7;	59	__r128 f7;
60	__r128 f8;	60	__r128 f8;
61	__r128 f9;	61	__r128 f9;
62	__r128 f10;	62	__r128 f10;
63	__r128 f11;	63	__r128 f11;
64	__r128 f12;	64	__r128 f12;
65	__r128 f13;	65	__r128 f13;
66	__r128 f14;	66	__r128 f14;
67	__r128 f15;	67	__r128 f15;
68	__r128 f16;	68	__r128 f16;
69	__r128 f17;	69	__r128 f17;
70	__r128 f18;	70	__r128 f18;
71	__r128 f19;	71	__r128 f19;
72	__r128 f20;	72	__r128 f20;
73	__r128 f21;	73	__r128 f21;
74	__r128 f22;	74	__r128 f22;
75	__r128 f23;	75	__r128 f23;
76	__r128 f24;	76	__r128 f24;
77	__r128 f25;	77	__r128 f25;
78	__r128 f26;	78	__r128 f26;
79	__r128 f27;	79	__r128 f27;
80	__r128 f28;	80	__r128 f28;
81	__r128 f29;	81	__r128 f29;
82	__r128 f30;	82	__r128 f30;
83	__r128 f31;	83	__r128 f31;
84		84
85	__address ar_bsp;	85	__address ar_bsp;
86	__address ar_bspstore;	86	__address ar_bspstore;
87	__address ar_bspstore_new;	87	__address ar_bspstore_new;
88	__u64 ar_rnat;	88	__u64 ar_rnat;
89	__u64 ar_ifs;	89	__u64 ar_ifs;
90	__u64 ar_pfs;	90	__u64 ar_pfs;
91	__u64 ar_rsc;	91	__u64 ar_rsc;
92	__address cr_ifa;	92	__address cr_ifa;
93	cr_isr_t cr_isr;	93	cr_isr_t cr_isr;
94	__address cr_iipa;	94	__address cr_iipa;
95	psr_t cr_ipsr;	95	psr_t cr_ipsr;
96	__address cr_iip;	96	__address cr_iip;
97	__u64 pr;	97	__u64 pr;
98	__address sp;	98	__address sp;
99		99
100	/*	100	/*
101	* The following variables are defined only for break_instruction handler.	101	* The following variables are defined only for break_instruction handler.
102	*/	102	*/
103	__u64 in0;	103	__u64 in0;
104	__u64 in1;	104	__u64 in1;
105	__u64 in2;	105	__u64 in2;
106	__u64 in3;	106	__u64 in3;
107	__u64 in4;	107	__u64 in4;
108	};	108	};
109		109
110	static inline void istate_set_retaddr(istate_t *istate, __address retaddr)	110	static inline void istate_set_retaddr(istate_t *istate, __address retaddr)
111	{	111	{
112	istate->cr_iip = retaddr;	112	istate->cr_iip = retaddr;
113	istate->cr_ipsr.ri = 0; /* return to instruction slot #0 */	113	istate->cr_ipsr.ri = 0; /* return to instruction slot #0 */
114	}	114	}
115		115
116	static inline __native istate_get_pc(istate_t *istate)	116	static inline __native istate_get_pc(istate_t *istate)
117	{	117	{
118	return istate->cr_iip;	118	return istate->cr_iip;
119	}	119	}
120	#include <panic.h>	120	#include <panic.h>
121	static inline int istate_from_uspace(istate_t *istate)	121	static inline int istate_from_uspace(istate_t *istate)
122	{	122	{
123	panic("TODO: istate_from_uspace not yet implemented");	123	return (istate->cr_iip)<0xe000000000000000ULL;
124	return 0;	-
125	}	124	}
126		125
127	extern void *ivt;	126	extern void *ivt;
128		127
129	extern void general_exception(__u64 vector, istate_t *istate);	128	extern void general_exception(__u64 vector, istate_t *istate);
130	extern int break_instruction(__u64 vector, istate_t *istate);	129	extern int break_instruction(__u64 vector, istate_t *istate);
131	extern void universal_handler(__u64 vector, istate_t *istate);	130	extern void universal_handler(__u64 vector, istate_t *istate);
132	extern void nop_handler(__u64 vector, istate_t *istate);	131	extern void nop_handler(__u64 vector, istate_t *istate);
133	extern void external_interrupt(__u64 vector, istate_t *istate);	132	extern void external_interrupt(__u64 vector, istate_t *istate);
134	extern void virtual_interrupt(__u64 irq, void *param);	133	extern void virtual_interrupt(__u64 irq, void *param);
135	extern void disabled_fp_register(__u64 vector, istate_t *istate);	134	extern void disabled_fp_register(__u64 vector, istate_t *istate);
136		135
137		136
138		137
139	#endif	138	#endif
140		139

Subversion Repositories HelenOS-historic

(root)/kernel/trunk/arch/ia64/include/interrupt.h – Rev 1595 → 1621