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| 1 | /* |
1 | /* |
| 2 | * Copyright (C) 2005 Jakub Jermar |
2 | * Copyright (C) 2005 Jakub Jermar |
| 3 | * All rights reserved. |
3 | * All rights reserved. |
| 4 | * |
4 | * |
| 5 | * Redistribution and use in source and binary forms, with or without |
5 | * Redistribution and use in source and binary forms, with or without |
| 6 | * modification, are permitted provided that the following conditions |
6 | * modification, are permitted provided that the following conditions |
| 7 | * are met: |
7 | * are met: |
| 8 | * |
8 | * |
| 9 | * - Redistributions of source code must retain the above copyright |
9 | * - Redistributions of source code must retain the above copyright |
| 10 | * notice, this list of conditions and the following disclaimer. |
10 | * notice, this list of conditions and the following disclaimer. |
| 11 | * - Redistributions in binary form must reproduce the above copyright |
11 | * - Redistributions in binary form must reproduce the above copyright |
| 12 | * notice, this list of conditions and the following disclaimer in the |
12 | * notice, this list of conditions and the following disclaimer in the |
| 13 | * documentation and/or other materials provided with the distribution. |
13 | * documentation and/or other materials provided with the distribution. |
| 14 | * - The name of the author may not be used to endorse or promote products |
14 | * - The name of the author may not be used to endorse or promote products |
| 15 | * derived from this software without specific prior written permission. |
15 | * derived from this software without specific prior written permission. |
| 16 | * |
16 | * |
| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
| 19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
| 20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
| 23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| 27 | */ |
27 | */ |
| 28 | 28 | ||
| - | 29 | /** @addtogroup ia64cpu |
|
| - | 30 | * @{ |
|
| - | 31 | */ |
|
| - | 32 | /** @file |
|
| - | 33 | */ |
|
| - | 34 | ||
| 29 | #ifndef __ia64_CPU_H__ |
35 | #ifndef __ia64_CPU_H__ |
| 30 | #define __ia64_CPU_H__ |
36 | #define __ia64_CPU_H__ |
| 31 | 37 | ||
| 32 | #include <arch/types.h> |
38 | #include <arch/types.h> |
| 33 | #include <typedefs.h> |
39 | #include <typedefs.h> |
| 34 | #include <arch/register.h> |
40 | #include <arch/register.h> |
| 35 | 41 | ||
| 36 | #define FAMILY_ITANIUM 0x7 |
42 | #define FAMILY_ITANIUM 0x7 |
| 37 | #define FAMILY_ITANIUM2 0x1f |
43 | #define FAMILY_ITANIUM2 0x1f |
| 38 | 44 | ||
| 39 | struct cpu_arch { |
45 | struct cpu_arch { |
| 40 | __u64 cpuid0; |
46 | __u64 cpuid0; |
| 41 | __u64 cpuid1; |
47 | __u64 cpuid1; |
| 42 | cpuid3_t cpuid3; |
48 | cpuid3_t cpuid3; |
| 43 | }; |
49 | }; |
| 44 | 50 | ||
| 45 | /** Read CPUID register. |
51 | /** Read CPUID register. |
| 46 | * |
52 | * |
| 47 | * @param n CPUID register number. |
53 | * @param n CPUID register number. |
| 48 | * |
54 | * |
| 49 | * @return Value of CPUID[n] register. |
55 | * @return Value of CPUID[n] register. |
| 50 | */ |
56 | */ |
| 51 | static inline __u64 cpuid_read(int n) |
57 | static inline __u64 cpuid_read(int n) |
| 52 | { |
58 | { |
| 53 | __u64 v; |
59 | __u64 v; |
| 54 | 60 | ||
| 55 | __asm__ volatile ("mov %0 = cpuid[%1]\n" : "=r" (v) : "r" (n)); |
61 | __asm__ volatile ("mov %0 = cpuid[%1]\n" : "=r" (v) : "r" (n)); |
| 56 | 62 | ||
| 57 | return v; |
63 | return v; |
| 58 | } |
64 | } |
| 59 | 65 | ||
| 60 | #endif |
66 | #endif |
| - | 67 | ||
| - | 68 | /** @} |
|
| - | 69 | */ |
|
| - | 70 | ||
| 61 | 71 | ||