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/*
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/*
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 * Copyright (C) 2005 Jakub Jermar
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 * Copyright (C) 2005 Jakub Jermar
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 * All rights reserved.
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 * All rights reserved.
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 *
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 *
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 * Redistribution and use in source and binary forms, with or without
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 * Redistribution and use in source and binary forms, with or without
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 * modification, are permitted provided that the following conditions
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 * modification, are permitted provided that the following conditions
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 * are met:
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 * are met:
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 *
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 *
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 * - Redistributions of source code must retain the above copyright
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 * - Redistributions of source code must retain the above copyright
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 *   notice, this list of conditions and the following disclaimer.
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 *   notice, this list of conditions and the following disclaimer.
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 * - Redistributions in binary form must reproduce the above copyright
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 * - Redistributions in binary form must reproduce the above copyright
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 *   notice, this list of conditions and the following disclaimer in the
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 *   notice, this list of conditions and the following disclaimer in the
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 *   documentation and/or other materials provided with the distribution.
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 *   documentation and/or other materials provided with the distribution.
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 * - The name of the author may not be used to endorse or promote products
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 * - The name of the author may not be used to endorse or promote products
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 *   derived from this software without specific prior written permission.
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 *   derived from this software without specific prior written permission.
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 *
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 *
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 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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 */
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 */
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#ifndef __ia64_CONTEXT_H__
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#ifndef __ia64_CONTEXT_H__
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#define __ia64_CONTEXT_H__
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#define __ia64_CONTEXT_H__
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#include <arch/types.h>
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#include <arch/types.h>
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#include <arch/register.h>
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#include <arch/register.h>
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#include <typedefs.h>
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#include <typedefs.h>
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#include <align.h>
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#include <align.h>
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#include <arch/stack.h>
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#include <arch/stack.h>
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/*
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/*
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 * context_save() and context_restore() are both leaf procedures.
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 * context_save() and context_restore() are both leaf procedures.
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 * No need to allocate scratch area.
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 * No need to allocate scratch area.
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 *
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 *
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 * One item is put onto the stack to support get_stack_base().
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 * One item is put onto the stack to support get_stack_base().
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 */
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 */
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#define SP_DELTA    (0+ALIGN_UP(STACK_ITEM_SIZE, STACK_ALIGNMENT))
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#define SP_DELTA    (0+ALIGN_UP(STACK_ITEM_SIZE, STACK_ALIGNMENT))
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#ifdef context_set
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#ifdef context_set
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#undef context_set
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#undef context_set
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#endif
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#endif
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-
 
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/*RSE stack should begin under bottom of stack @ kernel*/
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#define context_set(c, _pc, stack, size)                                \
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#define context_set(c, _pc, stack, size)                                \
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    (c)->pc = (__address) _pc;                                  \
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    (c)->pc = (__address) _pc;                                  \
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    (c)->bsp = ((__address) stack) + ALIGN_UP(sizeof(the_t), REGISTER_STACK_ALIGNMENT);     \
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    (c)->bsp = ((__address) stack) + ALIGN_UP((size), STACK_ALIGNMENT) ;    \
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    (c)->ar_pfs &= PFM_MASK;                                    \
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    (c)->ar_pfs &= PFM_MASK;                                    \
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    (c)->sp = ((__address) stack) + ALIGN_UP((size), STACK_ALIGNMENT) - SP_DELTA;
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    (c)->sp = ((__address) stack) + ALIGN_UP((size), STACK_ALIGNMENT) - SP_DELTA;
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/*
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/*
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 * Only save registers that must be preserved across
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 * Only save registers that must be preserved across
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 * function calls.
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 * function calls.
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 */
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 */
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struct context {
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struct context {
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    /*
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    /*
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     * Application registers
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     * Application registers
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     */
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     */
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    __u64 ar_pfs;
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    __u64 ar_pfs;
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    __u64 ar_unat_caller;
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    __u64 ar_unat_caller;
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    __u64 ar_unat_callee;
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    __u64 ar_unat_callee;
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    __u64 ar_rsc;
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    __u64 ar_rsc;
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    __address bsp;      /* ar_bsp */
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    __address bsp;      /* ar_bsp */
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    __u64 ar_rnat;
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    __u64 ar_rnat;
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    __u64 ar_lc;
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    __u64 ar_lc;
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    /*
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    /*
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     * General registers
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     * General registers
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     */
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     */
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    __u64 r1;
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    __u64 r1;
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    __u64 r4;
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    __u64 r4;
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    __u64 r5;
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    __u64 r5;
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    __u64 r6;
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    __u64 r6;
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    __u64 r7;
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    __u64 r7;
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    __address sp;       /* r12 */
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    __address sp;       /* r12 */
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    __u64 r13;
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    __u64 r13;
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    /*
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    /*
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     * Branch registers
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     * Branch registers
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     */
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     */
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    __address pc;       /* b0 */
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    __address pc;       /* b0 */
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    __u64 b1;
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    __u64 b1;
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    __u64 b2;
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    __u64 b2;
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    __u64 b3;
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    __u64 b3;
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    __u64 b4;
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    __u64 b4;
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    __u64 b5;
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    __u64 b5;
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    /*
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    /*
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     * Predicate registers
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     * Predicate registers
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     */
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     */
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    __u64 pr;
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    __u64 pr;
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    __r128 f2 __attribute__ ((aligned(16)));
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    __r128 f2 __attribute__ ((aligned(16)));
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    __r128 f3;
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    __r128 f3;
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    __r128 f4;
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    __r128 f4;
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    __r128 f5;
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    __r128 f5;
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    __r128 f16;
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    __r128 f16;
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    __r128 f17;
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    __r128 f17;
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    __r128 f18;
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    __r128 f18;
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    __r128 f19;
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    __r128 f19;
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    __r128 f20;
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    __r128 f20;
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    __r128 f21;
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    __r128 f21;
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    __r128 f22;
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    __r128 f22;
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    __r128 f23;
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    __r128 f23;
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    __r128 f24;
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    __r128 f24;
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    __r128 f25;
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    __r128 f25;
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    __r128 f26;
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    __r128 f26;
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    __r128 f27;
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    __r128 f27;
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    __r128 f28;
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    __r128 f28;
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    __r128 f29;
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    __r128 f29;
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    __r128 f30;
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    __r128 f30;
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    __r128 f31;
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    __r128 f31;
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    ipl_t ipl;
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    ipl_t ipl;
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};
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};
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#endif
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#endif
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