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/*
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/*
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 * Copyright (C) 2005 Jakub Jermar
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 * Copyright (C) 2005 Jakub Jermar
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 * All rights reserved.
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 * All rights reserved.
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 *
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 *
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 * Redistribution and use in source and binary forms, with or without
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 * Redistribution and use in source and binary forms, with or without
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 * modification, are permitted provided that the following conditions
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 * modification, are permitted provided that the following conditions
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 * are met:
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 * are met:
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 *
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 *
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 * - Redistributions of source code must retain the above copyright
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 * - Redistributions of source code must retain the above copyright
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 *   notice, this list of conditions and the following disclaimer.
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 *   notice, this list of conditions and the following disclaimer.
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 * - Redistributions in binary form must reproduce the above copyright
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 * - Redistributions in binary form must reproduce the above copyright
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 *   notice, this list of conditions and the following disclaimer in the
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 *   notice, this list of conditions and the following disclaimer in the
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 *   documentation and/or other materials provided with the distribution.
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 *   documentation and/or other materials provided with the distribution.
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 * - The name of the author may not be used to endorse or promote products
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 * - The name of the author may not be used to endorse or promote products
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 *   derived from this software without specific prior written permission.
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 *   derived from this software without specific prior written permission.
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 *
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 *
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 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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 */
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 */
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 /** @addtogroup ia32  
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 /** @addtogroup ia32  
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 * @{
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 * @{
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 */
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 */
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/** @file
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/** @file
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 */
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 */
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34
 
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#include <smp/smp.h>
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#include <smp/smp.h>
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#include <arch/smp/smp.h>
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#include <arch/smp/smp.h>
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#include <arch/smp/mps.h>
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#include <arch/smp/mps.h>
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#include <arch/smp/ap.h>
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#include <arch/smp/ap.h>
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#include <arch/boot/boot.h>
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#include <arch/boot/boot.h>
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#include <genarch/acpi/acpi.h>
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#include <genarch/acpi/acpi.h>
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#include <genarch/acpi/madt.h>
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#include <genarch/acpi/madt.h>
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#include <config.h>
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#include <config.h>
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#include <synch/waitq.h>
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#include <synch/waitq.h>
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#include <synch/synch.h>
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#include <synch/synch.h>
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#include <arch/pm.h>
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#include <arch/pm.h>
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#include <func.h>
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#include <func.h>
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#include <panic.h>
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#include <panic.h>
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#include <debug.h>
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#include <debug.h>
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#include <arch/asm.h>
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#include <arch/asm.h>
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#include <mm/frame.h>
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#include <mm/frame.h>
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#include <mm/page.h>
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#include <mm/page.h>
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#include <mm/slab.h>
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#include <mm/slab.h>
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#include <mm/as.h>
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#include <mm/as.h>
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#include <print.h>
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#include <print.h>
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#include <memstr.h>
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#include <memstr.h>
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#include <arch/drivers/i8259.h>
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#include <arch/drivers/i8259.h>
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57
 
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#ifdef CONFIG_SMP
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#ifdef CONFIG_SMP
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59
 
60
static struct smp_config_operations *ops = NULL;
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static struct smp_config_operations *ops = NULL;
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61
 
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void smp_init(void)
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void smp_init(void)
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{
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{
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    __address l_apic_address, io_apic_address;
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    uintptr_t l_apic_address, io_apic_address;
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65
 
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    if (acpi_madt) {
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    if (acpi_madt) {
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        acpi_madt_parse();
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        acpi_madt_parse();
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        ops = &madt_config_operations;
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        ops = &madt_config_operations;
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    }
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    }
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    if (config.cpu_count == 1) {
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    if (config.cpu_count == 1) {
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        mps_init();
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        mps_init();
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        ops = &mps_config_operations;
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        ops = &mps_config_operations;
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    }
73
    }
74
 
74
 
75
    l_apic_address = (__address) frame_alloc(ONE_FRAME, FRAME_ATOMIC | FRAME_KA);
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    l_apic_address = (uintptr_t) frame_alloc(ONE_FRAME, FRAME_ATOMIC | FRAME_KA);
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    if (!l_apic_address)
76
    if (!l_apic_address)
77
        panic("cannot allocate address for l_apic\n");
77
        panic("cannot allocate address for l_apic\n");
78
 
78
 
79
    io_apic_address = (__address) frame_alloc(ONE_FRAME, FRAME_ATOMIC | FRAME_KA);
79
    io_apic_address = (uintptr_t) frame_alloc(ONE_FRAME, FRAME_ATOMIC | FRAME_KA);
80
    if (!io_apic_address)
80
    if (!io_apic_address)
81
        panic("cannot allocate address for io_apic\n");
81
        panic("cannot allocate address for io_apic\n");
82
 
82
 
83
    if (config.cpu_count > 1) {    
83
    if (config.cpu_count > 1) {    
84
        page_mapping_insert(AS_KERNEL, l_apic_address, (__address) l_apic,
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        page_mapping_insert(AS_KERNEL, l_apic_address, (uintptr_t) l_apic,
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                  PAGE_NOT_CACHEABLE);
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                  PAGE_NOT_CACHEABLE);
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        page_mapping_insert(AS_KERNEL, io_apic_address, (__address) io_apic,
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        page_mapping_insert(AS_KERNEL, io_apic_address, (uintptr_t) io_apic,
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                  PAGE_NOT_CACHEABLE);
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                  PAGE_NOT_CACHEABLE);
88
                 
88
                 
89
        l_apic = (__u32 *) l_apic_address;
89
        l_apic = (uint32_t *) l_apic_address;
90
        io_apic = (__u32 *) io_apic_address;
90
        io_apic = (uint32_t *) io_apic_address;
91
        }
91
        }
92
}
92
}
93
 
93
 
94
/*
94
/*
95
 * Kernel thread for bringing up application processors. It becomes clear
95
 * Kernel thread for bringing up application processors. It becomes clear
96
 * that we need an arrangement like this (AP's being initialized by a kernel
96
 * that we need an arrangement like this (AP's being initialized by a kernel
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 * thread), for a thread has its dedicated stack. (The stack used during the
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 * thread), for a thread has its dedicated stack. (The stack used during the
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 * BSP initialization (prior the very first call to scheduler()) will be used
98
 * BSP initialization (prior the very first call to scheduler()) will be used
99
 * as an initialization stack for each AP.)
99
 * as an initialization stack for each AP.)
100
 */
100
 */
101
void kmp(void *arg)
101
void kmp(void *arg)
102
{
102
{
103
    int i;
103
    int i;
104
   
104
   
105
    ASSERT(ops != NULL);
105
    ASSERT(ops != NULL);
106
 
106
 
107
    waitq_initialize(&ap_completion_wq);
107
    waitq_initialize(&ap_completion_wq);
108
 
108
 
109
    /*
109
    /*
110
     * We need to access data in frame 0.
110
     * We need to access data in frame 0.
111
     * We boldly make use of kernel address space mapping.
111
     * We boldly make use of kernel address space mapping.
112
     */
112
     */
113
 
113
 
114
    /*
114
    /*
115
     * Set the warm-reset vector to the real-mode address of 4K-aligned ap_boot()
115
     * Set the warm-reset vector to the real-mode address of 4K-aligned ap_boot()
116
     */
116
     */
117
    *((__u16 *) (PA2KA(0x467+0))) =  ((__address) ap_boot) >> 4;    /* segment */
117
    *((uint16_t *) (PA2KA(0x467+0))) =  ((uintptr_t) ap_boot) >> 4; /* segment */
118
    *((__u16 *) (PA2KA(0x467+2))) =  0;             /* offset */
118
    *((uint16_t *) (PA2KA(0x467+2))) =  0;              /* offset */
119
   
119
   
120
    /*
120
    /*
121
     * Save 0xa to address 0xf of the CMOS RAM.
121
     * Save 0xa to address 0xf of the CMOS RAM.
122
     * BIOS will not do the POST after the INIT signal.
122
     * BIOS will not do the POST after the INIT signal.
123
     */
123
     */
124
    outb(0x70,0xf);
124
    outb(0x70,0xf);
125
    outb(0x71,0xa);
125
    outb(0x71,0xa);
126
 
126
 
127
    pic_disable_irqs(0xffff);
127
    pic_disable_irqs(0xffff);
128
    apic_init();
128
    apic_init();
129
 
129
 
130
    for (i = 0; i < ops->cpu_count(); i++) {
130
    for (i = 0; i < ops->cpu_count(); i++) {
131
        struct descriptor *gdt_new;
131
        struct descriptor *gdt_new;
132
   
132
   
133
        /*
133
        /*
134
         * Skip processors marked unusable.
134
         * Skip processors marked unusable.
135
         */
135
         */
136
        if (!ops->cpu_enabled(i))
136
        if (!ops->cpu_enabled(i))
137
            continue;
137
            continue;
138
 
138
 
139
        /*
139
        /*
140
         * The bootstrap processor is already up.
140
         * The bootstrap processor is already up.
141
         */
141
         */
142
        if (ops->cpu_bootstrap(i))
142
        if (ops->cpu_bootstrap(i))
143
            continue;
143
            continue;
144
 
144
 
145
        if (ops->cpu_apic_id(i) == l_apic_id()) {
145
        if (ops->cpu_apic_id(i) == l_apic_id()) {
146
            printf("%s: bad processor entry #%d, will not send IPI to myself\n", __FUNCTION__, i);
146
            printf("%s: bad processor entry #%d, will not send IPI to myself\n", __FUNCTION__, i);
147
            continue;
147
            continue;
148
        }
148
        }
149
       
149
       
150
        /*
150
        /*
151
         * Prepare new GDT for CPU in question.
151
         * Prepare new GDT for CPU in question.
152
         */
152
         */
153
        if (!(gdt_new = (struct descriptor *) malloc(GDT_ITEMS*sizeof(struct descriptor), FRAME_ATOMIC)))
153
        if (!(gdt_new = (struct descriptor *) malloc(GDT_ITEMS*sizeof(struct descriptor), FRAME_ATOMIC)))
154
            panic("couldn't allocate memory for GDT\n");
154
            panic("couldn't allocate memory for GDT\n");
155
 
155
 
156
        memcpy(gdt_new, gdt, GDT_ITEMS * sizeof(struct descriptor));
156
        memcpy(gdt_new, gdt, GDT_ITEMS * sizeof(struct descriptor));
157
        memsetb((__address)(&gdt_new[TSS_DES]), sizeof(struct descriptor), 0);
157
        memsetb((uintptr_t)(&gdt_new[TSS_DES]), sizeof(struct descriptor), 0);
158
        protected_ap_gdtr.limit = GDT_ITEMS * sizeof(struct descriptor);
158
        protected_ap_gdtr.limit = GDT_ITEMS * sizeof(struct descriptor);
159
        protected_ap_gdtr.base = KA2PA((__address) gdt_new);
159
        protected_ap_gdtr.base = KA2PA((uintptr_t) gdt_new);
160
        gdtr.base = (__address) gdt_new;
160
        gdtr.base = (uintptr_t) gdt_new;
161
 
161
 
162
        if (l_apic_send_init_ipi(ops->cpu_apic_id(i))) {
162
        if (l_apic_send_init_ipi(ops->cpu_apic_id(i))) {
163
            /*
163
            /*
164
             * There may be just one AP being initialized at
164
             * There may be just one AP being initialized at
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             * the time. After it comes completely up, it is
165
             * the time. After it comes completely up, it is
166
             * supposed to wake us up.
166
             * supposed to wake us up.
167
             */
167
             */
168
            if (waitq_sleep_timeout(&ap_completion_wq, 1000000, SYNCH_FLAGS_NONE) == ESYNCH_TIMEOUT)
168
            if (waitq_sleep_timeout(&ap_completion_wq, 1000000, SYNCH_FLAGS_NONE) == ESYNCH_TIMEOUT)
169
                printf("%s: waiting for cpu%d (APIC ID = %d) timed out\n", __FUNCTION__, config.cpu_active > i ? config.cpu_active : i, ops->cpu_apic_id(i));
169
                printf("%s: waiting for cpu%d (APIC ID = %d) timed out\n", __FUNCTION__, config.cpu_active > i ? config.cpu_active : i, ops->cpu_apic_id(i));
170
        } else
170
        } else
171
            printf("INIT IPI for l_apic%d failed\n", ops->cpu_apic_id(i));
171
            printf("INIT IPI for l_apic%d failed\n", ops->cpu_apic_id(i));
172
    }
172
    }
173
}
173
}
174
 
174
 
175
int smp_irq_to_pin(int irq)
175
int smp_irq_to_pin(int irq)
176
{
176
{
177
    ASSERT(ops != NULL);
177
    ASSERT(ops != NULL);
178
    return ops->irq_to_pin(irq);
178
    return ops->irq_to_pin(irq);
179
}
179
}
180
 
180
 
181
#endif /* CONFIG_SMP */
181
#endif /* CONFIG_SMP */
182
 
182
 
183
 /** @}
183
 /** @}
184
 */
184
 */
185
 
185
 
186
 
186