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/*
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/*
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 * Copyright (C) 2005 Jakub Jermar
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 * Copyright (C) 2005 Jakub Jermar
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 * All rights reserved.
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 * All rights reserved.
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 *
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 *
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 * Redistribution and use in source and binary forms, with or without
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 * Redistribution and use in source and binary forms, with or without
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 * modification, are permitted provided that the following conditions
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 * modification, are permitted provided that the following conditions
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 * are met:
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 * are met:
8
 *
8
 *
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 * - Redistributions of source code must retain the above copyright
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 * - Redistributions of source code must retain the above copyright
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 *   notice, this list of conditions and the following disclaimer.
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 *   notice, this list of conditions and the following disclaimer.
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 * - Redistributions in binary form must reproduce the above copyright
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 * - Redistributions in binary form must reproduce the above copyright
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 *   notice, this list of conditions and the following disclaimer in the
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 *   notice, this list of conditions and the following disclaimer in the
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 *   documentation and/or other materials provided with the distribution.
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 *   documentation and/or other materials provided with the distribution.
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 * - The name of the author may not be used to endorse or promote products
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 * - The name of the author may not be used to endorse or promote products
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 *   derived from this software without specific prior written permission.
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 *   derived from this software without specific prior written permission.
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 *
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 *
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 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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 */
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 */
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#include <smp/smp.h>
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#include <smp/smp.h>
30
#include <arch/smp/smp.h>
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#include <arch/smp/smp.h>
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#include <arch/smp/mps.h>
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#include <arch/smp/mps.h>
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#include <arch/smp/ap.h>
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#include <arch/smp/ap.h>
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#include <arch/boot/boot.h>
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#include <arch/boot/boot.h>
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#include <genarch/acpi/acpi.h>
34
#include <genarch/acpi/acpi.h>
35
#include <genarch/acpi/madt.h>
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#include <genarch/acpi/madt.h>
36
#include <config.h>
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#include <config.h>
37
#include <synch/waitq.h>
37
#include <synch/waitq.h>
38
#include <synch/synch.h>
38
#include <synch/synch.h>
39
#include <arch/pm.h>
39
#include <arch/pm.h>
40
#include <func.h>
40
#include <func.h>
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#include <panic.h>
41
#include <panic.h>
42
#include <debug.h>
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#include <debug.h>
43
#include <arch/asm.h>
43
#include <arch/asm.h>
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#include <mm/frame.h>
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#include <mm/frame.h>
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#include <mm/page.h>
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#include <mm/page.h>
46
#include <mm/slab.h>
46
#include <mm/slab.h>
47
#include <mm/as.h>
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#include <mm/as.h>
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#include <print.h>
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#include <print.h>
49
#include <memstr.h>
49
#include <memstr.h>
50
#include <arch/i8259.h>
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#include <arch/drivers/i8259.h>
51
 
51
 
52
#ifdef CONFIG_SMP
52
#ifdef CONFIG_SMP
53
 
53
 
54
static struct smp_config_operations *ops = NULL;
54
static struct smp_config_operations *ops = NULL;
55
 
55
 
56
void smp_init(void)
56
void smp_init(void)
57
{
57
{
58
    int status;
58
    int status;
59
    __address l_apic_address, io_apic_address;
59
    __address l_apic_address, io_apic_address;
60
 
60
 
61
    if (acpi_madt) {
61
    if (acpi_madt) {
62
        acpi_madt_parse();
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        acpi_madt_parse();
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        ops = &madt_config_operations;
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        ops = &madt_config_operations;
64
    }
64
    }
65
    if (config.cpu_count == 1) {
65
    if (config.cpu_count == 1) {
66
        mps_init();
66
        mps_init();
67
        ops = &mps_config_operations;
67
        ops = &mps_config_operations;
68
    }
68
    }
69
 
69
 
70
    l_apic_address = PA2KA(PFN2ADDR(frame_alloc_rc(ONE_FRAME, FRAME_ATOMIC | FRAME_KA, &status)));
70
    l_apic_address = PA2KA(PFN2ADDR(frame_alloc_rc(ONE_FRAME, FRAME_ATOMIC | FRAME_KA, &status)));
71
    if (status != FRAME_OK)
71
    if (status != FRAME_OK)
72
        panic("cannot allocate address for l_apic\n");
72
        panic("cannot allocate address for l_apic\n");
73
 
73
 
74
    io_apic_address = PA2KA(PFN2ADDR(frame_alloc_rc(ONE_FRAME, FRAME_ATOMIC | FRAME_KA, &status)));
74
    io_apic_address = PA2KA(PFN2ADDR(frame_alloc_rc(ONE_FRAME, FRAME_ATOMIC | FRAME_KA, &status)));
75
    if (status != FRAME_OK)
75
    if (status != FRAME_OK)
76
        panic("cannot allocate address for io_apic\n");
76
        panic("cannot allocate address for io_apic\n");
77
 
77
 
78
    if (config.cpu_count > 1) {    
78
    if (config.cpu_count > 1) {    
79
        page_mapping_insert(AS_KERNEL, l_apic_address, (__address) l_apic,
79
        page_mapping_insert(AS_KERNEL, l_apic_address, (__address) l_apic,
80
                  PAGE_NOT_CACHEABLE);
80
                  PAGE_NOT_CACHEABLE);
81
        page_mapping_insert(AS_KERNEL, io_apic_address, (__address) io_apic,
81
        page_mapping_insert(AS_KERNEL, io_apic_address, (__address) io_apic,
82
                  PAGE_NOT_CACHEABLE);
82
                  PAGE_NOT_CACHEABLE);
83
                 
83
                 
84
        l_apic = (__u32 *) l_apic_address;
84
        l_apic = (__u32 *) l_apic_address;
85
        io_apic = (__u32 *) io_apic_address;
85
        io_apic = (__u32 *) io_apic_address;
86
        }
86
        }
87
 
87
 
88
        /*
88
        /*
89
         * Must be initialized outside the kmp thread, since it is waited
89
         * Must be initialized outside the kmp thread, since it is waited
90
         * on before the kmp thread is created.
90
         * on before the kmp thread is created.
91
         */
91
         */
92
        waitq_initialize(&kmp_completion_wq);
92
        waitq_initialize(&kmp_completion_wq);
93
 
93
 
94
}
94
}
95
 
95
 
96
/*
96
/*
97
 * Kernel thread for bringing up application processors. It becomes clear
97
 * Kernel thread for bringing up application processors. It becomes clear
98
 * that we need an arrangement like this (AP's being initialized by a kernel
98
 * that we need an arrangement like this (AP's being initialized by a kernel
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 * thread), for a thread has its dedicated stack. (The stack used during the
99
 * thread), for a thread has its dedicated stack. (The stack used during the
100
 * BSP initialization (prior the very first call to scheduler()) will be used
100
 * BSP initialization (prior the very first call to scheduler()) will be used
101
 * as an initialization stack for each AP.)
101
 * as an initialization stack for each AP.)
102
 */
102
 */
103
void kmp(void *arg)
103
void kmp(void *arg)
104
{
104
{
105
    int i;
105
    int i;
106
   
106
   
107
    ASSERT(ops != NULL);
107
    ASSERT(ops != NULL);
108
 
108
 
109
    waitq_initialize(&ap_completion_wq);
109
    waitq_initialize(&ap_completion_wq);
110
 
110
 
111
    /*
111
    /*
112
     * We need to access data in frame 0.
112
     * We need to access data in frame 0.
113
     * We boldly make use of kernel address space mapping.
113
     * We boldly make use of kernel address space mapping.
114
     */
114
     */
115
 
115
 
116
    /*
116
    /*
117
     * Set the warm-reset vector to the real-mode address of 4K-aligned ap_boot()
117
     * Set the warm-reset vector to the real-mode address of 4K-aligned ap_boot()
118
     */
118
     */
119
    *((__u16 *) (PA2KA(0x467+0))) =  ((__address) ap_boot) >> 4;    /* segment */
119
    *((__u16 *) (PA2KA(0x467+0))) =  ((__address) ap_boot) >> 4;    /* segment */
120
    *((__u16 *) (PA2KA(0x467+2))) =  0;             /* offset */
120
    *((__u16 *) (PA2KA(0x467+2))) =  0;             /* offset */
121
   
121
   
122
    /*
122
    /*
123
     * Save 0xa to address 0xf of the CMOS RAM.
123
     * Save 0xa to address 0xf of the CMOS RAM.
124
     * BIOS will not do the POST after the INIT signal.
124
     * BIOS will not do the POST after the INIT signal.
125
     */
125
     */
126
    outb(0x70,0xf);
126
    outb(0x70,0xf);
127
    outb(0x71,0xa);
127
    outb(0x71,0xa);
128
 
128
 
129
    pic_disable_irqs(0xffff);
129
    pic_disable_irqs(0xffff);
130
    apic_init();
130
    apic_init();
131
 
131
 
132
    for (i = 0; i < ops->cpu_count(); i++) {
132
    for (i = 0; i < ops->cpu_count(); i++) {
133
        struct descriptor *gdt_new;
133
        struct descriptor *gdt_new;
134
   
134
   
135
        /*
135
        /*
136
         * Skip processors marked unusable.
136
         * Skip processors marked unusable.
137
         */
137
         */
138
        if (!ops->cpu_enabled(i))
138
        if (!ops->cpu_enabled(i))
139
            continue;
139
            continue;
140
 
140
 
141
        /*
141
        /*
142
         * The bootstrap processor is already up.
142
         * The bootstrap processor is already up.
143
         */
143
         */
144
        if (ops->cpu_bootstrap(i))
144
        if (ops->cpu_bootstrap(i))
145
            continue;
145
            continue;
146
 
146
 
147
        if (ops->cpu_apic_id(i) == l_apic_id()) {
147
        if (ops->cpu_apic_id(i) == l_apic_id()) {
148
            printf("%s: bad processor entry #%d, will not send IPI to myself\n", __FUNCTION__, i);
148
            printf("%s: bad processor entry #%d, will not send IPI to myself\n", __FUNCTION__, i);
149
            continue;
149
            continue;
150
        }
150
        }
151
       
151
       
152
        /*
152
        /*
153
         * Prepare new GDT for CPU in question.
153
         * Prepare new GDT for CPU in question.
154
         */
154
         */
155
        if (!(gdt_new = (struct descriptor *) malloc(GDT_ITEMS*sizeof(struct descriptor), FRAME_ATOMIC)))
155
        if (!(gdt_new = (struct descriptor *) malloc(GDT_ITEMS*sizeof(struct descriptor), FRAME_ATOMIC)))
156
            panic("couldn't allocate memory for GDT\n");
156
            panic("couldn't allocate memory for GDT\n");
157
 
157
 
158
        memcpy(gdt_new, gdt, GDT_ITEMS * sizeof(struct descriptor));
158
        memcpy(gdt_new, gdt, GDT_ITEMS * sizeof(struct descriptor));
159
        memsetb((__address)(&gdt_new[TSS_DES]), sizeof(struct descriptor), 0);
159
        memsetb((__address)(&gdt_new[TSS_DES]), sizeof(struct descriptor), 0);
160
        protected_ap_gdtr.limit = GDT_ITEMS * sizeof(struct descriptor);
160
        protected_ap_gdtr.limit = GDT_ITEMS * sizeof(struct descriptor);
161
        protected_ap_gdtr.base = KA2PA((__address) gdt_new);
161
        protected_ap_gdtr.base = KA2PA((__address) gdt_new);
162
        gdtr.base = (__address) gdt_new;
162
        gdtr.base = (__address) gdt_new;
163
 
163
 
164
        if (l_apic_send_init_ipi(ops->cpu_apic_id(i))) {
164
        if (l_apic_send_init_ipi(ops->cpu_apic_id(i))) {
165
            /*
165
            /*
166
             * There may be just one AP being initialized at
166
             * There may be just one AP being initialized at
167
             * the time. After it comes completely up, it is
167
             * the time. After it comes completely up, it is
168
             * supposed to wake us up.
168
             * supposed to wake us up.
169
             */
169
             */
170
            if (waitq_sleep_timeout(&ap_completion_wq, 1000000, SYNCH_BLOCKING) == ESYNCH_TIMEOUT)
170
            if (waitq_sleep_timeout(&ap_completion_wq, 1000000, SYNCH_BLOCKING) == ESYNCH_TIMEOUT)
171
                printf("%s: waiting for cpu%d (APIC ID = %d) timed out\n", __FUNCTION__, config.cpu_active > i ? config.cpu_active : i, ops->cpu_apic_id(i));
171
                printf("%s: waiting for cpu%d (APIC ID = %d) timed out\n", __FUNCTION__, config.cpu_active > i ? config.cpu_active : i, ops->cpu_apic_id(i));
172
        } else
172
        } else
173
            printf("INIT IPI for l_apic%d failed\n", ops->cpu_apic_id(i));
173
            printf("INIT IPI for l_apic%d failed\n", ops->cpu_apic_id(i));
174
    }
174
    }
175
 
175
 
176
    /*
176
    /*
177
     * Wakeup the kinit thread so that
177
     * Wakeup the kinit thread so that
178
     * system initialization can go on.
178
     * system initialization can go on.
179
     */
179
     */
180
    waitq_wakeup(&kmp_completion_wq, WAKEUP_FIRST);
180
    waitq_wakeup(&kmp_completion_wq, WAKEUP_FIRST);
181
}
181
}
182
 
182
 
183
int smp_irq_to_pin(int irq)
183
int smp_irq_to_pin(int irq)
184
{
184
{
185
    ASSERT(ops != NULL);
185
    ASSERT(ops != NULL);
186
    return ops->irq_to_pin(irq);
186
    return ops->irq_to_pin(irq);
187
}
187
}
188
 
188
 
189
#endif /* CONFIG_SMP */
189
#endif /* CONFIG_SMP */
190
 
190