WebSVN – HelenOS-historic – Diff – /kernel/trunk/arch/ia32/src/smp/mps.c


/*
 * Copyright (C) 2001-2005 Jakub Jermar
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the distribution.
 * - The name of the author may not be used to endorse or promote products
 *   derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */
 
#ifdef CONFIG_SMP
 
#include <config.h>
#include <print.h>
#include <debug.h>
#include <arch/smp/mps.h>
#include <arch/smp/apic.h>
#include <arch/smp/smp.h>
#include <func.h>
#include <arch/types.h>
#include <typedefs.h>
#include <cpu.h>
#include <arch/asm.h>
#include <arch/bios/bios.h>
#include <mm/frame.h>
 
/*
 * MultiProcessor Specification detection code.
 */
 
#define FS_SIGNATURE    0x5f504d5f
#define CT_SIGNATURE    0x504d4350
 
int mps_fs_check(__u8 *base);
int mps_ct_check(void);
 
int configure_via_ct(void);
int configure_via_default(__u8 n);
 
int ct_processor_entry(struct __processor_entry *pr);
void ct_bus_entry(struct __bus_entry *bus);
void ct_io_apic_entry(struct __io_apic_entry *ioa);
void ct_io_intr_entry(struct __io_intr_entry *iointr);
void ct_l_intr_entry(struct __l_intr_entry *lintr);
 
void ct_extended_entries(void);
 
static struct mps_fs *fs;
static struct mps_ct *ct;
 
struct __processor_entry *processor_entries = NULL;
struct __bus_entry *bus_entries = NULL;
struct __io_apic_entry *io_apic_entries = NULL;
struct __io_intr_entry *io_intr_entries = NULL;
struct __l_intr_entry *l_intr_entries = NULL;
 
int processor_entry_cnt = 0;
int bus_entry_cnt = 0;
int io_apic_entry_cnt = 0;
int io_intr_entry_cnt = 0;
int l_intr_entry_cnt = 0;
 
waitq_t ap_completion_wq;
waitq_t kmp_completion_wq;
 
 
/*
 * Implementation of IA-32 SMP configuration interface.
 */
static count_t get_cpu_count(void);
static bool is_cpu_enabled(index_t i);
static bool is_bsp(index_t i);
static __u8 get_cpu_apic_id(index_t i);
static int mps_irq_to_pin(int irq);
 
struct smp_config_operations mps_config_operations = {
    .cpu_count = get_cpu_count,
    .cpu_enabled = is_cpu_enabled,
    .cpu_bootstrap = is_bsp,
    .cpu_apic_id = get_cpu_apic_id,
    .irq_to_pin = mps_irq_to_pin
};
 
count_t get_cpu_count(void)
{
    return processor_entry_cnt;
}
 
bool is_cpu_enabled(index_t i)
{
    ASSERT(i < processor_entry_cnt);
    return processor_entries[i].cpu_flags & 0x1;
}
 
bool is_bsp(index_t i)
{
    ASSERT(i < processor_entry_cnt);
    return processor_entries[i].cpu_flags & 0x2;
}
 
__u8 get_cpu_apic_id(index_t i)
{
    ASSERT(i < processor_entry_cnt);
    return processor_entries[i].l_apic_id;
}
 
 
/*
 * Used to check the integrity of the MP Floating Structure.
 */
int mps_fs_check(__u8 *base)
{
    int i;
    __u8 sum;
   
    for (i = 0, sum = 0; i < 16; i++)
        sum += base[i];
   
    return !sum;
}
 
/*
 * Used to check the integrity of the MP Configuration Table.
 */
int mps_ct_check(void)
{
    __u8 *base = (__u8 *) ct;
    __u8 *ext = base + ct->base_table_length;
    __u8 sum;
    int i; 
   
    /* count the checksum for the base table */
    for (i=0,sum=0; i < ct->base_table_length; i++)
        sum += base[i];
       
    if (sum)
        return 0;
       
    /* count the checksum for the extended table */
    for (i=0,sum=0; i < ct->ext_table_length; i++)
        sum += ext[i];
       
    return sum == ct->ext_table_checksum;
}
 
void mps_init(void)
{
    __u8 *addr[2] = { NULL, (__u8 *) PA2KA(0xf0000) };
    int i, j, length[2] = { 1024, 64*1024 };
   
 
    /*
     * Find MP Floating Pointer Structure
     * 1a. search first 1K of EBDA
     * 1b. if EBDA is undefined, search last 1K of base memory
     *  2. search 64K starting at 0xf0000
     */
 
    addr[0] = (__u8 *) PA2KA(ebda ? ebda : 639 * 1024);
    for (i = 0; i < 2; i++) {
        for (j = 0; j < length[i]; j += 16) {
            if (*((__u32 *) &addr[i][j]) == FS_SIGNATURE && mps_fs_check(&addr[i][j])) {
                fs = (struct mps_fs *) &addr[i][j];
                goto fs_found;
            }
        }
    }
 
    return;
   
fs_found:
    printf("%p: MPS Floating Pointer Structure\n", fs);
 
    if (fs->config_type == 0 && fs->configuration_table) {
        if (fs->mpfib2 >> 7) {
            printf("%s: PIC mode not supported\n", __FUNCTION__);
            return;
        }
 
        ct = (struct mps_ct *)PA2KA((__address)fs->configuration_table);
        config.cpu_count = configure_via_ct();
    }
    else
        config.cpu_count = configure_via_default(fs->config_type);
 
    return;
}
 
int configure_via_ct(void)
{
    __u8 *cur;
    int i, cnt;
       
    if (ct->signature != CT_SIGNATURE) {
        printf("%s: bad ct->signature\n", __FUNCTION__);
        return 1;
    }
    if (!mps_ct_check()) {
        printf("%s: bad ct checksum\n", __FUNCTION__);
        return 1;
    }
    if (ct->oem_table) {
        printf("%s: ct->oem_table not supported\n", __FUNCTION__);
        return 1;
    }
   
    l_apic = (__u32 *)(__address)ct->l_apic;
 
    cnt = 0;
    cur = &ct->base_table[0];
    for (i=0; i < ct->entry_count; i++) {
        switch (*cur) {
            /* Processor entry */
            case 0:
                processor_entries = processor_entries ? processor_entries : (struct __processor_entry *) cur;
                processor_entry_cnt++;
                cnt += ct_processor_entry((struct __processor_entry *) cur);
                cur += 20;
                break;
 
            /* Bus entry */
            case 1:
                bus_entries = bus_entries ? bus_entries : (struct __bus_entry *) cur;
                bus_entry_cnt++;
                ct_bus_entry((struct __bus_entry *) cur);
                cur += 8;
                break;
               
            /* I/O Apic */
            case 2:
                io_apic_entries = io_apic_entries ? io_apic_entries : (struct __io_apic_entry *) cur;
                io_apic_entry_cnt++;
                ct_io_apic_entry((struct __io_apic_entry *) cur);
                cur += 8;
                break;
               
            /* I/O Interrupt Assignment */
            case 3:
                io_intr_entries = io_intr_entries ? io_intr_entries : (struct __io_intr_entry *) cur;
                io_intr_entry_cnt++;
                ct_io_intr_entry((struct __io_intr_entry *) cur);
                cur += 8;
                break;
 
            /* Local Interrupt Assignment */
            case 4:
                l_intr_entries = l_intr_entries ? l_intr_entries : (struct __l_intr_entry *) cur;
                l_intr_entry_cnt++;
                ct_l_intr_entry((struct __l_intr_entry *) cur);
                cur += 8;
                break;
 
            default:
                /*
                 * Something is wrong. Fallback to UP mode.
                 */
                 
                printf("%s: ct badness\n", __FUNCTION__);
                return 1;
        }
    }
   
    /*
     * Process extended entries.
     */
    ct_extended_entries();
    return cnt;
}
 
int configure_via_default(__u8 n)
{
    /*
     * Not yet implemented.
     */
    printf("%s: not supported\n", __FUNCTION__);
    return 1;
}
 
 
int ct_processor_entry(struct __processor_entry *pr)
{
    /*
     * Ignore processors which are not marked enabled.
     */
    if ((pr->cpu_flags & (1<<0)) == 0)
        return 0;
   
    apic_id_mask |= (1<<pr->l_apic_id);
    return 1;
}
 
void ct_bus_entry(struct __bus_entry *bus)
{
#ifdef MPSCT_VERBOSE
    char buf[7];
    memcpy((void *) buf, (void *) bus->bus_type, 6);
    buf[6] = 0;
    printf("bus%d: %s\n", bus->bus_id, buf);
#endif
}
 
void ct_io_apic_entry(struct __io_apic_entry *ioa)
{
    static int io_apic_count = 0;
 
    /* this ioapic is marked unusable */
    if ((ioa->io_apic_flags & 1) == 0)
        return;
   
    if (io_apic_count++ > 0) {
        /*
         * Multiple IO APIC's are currently not supported.
         */
        return;
    }
   
    io_apic = (__u32 *)(__address)ioa->io_apic;
}
 
//#define MPSCT_VERBOSE
void ct_io_intr_entry(struct __io_intr_entry *iointr)
{
#ifdef MPSCT_VERBOSE
    switch (iointr->intr_type) {
        case 0: printf("INT"); break;
        case 1: printf("NMI"); break;
        case 2: printf("SMI"); break;
        case 3: printf("ExtINT"); break;
    }
    putchar(',');
    switch (iointr->poel&3) {
        case 0: printf("bus-like"); break;
        case 1: printf("active high"); break;
        case 2: printf("reserved"); break;
        case 3: printf("active low"); break;
    }
    putchar(',');
    switch ((iointr->poel>>2)&3) {
        case 0: printf("bus-like"); break;
        case 1: printf("edge-triggered"); break;
        case 2: printf("reserved"); break;
        case 3: printf("level-triggered"); break;
    }
    putchar(',');
    printf("bus%d,irq%d", iointr->src_bus_id, iointr->src_bus_irq);
    putchar(',');
    printf("io_apic%d,pin%d", iointr->dst_io_apic_id, iointr->dst_io_apic_pin);
    putchar('\n'); 
#endif
}
 
void ct_l_intr_entry(struct __l_intr_entry *lintr)
{
#ifdef MPSCT_VERBOSE
    switch (lintr->intr_type) {
        case 0: printf("INT"); break;
        case 1: printf("NMI"); break;
        case 2: printf("SMI"); break;
        case 3: printf("ExtINT"); break;
    }
    putchar(',');
    switch (lintr->poel&3) {
        case 0: printf("bus-like"); break;
        case 1: printf("active high"); break;
        case 2: printf("reserved"); break;
        case 3: printf("active low"); break;
    }
    putchar(',');
    switch ((lintr->poel>>2)&3) {
        case 0: printf("bus-like"); break;
        case 1: printf("edge-triggered"); break;
        case 2: printf("reserved"); break;
        case 3: printf("level-triggered"); break;
    }
    putchar(',');
    printf("bus%d,irq%d", lintr->src_bus_id, lintr->src_bus_irq);
    putchar(',');
    printf("l_apic%d,pin%d", lintr->dst_l_apic_id, lintr->dst_l_apic_pin);
    putchar('\n');
#endif
}
 
void ct_extended_entries(void)
{
    __u8 *ext = (__u8 *) ct + ct->base_table_length;
    __u8 *cur;
 
    for (cur = ext; cur < ext + ct->ext_table_length; cur += cur[CT_EXT_ENTRY_LEN]) {
        switch (cur[CT_EXT_ENTRY_TYPE]) {
            default:
                printf("%p: skipping MP Configuration Table extended entry type %d\n", cur, cur[CT_EXT_ENTRY_TYPE]);
                break;
        }
    }
}
 
int mps_irq_to_pin(int irq)
{
    int i;
   
    for(i=0;i<io_intr_entry_cnt;i++) {
        if (io_intr_entries[i].src_bus_irq == irq && io_intr_entries[i].intr_type == 0)
            return io_intr_entries[i].dst_io_apic_pin;
    }
   
    return -1;
}
 
#endif /* CONFIG_SMP */
 

Rev 615	Rev 1221
1	/*	1	/*
2	* Copyright (C) 2001-2005 Jakub Jermar	2	* Copyright (C) 2001-2005 Jakub Jermar
3	* All rights reserved.	3	* All rights reserved.
4	*	4	*
5	* Redistribution and use in source and binary forms, with or without	5	* Redistribution and use in source and binary forms, with or without
6	* modification, are permitted provided that the following conditions	6	* modification, are permitted provided that the following conditions
7	* are met:	7	* are met:
8	*	8	*
9	* - Redistributions of source code must retain the above copyright	9	* - Redistributions of source code must retain the above copyright
10	* notice, this list of conditions and the following disclaimer.	10	* notice, this list of conditions and the following disclaimer.
11	* - Redistributions in binary form must reproduce the above copyright	11	* - Redistributions in binary form must reproduce the above copyright
12	* notice, this list of conditions and the following disclaimer in the	12	* notice, this list of conditions and the following disclaimer in the
13	* documentation and/or other materials provided with the distribution.	13	* documentation and/or other materials provided with the distribution.
14	* - The name of the author may not be used to endorse or promote products	14	* - The name of the author may not be used to endorse or promote products
15	* derived from this software without specific prior written permission.	15	* derived from this software without specific prior written permission.
16	*	16	*
17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR	17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES	18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.	19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,	20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT	21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,	22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY	23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT	24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF	25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.	26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27	*/	27	*/
28		28
29	#ifdef CONFIG_SMP	29	#ifdef CONFIG_SMP
30		30
31	#include <config.h>	31	#include <config.h>
32	#include <print.h>	32	#include <print.h>
33	#include <debug.h>	33	#include <debug.h>
34	#include <arch/smp/mps.h>	34	#include <arch/smp/mps.h>
35	#include <arch/smp/apic.h>	35	#include <arch/smp/apic.h>
36	#include <arch/smp/smp.h>	36	#include <arch/smp/smp.h>
37	#include <func.h>	37	#include <func.h>
38	#include <arch/types.h>	38	#include <arch/types.h>
39	#include <typedefs.h>	39	#include <typedefs.h>
40	#include <cpu.h>	40	#include <cpu.h>
41	#include <arch/asm.h>	41	#include <arch/asm.h>
42	#include <arch/bios/bios.h>	42	#include <arch/bios/bios.h>
43	#include <mm/frame.h>	43	#include <mm/frame.h>
44		44
45	/*	45	/*
46	* MultiProcessor Specification detection code.	46	* MultiProcessor Specification detection code.
47	*/	47	*/
48		48
49	#define FS_SIGNATURE 0x5f504d5f	49	#define FS_SIGNATURE 0x5f504d5f
50	#define CT_SIGNATURE 0x504d4350	50	#define CT_SIGNATURE 0x504d4350
51		51
52	int mps_fs_check(__u8 *base);	52	int mps_fs_check(__u8 *base);
53	int mps_ct_check(void);	53	int mps_ct_check(void);
54		54
55	int configure_via_ct(void);	55	int configure_via_ct(void);
56	int configure_via_default(__u8 n);	56	int configure_via_default(__u8 n);
57		57
58	int ct_processor_entry(struct __processor_entry *pr);	58	int ct_processor_entry(struct __processor_entry *pr);
59	void ct_bus_entry(struct __bus_entry *bus);	59	void ct_bus_entry(struct __bus_entry *bus);
60	void ct_io_apic_entry(struct __io_apic_entry *ioa);	60	void ct_io_apic_entry(struct __io_apic_entry *ioa);
61	void ct_io_intr_entry(struct __io_intr_entry *iointr);	61	void ct_io_intr_entry(struct __io_intr_entry *iointr);
62	void ct_l_intr_entry(struct __l_intr_entry *lintr);	62	void ct_l_intr_entry(struct __l_intr_entry *lintr);
63		63
64	void ct_extended_entries(void);	64	void ct_extended_entries(void);
65		65
66	static struct mps_fs *fs;	66	static struct mps_fs *fs;
67	static struct mps_ct *ct;	67	static struct mps_ct *ct;
68		68
69	struct __processor_entry *processor_entries = NULL;	69	struct __processor_entry *processor_entries = NULL;
70	struct __bus_entry *bus_entries = NULL;	70	struct __bus_entry *bus_entries = NULL;
71	struct __io_apic_entry *io_apic_entries = NULL;	71	struct __io_apic_entry *io_apic_entries = NULL;
72	struct __io_intr_entry *io_intr_entries = NULL;	72	struct __io_intr_entry *io_intr_entries = NULL;
73	struct __l_intr_entry *l_intr_entries = NULL;	73	struct __l_intr_entry *l_intr_entries = NULL;
74		74
75	int processor_entry_cnt = 0;	75	int processor_entry_cnt = 0;
76	int bus_entry_cnt = 0;	76	int bus_entry_cnt = 0;
77	int io_apic_entry_cnt = 0;	77	int io_apic_entry_cnt = 0;
78	int io_intr_entry_cnt = 0;	78	int io_intr_entry_cnt = 0;
79	int l_intr_entry_cnt = 0;	79	int l_intr_entry_cnt = 0;
80		80
81	waitq_t ap_completion_wq;	81	waitq_t ap_completion_wq;
82	waitq_t kmp_completion_wq;	82	waitq_t kmp_completion_wq;
83		83
84		84
85	/*	85	/*
86	* Implementation of IA-32 SMP configuration interface.	86	* Implementation of IA-32 SMP configuration interface.
87	*/	87	*/
88	static count_t get_cpu_count(void);	88	static count_t get_cpu_count(void);
89	static bool is_cpu_enabled(index_t i);	89	static bool is_cpu_enabled(index_t i);
90	static bool is_bsp(index_t i);	90	static bool is_bsp(index_t i);
91	static __u8 get_cpu_apic_id(index_t i);	91	static __u8 get_cpu_apic_id(index_t i);
92	static int mps_irq_to_pin(int irq);	92	static int mps_irq_to_pin(int irq);
93		93
94	struct smp_config_operations mps_config_operations = {	94	struct smp_config_operations mps_config_operations = {
95	.cpu_count = get_cpu_count,	95	.cpu_count = get_cpu_count,
96	.cpu_enabled = is_cpu_enabled,	96	.cpu_enabled = is_cpu_enabled,
97	.cpu_bootstrap = is_bsp,	97	.cpu_bootstrap = is_bsp,
98	.cpu_apic_id = get_cpu_apic_id,	98	.cpu_apic_id = get_cpu_apic_id,
99	.irq_to_pin = mps_irq_to_pin	99	.irq_to_pin = mps_irq_to_pin
100	};	100	};
101		101
102	count_t get_cpu_count(void)	102	count_t get_cpu_count(void)
103	{	103	{
104	return processor_entry_cnt;	104	return processor_entry_cnt;
105	}	105	}
106		106
107	bool is_cpu_enabled(index_t i)	107	bool is_cpu_enabled(index_t i)
108	{	108	{
109	ASSERT(i < processor_entry_cnt);	109	ASSERT(i < processor_entry_cnt);
110	return processor_entries[i].cpu_flags & 0x1;	110	return processor_entries[i].cpu_flags & 0x1;
111	}	111	}
112		112
113	bool is_bsp(index_t i)	113	bool is_bsp(index_t i)
114	{	114	{
115	ASSERT(i < processor_entry_cnt);	115	ASSERT(i < processor_entry_cnt);
116	return processor_entries[i].cpu_flags & 0x2;	116	return processor_entries[i].cpu_flags & 0x2;
117	}	117	}
118		118
119	__u8 get_cpu_apic_id(index_t i)	119	__u8 get_cpu_apic_id(index_t i)
120	{	120	{
121	ASSERT(i < processor_entry_cnt);	121	ASSERT(i < processor_entry_cnt);
122	return processor_entries[i].l_apic_id;	122	return processor_entries[i].l_apic_id;
123	}	123	}
124		124
125		125
126	/*	126	/*
127	* Used to check the integrity of the MP Floating Structure.	127	* Used to check the integrity of the MP Floating Structure.
128	*/	128	*/
129	int mps_fs_check(__u8 *base)	129	int mps_fs_check(__u8 *base)
130	{	130	{
131	int i;	131	int i;
132	__u8 sum;	132	__u8 sum;
133		133
134	for (i = 0, sum = 0; i < 16; i++)	134	for (i = 0, sum = 0; i < 16; i++)
135	sum += base[i];	135	sum += base[i];
136		136
137	return !sum;	137	return !sum;
138	}	138	}
139		139
140	/*	140	/*
141	* Used to check the integrity of the MP Configuration Table.	141	* Used to check the integrity of the MP Configuration Table.
142	*/	142	*/
143	int mps_ct_check(void)	143	int mps_ct_check(void)
144	{	144	{
145	__u8 base = (__u8 ) ct;	145	__u8 base = (__u8 ) ct;
146	__u8 *ext = base + ct->base_table_length;	146	__u8 *ext = base + ct->base_table_length;
147	__u8 sum;	147	__u8 sum;
148	int i;	148	int i;
149		149
150	/* count the checksum for the base table */	150	/* count the checksum for the base table */
151	for (i=0,sum=0; i < ct->base_table_length; i++)	151	for (i=0,sum=0; i < ct->base_table_length; i++)
152	sum += base[i];	152	sum += base[i];
153		153
154	if (sum)	154	if (sum)
155	return 0;	155	return 0;
156		156
157	/* count the checksum for the extended table */	157	/* count the checksum for the extended table */
158	for (i=0,sum=0; i < ct->ext_table_length; i++)	158	for (i=0,sum=0; i < ct->ext_table_length; i++)
159	sum += ext[i];	159	sum += ext[i];
160		160
161	return sum == ct->ext_table_checksum;	161	return sum == ct->ext_table_checksum;
162	}	162	}
163		163
164	void mps_init(void)	164	void mps_init(void)
165	{	165	{
166	__u8 addr[2] = { NULL, (__u8 ) PA2KA(0xf0000) };	166	__u8 addr[2] = { NULL, (__u8 ) PA2KA(0xf0000) };
167	int i, j, length[2] = { 1024, 64*1024 };	167	int i, j, length[2] = { 1024, 64*1024 };
168		168
169		169
170	/*	170	/*
171	* Find MP Floating Pointer Structure	171	* Find MP Floating Pointer Structure
172	* 1a. search first 1K of EBDA	172	* 1a. search first 1K of EBDA
173	* 1b. if EBDA is undefined, search last 1K of base memory	173	* 1b. if EBDA is undefined, search last 1K of base memory
174	* 2. search 64K starting at 0xf0000	174	* 2. search 64K starting at 0xf0000
175	*/	175	*/
176		176
177	addr[0] = (__u8 ) PA2KA(ebda ? ebda : 639 1024);	177	addr[0] = (__u8 ) PA2KA(ebda ? ebda : 639 1024);
178	for (i = 0; i < 2; i++) {	178	for (i = 0; i < 2; i++) {
179	for (j = 0; j < length[i]; j += 16) {	179	for (j = 0; j < length[i]; j += 16) {
180	if (((__u32 ) &addr[i][j]) == FS_SIGNATURE && mps_fs_check(&addr[i][j])) {	180	if (((__u32 ) &addr[i][j]) == FS_SIGNATURE && mps_fs_check(&addr[i][j])) {
181	fs = (struct mps_fs *) &addr[i][j];	181	fs = (struct mps_fs *) &addr[i][j];
182	goto fs_found;	182	goto fs_found;
183	}	183	}
184	}	184	}
185	}	185	}
186		186
187	return;	187	return;
188		188
189	fs_found:	189	fs_found:
190	printf("%P: MPS Floating Pointer Structure\n", fs);	190	printf("%p: MPS Floating Pointer Structure\n", fs);
191		191
192	if (fs->config_type == 0 && fs->configuration_table) {	192	if (fs->config_type == 0 && fs->configuration_table) {
193	if (fs->mpfib2 >> 7) {	193	if (fs->mpfib2 >> 7) {
194	printf("%s: PIC mode not supported\n", __FUNCTION__);	194	printf("%s: PIC mode not supported\n", __FUNCTION__);
195	return;	195	return;
196	}	196	}
197		197
198	ct = (struct mps_ct *)PA2KA((__address)fs->configuration_table);	198	ct = (struct mps_ct *)PA2KA((__address)fs->configuration_table);
199	config.cpu_count = configure_via_ct();	199	config.cpu_count = configure_via_ct();
200	}	200	}
201	else	201	else
202	config.cpu_count = configure_via_default(fs->config_type);	202	config.cpu_count = configure_via_default(fs->config_type);
203		203
204	return;	204	return;
205	}	205	}
206		206
207	int configure_via_ct(void)	207	int configure_via_ct(void)
208	{	208	{
209	__u8 *cur;	209	__u8 *cur;
210	int i, cnt;	210	int i, cnt;
211		211
212	if (ct->signature != CT_SIGNATURE) {	212	if (ct->signature != CT_SIGNATURE) {
213	printf("%s: bad ct->signature\n", __FUNCTION__);	213	printf("%s: bad ct->signature\n", __FUNCTION__);
214	return 1;	214	return 1;
215	}	215	}
216	if (!mps_ct_check()) {	216	if (!mps_ct_check()) {
217	printf("%s: bad ct checksum\n", __FUNCTION__);	217	printf("%s: bad ct checksum\n", __FUNCTION__);
218	return 1;	218	return 1;
219	}	219	}
220	if (ct->oem_table) {	220	if (ct->oem_table) {
221	printf("%s: ct->oem_table not supported\n", __FUNCTION__);	221	printf("%s: ct->oem_table not supported\n", __FUNCTION__);
222	return 1;	222	return 1;
223	}	223	}
224		224
225	l_apic = (__u32 *)(__address)ct->l_apic;	225	l_apic = (__u32 *)(__address)ct->l_apic;
226		226
227	cnt = 0;	227	cnt = 0;
228	cur = &ct->base_table[0];	228	cur = &ct->base_table[0];
229	for (i=0; i < ct->entry_count; i++) {	229	for (i=0; i < ct->entry_count; i++) {
230	switch (*cur) {	230	switch (*cur) {
231	/* Processor entry */	231	/* Processor entry */
232	case 0:	232	case 0:
233	processor_entries = processor_entries ? processor_entries : (struct __processor_entry *) cur;	233	processor_entries = processor_entries ? processor_entries : (struct __processor_entry *) cur;
234	processor_entry_cnt++;	234	processor_entry_cnt++;
235	cnt += ct_processor_entry((struct __processor_entry *) cur);	235	cnt += ct_processor_entry((struct __processor_entry *) cur);
236	cur += 20;	236	cur += 20;
237	break;	237	break;
238		238
239	/* Bus entry */	239	/* Bus entry */
240	case 1:	240	case 1:
241	bus_entries = bus_entries ? bus_entries : (struct __bus_entry *) cur;	241	bus_entries = bus_entries ? bus_entries : (struct __bus_entry *) cur;
242	bus_entry_cnt++;	242	bus_entry_cnt++;
243	ct_bus_entry((struct __bus_entry *) cur);	243	ct_bus_entry((struct __bus_entry *) cur);
244	cur += 8;	244	cur += 8;
245	break;	245	break;
246		246
247	/* I/O Apic */	247	/* I/O Apic */
248	case 2:	248	case 2:
249	io_apic_entries = io_apic_entries ? io_apic_entries : (struct __io_apic_entry *) cur;	249	io_apic_entries = io_apic_entries ? io_apic_entries : (struct __io_apic_entry *) cur;
250	io_apic_entry_cnt++;	250	io_apic_entry_cnt++;
251	ct_io_apic_entry((struct __io_apic_entry *) cur);	251	ct_io_apic_entry((struct __io_apic_entry *) cur);
252	cur += 8;	252	cur += 8;
253	break;	253	break;
254		254
255	/* I/O Interrupt Assignment */	255	/* I/O Interrupt Assignment */
256	case 3:	256	case 3:
257	io_intr_entries = io_intr_entries ? io_intr_entries : (struct __io_intr_entry *) cur;	257	io_intr_entries = io_intr_entries ? io_intr_entries : (struct __io_intr_entry *) cur;
258	io_intr_entry_cnt++;	258	io_intr_entry_cnt++;
259	ct_io_intr_entry((struct __io_intr_entry *) cur);	259	ct_io_intr_entry((struct __io_intr_entry *) cur);
260	cur += 8;	260	cur += 8;
261	break;	261	break;
262		262
263	/* Local Interrupt Assignment */	263	/* Local Interrupt Assignment */
264	case 4:	264	case 4:
265	l_intr_entries = l_intr_entries ? l_intr_entries : (struct __l_intr_entry *) cur;	265	l_intr_entries = l_intr_entries ? l_intr_entries : (struct __l_intr_entry *) cur;
266	l_intr_entry_cnt++;	266	l_intr_entry_cnt++;
267	ct_l_intr_entry((struct __l_intr_entry *) cur);	267	ct_l_intr_entry((struct __l_intr_entry *) cur);
268	cur += 8;	268	cur += 8;
269	break;	269	break;
270		270
271	default:	271	default:
272	/*	272	/*
273	* Something is wrong. Fallback to UP mode.	273	* Something is wrong. Fallback to UP mode.
274	*/	274	*/
275		275
276	printf("%s: ct badness\n", __FUNCTION__);	276	printf("%s: ct badness\n", __FUNCTION__);
277	return 1;	277	return 1;
278	}	278	}
279	}	279	}
280		280
281	/*	281	/*
282	* Process extended entries.	282	* Process extended entries.
283	*/	283	*/
284	ct_extended_entries();	284	ct_extended_entries();
285	return cnt;	285	return cnt;
286	}	286	}
287		287
288	int configure_via_default(__u8 n)	288	int configure_via_default(__u8 n)
289	{	289	{
290	/*	290	/*
291	* Not yet implemented.	291	* Not yet implemented.
292	*/	292	*/
293	printf("%s: not supported\n", __FUNCTION__);	293	printf("%s: not supported\n", __FUNCTION__);
294	return 1;	294	return 1;
295	}	295	}
296		296
297		297
298	int ct_processor_entry(struct __processor_entry *pr)	298	int ct_processor_entry(struct __processor_entry *pr)
299	{	299	{
300	/*	300	/*
301	* Ignore processors which are not marked enabled.	301	* Ignore processors which are not marked enabled.
302	*/	302	*/
303	if ((pr->cpu_flags & (1<<0)) == 0)	303	if ((pr->cpu_flags & (1<<0)) == 0)
304	return 0;	304	return 0;
305		305
306	apic_id_mask \|= (1<<pr->l_apic_id);	306	apic_id_mask \|= (1<<pr->l_apic_id);
307	return 1;	307	return 1;
308	}	308	}
309		309
310	void ct_bus_entry(struct __bus_entry *bus)	310	void ct_bus_entry(struct __bus_entry *bus)
311	{	311	{
312	#ifdef MPSCT_VERBOSE	312	#ifdef MPSCT_VERBOSE
313	char buf[7];	313	char buf[7];
314	memcpy((void ) buf, (void ) bus->bus_type, 6);	314	memcpy((void ) buf, (void ) bus->bus_type, 6);
315	buf[6] = 0;	315	buf[6] = 0;
316	printf("bus%d: %s\n", bus->bus_id, buf);	316	printf("bus%d: %s\n", bus->bus_id, buf);
317	#endif	317	#endif
318	}	318	}
319		319
320	void ct_io_apic_entry(struct __io_apic_entry *ioa)	320	void ct_io_apic_entry(struct __io_apic_entry *ioa)
321	{	321	{
322	static int io_apic_count = 0;	322	static int io_apic_count = 0;
323		323
324	/* this ioapic is marked unusable */	324	/* this ioapic is marked unusable */
325	if ((ioa->io_apic_flags & 1) == 0)	325	if ((ioa->io_apic_flags & 1) == 0)
326	return;	326	return;
327		327
328	if (io_apic_count++ > 0) {	328	if (io_apic_count++ > 0) {
329	/*	329	/*
330	* Multiple IO APIC's are currently not supported.	330	* Multiple IO APIC's are currently not supported.
331	*/	331	*/
332	return;	332	return;
333	}	333	}
334		334
335	io_apic = (__u32 *)(__address)ioa->io_apic;	335	io_apic = (__u32 *)(__address)ioa->io_apic;
336	}	336	}
337		337
338	//#define MPSCT_VERBOSE	338	//#define MPSCT_VERBOSE
339	void ct_io_intr_entry(struct __io_intr_entry *iointr)	339	void ct_io_intr_entry(struct __io_intr_entry *iointr)
340	{	340	{
341	#ifdef MPSCT_VERBOSE	341	#ifdef MPSCT_VERBOSE
342	switch (iointr->intr_type) {	342	switch (iointr->intr_type) {
343	case 0: printf("INT"); break;	343	case 0: printf("INT"); break;
344	case 1: printf("NMI"); break;	344	case 1: printf("NMI"); break;
345	case 2: printf("SMI"); break;	345	case 2: printf("SMI"); break;
346	case 3: printf("ExtINT"); break;	346	case 3: printf("ExtINT"); break;
347	}	347	}
348	putchar(',');	348	putchar(',');
349	switch (iointr->poel&3) {	349	switch (iointr->poel&3) {
350	case 0: printf("bus-like"); break;	350	case 0: printf("bus-like"); break;
351	case 1: printf("active high"); break;	351	case 1: printf("active high"); break;
352	case 2: printf("reserved"); break;	352	case 2: printf("reserved"); break;
353	case 3: printf("active low"); break;	353	case 3: printf("active low"); break;
354	}	354	}
355	putchar(',');	355	putchar(',');
356	switch ((iointr->poel>>2)&3) {	356	switch ((iointr->poel>>2)&3) {
357	case 0: printf("bus-like"); break;	357	case 0: printf("bus-like"); break;
358	case 1: printf("edge-triggered"); break;	358	case 1: printf("edge-triggered"); break;
359	case 2: printf("reserved"); break;	359	case 2: printf("reserved"); break;
360	case 3: printf("level-triggered"); break;	360	case 3: printf("level-triggered"); break;
361	}	361	}
362	putchar(',');	362	putchar(',');
363	printf("bus%d,irq%d", iointr->src_bus_id, iointr->src_bus_irq);	363	printf("bus%d,irq%d", iointr->src_bus_id, iointr->src_bus_irq);
364	putchar(',');	364	putchar(',');
365	printf("io_apic%d,pin%d", iointr->dst_io_apic_id, iointr->dst_io_apic_pin);	365	printf("io_apic%d,pin%d", iointr->dst_io_apic_id, iointr->dst_io_apic_pin);
366	putchar('\n');	366	putchar('\n');
367	#endif	367	#endif
368	}	368	}
369		369
370	void ct_l_intr_entry(struct __l_intr_entry *lintr)	370	void ct_l_intr_entry(struct __l_intr_entry *lintr)
371	{	371	{
372	#ifdef MPSCT_VERBOSE	372	#ifdef MPSCT_VERBOSE
373	switch (lintr->intr_type) {	373	switch (lintr->intr_type) {
374	case 0: printf("INT"); break;	374	case 0: printf("INT"); break;
375	case 1: printf("NMI"); break;	375	case 1: printf("NMI"); break;
376	case 2: printf("SMI"); break;	376	case 2: printf("SMI"); break;
377	case 3: printf("ExtINT"); break;	377	case 3: printf("ExtINT"); break;
378	}	378	}
379	putchar(',');	379	putchar(',');
380	switch (lintr->poel&3) {	380	switch (lintr->poel&3) {
381	case 0: printf("bus-like"); break;	381	case 0: printf("bus-like"); break;
382	case 1: printf("active high"); break;	382	case 1: printf("active high"); break;
383	case 2: printf("reserved"); break;	383	case 2: printf("reserved"); break;
384	case 3: printf("active low"); break;	384	case 3: printf("active low"); break;
385	}	385	}
386	putchar(',');	386	putchar(',');
387	switch ((lintr->poel>>2)&3) {	387	switch ((lintr->poel>>2)&3) {
388	case 0: printf("bus-like"); break;	388	case 0: printf("bus-like"); break;
389	case 1: printf("edge-triggered"); break;	389	case 1: printf("edge-triggered"); break;
390	case 2: printf("reserved"); break;	390	case 2: printf("reserved"); break;
391	case 3: printf("level-triggered"); break;	391	case 3: printf("level-triggered"); break;
392	}	392	}
393	putchar(',');	393	putchar(',');
394	printf("bus%d,irq%d", lintr->src_bus_id, lintr->src_bus_irq);	394	printf("bus%d,irq%d", lintr->src_bus_id, lintr->src_bus_irq);
395	putchar(',');	395	putchar(',');
396	printf("l_apic%d,pin%d", lintr->dst_l_apic_id, lintr->dst_l_apic_pin);	396	printf("l_apic%d,pin%d", lintr->dst_l_apic_id, lintr->dst_l_apic_pin);
397	putchar('\n');	397	putchar('\n');
398	#endif	398	#endif
399	}	399	}
400		400
401	void ct_extended_entries(void)	401	void ct_extended_entries(void)
402	{	402	{
403	__u8 ext = (__u8 ) ct + ct->base_table_length;	403	__u8 ext = (__u8 ) ct + ct->base_table_length;
404	__u8 *cur;	404	__u8 *cur;
405		405
406	for (cur = ext; cur < ext + ct->ext_table_length; cur += cur[CT_EXT_ENTRY_LEN]) {	406	for (cur = ext; cur < ext + ct->ext_table_length; cur += cur[CT_EXT_ENTRY_LEN]) {
407	switch (cur[CT_EXT_ENTRY_TYPE]) {	407	switch (cur[CT_EXT_ENTRY_TYPE]) {
408	default:	408	default:
409	printf("%P: skipping MP Configuration Table extended entry type %d\n", cur, cur[CT_EXT_ENTRY_TYPE]);	409	printf("%p: skipping MP Configuration Table extended entry type %d\n", cur, cur[CT_EXT_ENTRY_TYPE]);
410	break;	410	break;
411	}	411	}
412	}	412	}
413	}	413	}
414		414
415	int mps_irq_to_pin(int irq)	415	int mps_irq_to_pin(int irq)
416	{	416	{
417	int i;	417	int i;
418		418
419	for(i=0;i<io_intr_entry_cnt;i++) {	419	for(i=0;i<io_intr_entry_cnt;i++) {
420	if (io_intr_entries[i].src_bus_irq == irq && io_intr_entries[i].intr_type == 0)	420	if (io_intr_entries[i].src_bus_irq == irq && io_intr_entries[i].intr_type == 0)
421	return io_intr_entries[i].dst_io_apic_pin;	421	return io_intr_entries[i].dst_io_apic_pin;
422	}	422	}
423		423
424	return -1;	424	return -1;
425	}	425	}
426		426
427	#endif /* CONFIG_SMP */	427	#endif /* CONFIG_SMP */
428		428

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(root)/kernel/trunk/arch/ia32/src/smp/mps.c – Rev 615 → 1221