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Line 126... Line 126...
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    trap_register( 7, nm_fault);
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    trap_register( 7, nm_fault);
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    trap_register(12, ss_fault);
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    trap_register(12, ss_fault);
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}
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}
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// Clean IOPL(12,13) and NT(14) flags in EFLAGS register
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/* Clean IOPL(12,13) and NT(14) flags in EFLAGS register */
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static void clean_IOPL_NT_flags(void)
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static void clean_IOPL_NT_flags(void)
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{
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{
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  asm
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  asm
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    (
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    (
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    "pushfl;"
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    "pushfl;"
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        :
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        :
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        :"%eax"
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        :"%eax"
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    );
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    );
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}
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}
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// Clean AM(18) flag in CR0 register
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/* Clean AM(18) flag in CR0 register */
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static void clean_AM_flag(void)
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static void clean_AM_flag(void)
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{
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{
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  asm
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  asm
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    (
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    (
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    "mov %%cr0,%%eax;"
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    "mov %%cr0,%%eax;"
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     * As of this moment, the current CPU has its own GDT pointing
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     * As of this moment, the current CPU has its own GDT pointing
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     * to its own TSS. We just need to load the TR register.
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     * to its own TSS. We just need to load the TR register.
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     */
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     */
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    __asm__("ltr %0" : : "r" ((__u16) selector(TSS_DES)));
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    __asm__("ltr %0" : : "r" ((__u16) selector(TSS_DES)));
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    clean_IOPL_NT_flags();    //Disable I/O on nonprivileged levels 
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    clean_IOPL_NT_flags();    /* Disable I/O on nonprivileged levels */
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    clean_AM_flag();          //Disable alignment check
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    clean_AM_flag();          /* Disable alignment check */
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}
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}