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| Rev 1019 | Rev 1112 | ||
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| Line 46... | Line 46... | ||
| 46 | 46 | ||
| 47 | /* |
47 | /* |
| 48 | * We have no use for segmentation so we set up flat mode. In this |
48 | * We have no use for segmentation so we set up flat mode. In this |
| 49 | * mode, we use, for each privilege level, two segments spanning the |
49 | * mode, we use, for each privilege level, two segments spanning the |
| 50 | * whole memory. One is for code and one is for data. |
50 | * whole memory. One is for code and one is for data. |
| - | 51 | * |
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| - | 52 | * One is for GS register which holds pointer to the TLS thread |
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| - | 53 | * structure in it's base. |
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| 51 | */ |
54 | */ |
| 52 | struct descriptor gdt[GDT_ITEMS] = { |
55 | struct descriptor gdt[GDT_ITEMS] = { |
| 53 | /* NULL descriptor */ |
56 | /* NULL descriptor */ |
| 54 | { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, |
57 | { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, |
| 55 | /* KTEXT descriptor */ |
58 | /* KTEXT descriptor */ |
| Line 59... | Line 62... | ||
| 59 | /* UTEXT descriptor */ |
62 | /* UTEXT descriptor */ |
| 60 | { 0xffff, 0, 0, AR_PRESENT | AR_CODE | DPL_USER, 0xf, 0, 0, 1, 1, 0 }, |
63 | { 0xffff, 0, 0, AR_PRESENT | AR_CODE | DPL_USER, 0xf, 0, 0, 1, 1, 0 }, |
| 61 | /* UDATA descriptor */ |
64 | /* UDATA descriptor */ |
| 62 | { 0xffff, 0, 0, AR_PRESENT | AR_DATA | AR_WRITABLE | DPL_USER, 0xf, 0, 0, 1, 1, 0 }, |
65 | { 0xffff, 0, 0, AR_PRESENT | AR_DATA | AR_WRITABLE | DPL_USER, 0xf, 0, 0, 1, 1, 0 }, |
| 63 | /* TSS descriptor - set up will be completed later */ |
66 | /* TSS descriptor - set up will be completed later */ |
| 64 | { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } |
67 | { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, |
| - | 68 | { 0xffff, 0, 0, AR_PRESENT | AR_DATA | AR_WRITABLE | DPL_USER, 0xf, 0, 0, 1, 1, 0 } |
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| 65 | }; |
69 | }; |
| 66 | 70 | ||
| 67 | static struct idescriptor idt[IDT_ITEMS]; |
71 | static struct idescriptor idt[IDT_ITEMS]; |
| 68 | 72 | ||
| 69 | static struct tss tss; |
73 | static struct tss tss; |
| Line 212... | Line 216... | ||
| 212 | __asm__ volatile ("ltr %0" : : "r" ((__u16) selector(TSS_DES))); |
216 | __asm__ volatile ("ltr %0" : : "r" ((__u16) selector(TSS_DES))); |
| 213 | 217 | ||
| 214 | clean_IOPL_NT_flags(); /* Disable I/O on nonprivileged levels */ |
218 | clean_IOPL_NT_flags(); /* Disable I/O on nonprivileged levels */ |
| 215 | clean_AM_flag(); /* Disable alignment check */ |
219 | clean_AM_flag(); /* Disable alignment check */ |
| 216 | } |
220 | } |
| - | 221 | ||
| - | 222 | void set_tls_desc(__address tls) |
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| - | 223 | { |
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| - | 224 | struct ptr_16_32 cpugdtr; |
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| - | 225 | struct descriptor *gdt_p = (struct descriptor *) cpugdtr.base; |
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| - | 226 | ||
| - | 227 | __asm__ volatile ("sgdt %0\n" : : "m" (cpugdtr)); |
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| - | 228 | ||
| - | 229 | gdt_setbase(&gdt_p[TLS_DES], tls); |
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| - | 230 | /* Reload gdt register to update GS in CPU */ |
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| - | 231 | __asm__ volatile ("lgdt %0\n" : : "m" (cpugdtr)); |
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| - | 232 | } |
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