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Rev 1 Rev 15
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    outb(CLK_PORT4, 0xd2);
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    outb(CLK_PORT4, 0xd2);
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    o2 = inb(CLK_PORT1);
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    o2 = inb(CLK_PORT1);
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    o2 |= inb(CLK_PORT1) << 8;
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    o2 |= inb(CLK_PORT1) << 8;
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    the->cpu->delay_loop_const = ((MAGIC_NUMBER*LOOPS)/1000) / ((t1-t2)-(o1-o2)) +
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    CPU->delay_loop_const = ((MAGIC_NUMBER*LOOPS)/1000) / ((t1-t2)-(o1-o2)) +
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                    (((MAGIC_NUMBER*LOOPS)/1000) % ((t1-t2)-(o1-o2)) ? 1 : 0);
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                    (((MAGIC_NUMBER*LOOPS)/1000) % ((t1-t2)-(o1-o2)) ? 1 : 0);
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    clk1 = rdtsc();
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    clk1 = rdtsc();
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    delay(1<<SHIFT);
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    delay(1<<SHIFT);
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    clk2 = rdtsc();
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    clk2 = rdtsc();
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    the->cpu->frequency_mhz = (clk2-clk1)>>SHIFT;
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    CPU->frequency_mhz = (clk2-clk1)>>SHIFT;
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    return;
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    return;
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}
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}
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void i8254_interrupt(__u8 n, __u32 stack[])
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void i8254_interrupt(__u8 n, __u32 stack[])