WebSVN – HelenOS-historic – Diff – /kernel/trunk/arch/ia32/src/cpu/cpu.c


/*
 * Copyright (C) 2001-2004 Jakub Jermar
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the distribution.
 * - The name of the author may not be used to endorse or promote products
 *   derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */
 
 /** @addtogroup ia32cpu
 
 * @{
 */
/** @file
 */
 
#include <arch/cpu.h>
#include <arch/cpuid.h>
#include <arch/pm.h>
 
#include <arch.h>
#include <arch/types.h>
#include <print.h>
#include <typedefs.h>
#include <fpu_context.h>
 
#include <arch/smp/apic.h>
 
/*
 * Identification of CPUs.
 * Contains only non-MP-Specification specific SMP code.
 */
#define AMD_CPUID_EBX   0x68747541
#define AMD_CPUID_ECX   0x444d4163
#define AMD_CPUID_EDX   0x69746e65
 
#define INTEL_CPUID_EBX 0x756e6547
#define INTEL_CPUID_ECX 0x6c65746e
#define INTEL_CPUID_EDX 0x49656e69
 
 
enum vendor {
    VendorUnknown=0,
    VendorAMD,
    VendorIntel
};
 
static char *vendor_str[] = {
    "Unknown Vendor",
    "AuthenticAMD",
    "GenuineIntel"
};
 
void fpu_disable(void)
{
    __asm__ volatile (
        "mov %%cr0,%%eax;"
        "or $8,%%eax;"
        "mov %%eax,%%cr0;"
        :
        :
        :"%eax"
    );
}
 
void fpu_enable(void)
{
    __asm__ volatile (
        "mov %%cr0,%%eax;"
        "and $0xffFFffF7,%%eax;"
        "mov %%eax,%%cr0;"
        :
        :
        :"%eax"
    ); 
}
 
void cpu_arch_init(void)
{
    cpuid_feature_info fi;
    cpuid_extended_feature_info efi;
    cpu_info_t info;
    __u32 help = 0;
   
    CPU->arch.tss = tss_p;
    CPU->arch.tss->iomap_base = &CPU->arch.tss->iomap[0] - ((__u8 *) CPU->arch.tss);
 
    CPU->fpu_owner = NULL;
 
    cpuid(1, &info);
 
    fi.word = info.cpuid_edx;
    efi.word = info.cpuid_ecx;
   
    if (fi.bits.fxsr)
        fpu_fxsr();
    else
        fpu_fsr(); 
   
    if (fi.bits.sse) {
        asm volatile (
            "mov %%cr4,%0\n"
            "or %1,%0\n"
            "mov %0,%%cr4\n"
            : "+r" (help)
            : "i" (CR4_OSFXSR_MASK|(1<<10))
        );
    }
}
 
void cpu_identify(void)
{
    cpu_info_t info;
 
    CPU->arch.vendor = VendorUnknown;
    if (has_cpuid()) {
        cpuid(0, &info);
 
        /*
         * Check for AMD processor.
         */
        if (info.cpuid_ebx==AMD_CPUID_EBX && info.cpuid_ecx==AMD_CPUID_ECX && info.cpuid_edx==AMD_CPUID_EDX) {
            CPU->arch.vendor = VendorAMD;
        }
 
        /*
         * Check for Intel processor.
         */    
        if (info.cpuid_ebx==INTEL_CPUID_EBX && info.cpuid_ecx==INTEL_CPUID_ECX && info.cpuid_edx==INTEL_CPUID_EDX) {
            CPU->arch.vendor = VendorIntel;
        }
               
        cpuid(1, &info);
        CPU->arch.family = (info.cpuid_eax>>8)&0xf;
        CPU->arch.model = (info.cpuid_eax>>4)&0xf;
        CPU->arch.stepping = (info.cpuid_eax>>0)&0xf;                      
    }
}
 
void cpu_print_report(cpu_t* m)
{
    printf("cpu%d: (%s family=%d model=%d stepping=%d) %dMHz\n",
        m->id, vendor_str[m->arch.vendor], m->arch.family, m->arch.model, m->arch.stepping,
        m->frequency_mhz);
}
 
 /** @}
 */
 
 

Rev 1702	Rev 1705
1	/*	1	/*
2	* Copyright (C) 2001-2004 Jakub Jermar	2	* Copyright (C) 2001-2004 Jakub Jermar
3	* All rights reserved.	3	* All rights reserved.
4	*	4	*
5	* Redistribution and use in source and binary forms, with or without	5	* Redistribution and use in source and binary forms, with or without
6	* modification, are permitted provided that the following conditions	6	* modification, are permitted provided that the following conditions
7	* are met:	7	* are met:
8	*	8	*
9	* - Redistributions of source code must retain the above copyright	9	* - Redistributions of source code must retain the above copyright
10	* notice, this list of conditions and the following disclaimer.	10	* notice, this list of conditions and the following disclaimer.
11	* - Redistributions in binary form must reproduce the above copyright	11	* - Redistributions in binary form must reproduce the above copyright
12	* notice, this list of conditions and the following disclaimer in the	12	* notice, this list of conditions and the following disclaimer in the
13	* documentation and/or other materials provided with the distribution.	13	* documentation and/or other materials provided with the distribution.
14	* - The name of the author may not be used to endorse or promote products	14	* - The name of the author may not be used to endorse or promote products
15	* derived from this software without specific prior written permission.	15	* derived from this software without specific prior written permission.
16	*	16	*
17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR	17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES	18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.	19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,	20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT	21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,	22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY	23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT	24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF	25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.	26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27	*/	27	*/
28		28
29	/** @addtogroup ia32cpu ia32	29	/** @addtogroup ia32cpu
30	* @ingroup cpu	-
31	* @{	30	* @{
32	*/	31	*/
33	/** @file	32	/** @file
34	*/	33	*/
35		34
36	#include <arch/cpu.h>	35	#include <arch/cpu.h>
37	#include <arch/cpuid.h>	36	#include <arch/cpuid.h>
38	#include <arch/pm.h>	37	#include <arch/pm.h>
39		38
40	#include <arch.h>	39	#include <arch.h>
41	#include <arch/types.h>	40	#include <arch/types.h>
42	#include <print.h>	41	#include <print.h>
43	#include <typedefs.h>	42	#include <typedefs.h>
44	#include <fpu_context.h>	43	#include <fpu_context.h>
45		44
46	#include <arch/smp/apic.h>	45	#include <arch/smp/apic.h>
47		46
48	/*	47	/*
49	* Identification of CPUs.	48	* Identification of CPUs.
50	* Contains only non-MP-Specification specific SMP code.	49	* Contains only non-MP-Specification specific SMP code.
51	*/	50	*/
52	#define AMD_CPUID_EBX 0x68747541	51	#define AMD_CPUID_EBX 0x68747541
53	#define AMD_CPUID_ECX 0x444d4163	52	#define AMD_CPUID_ECX 0x444d4163
54	#define AMD_CPUID_EDX 0x69746e65	53	#define AMD_CPUID_EDX 0x69746e65
55		54
56	#define INTEL_CPUID_EBX 0x756e6547	55	#define INTEL_CPUID_EBX 0x756e6547
57	#define INTEL_CPUID_ECX 0x6c65746e	56	#define INTEL_CPUID_ECX 0x6c65746e
58	#define INTEL_CPUID_EDX 0x49656e69	57	#define INTEL_CPUID_EDX 0x49656e69
59		58
60		59
61	enum vendor {	60	enum vendor {
62	VendorUnknown=0,	61	VendorUnknown=0,
63	VendorAMD,	62	VendorAMD,
64	VendorIntel	63	VendorIntel
65	};	64	};
66		65
67	static char *vendor_str[] = {	66	static char *vendor_str[] = {
68	"Unknown Vendor",	67	"Unknown Vendor",
69	"AuthenticAMD",	68	"AuthenticAMD",
70	"GenuineIntel"	69	"GenuineIntel"
71	};	70	};
72		71
73	void fpu_disable(void)	72	void fpu_disable(void)
74	{	73	{
75	__asm__ volatile (	74	__asm__ volatile (
76	"mov %%cr0,%%eax;"	75	"mov %%cr0,%%eax;"
77	"or $8,%%eax;"	76	"or $8,%%eax;"
78	"mov %%eax,%%cr0;"	77	"mov %%eax,%%cr0;"
79	:	78	:
80	:	79	:
81	:"%eax"	80	:"%eax"
82	);	81	);
83	}	82	}
84		83
85	void fpu_enable(void)	84	void fpu_enable(void)
86	{	85	{
87	__asm__ volatile (	86	__asm__ volatile (
88	"mov %%cr0,%%eax;"	87	"mov %%cr0,%%eax;"
89	"and $0xffFFffF7,%%eax;"	88	"and $0xffFFffF7,%%eax;"
90	"mov %%eax,%%cr0;"	89	"mov %%eax,%%cr0;"
91	:	90	:
92	:	91	:
93	:"%eax"	92	:"%eax"
94	);	93	);
95	}	94	}
96		95
97	void cpu_arch_init(void)	96	void cpu_arch_init(void)
98	{	97	{
99	cpuid_feature_info fi;	98	cpuid_feature_info fi;
100	cpuid_extended_feature_info efi;	99	cpuid_extended_feature_info efi;
101	cpu_info_t info;	100	cpu_info_t info;
102	__u32 help = 0;	101	__u32 help = 0;
103		102
104	CPU->arch.tss = tss_p;	103	CPU->arch.tss = tss_p;
105	CPU->arch.tss->iomap_base = &CPU->arch.tss->iomap[0] - ((__u8 *) CPU->arch.tss);	104	CPU->arch.tss->iomap_base = &CPU->arch.tss->iomap[0] - ((__u8 *) CPU->arch.tss);
106		105
107	CPU->fpu_owner = NULL;	106	CPU->fpu_owner = NULL;
108		107
109	cpuid(1, &info);	108	cpuid(1, &info);
110		109
111	fi.word = info.cpuid_edx;	110	fi.word = info.cpuid_edx;
112	efi.word = info.cpuid_ecx;	111	efi.word = info.cpuid_ecx;
113		112
114	if (fi.bits.fxsr)	113	if (fi.bits.fxsr)
115	fpu_fxsr();	114	fpu_fxsr();
116	else	115	else
117	fpu_fsr();	116	fpu_fsr();
118		117
119	if (fi.bits.sse) {	118	if (fi.bits.sse) {
120	asm volatile (	119	asm volatile (
121	"mov %%cr4,%0\n"	120	"mov %%cr4,%0\n"
122	"or %1,%0\n"	121	"or %1,%0\n"
123	"mov %0,%%cr4\n"	122	"mov %0,%%cr4\n"
124	: "+r" (help)	123	: "+r" (help)
125	: "i" (CR4_OSFXSR_MASK\|(1<<10))	124	: "i" (CR4_OSFXSR_MASK\|(1<<10))
126	);	125	);
127	}	126	}
128	}	127	}
129		128
130	void cpu_identify(void)	129	void cpu_identify(void)
131	{	130	{
132	cpu_info_t info;	131	cpu_info_t info;
133		132
134	CPU->arch.vendor = VendorUnknown;	133	CPU->arch.vendor = VendorUnknown;
135	if (has_cpuid()) {	134	if (has_cpuid()) {
136	cpuid(0, &info);	135	cpuid(0, &info);
137		136
138	/*	137	/*
139	* Check for AMD processor.	138	* Check for AMD processor.
140	*/	139	*/
141	if (info.cpuid_ebx==AMD_CPUID_EBX && info.cpuid_ecx==AMD_CPUID_ECX && info.cpuid_edx==AMD_CPUID_EDX) {	140	if (info.cpuid_ebx==AMD_CPUID_EBX && info.cpuid_ecx==AMD_CPUID_ECX && info.cpuid_edx==AMD_CPUID_EDX) {
142	CPU->arch.vendor = VendorAMD;	141	CPU->arch.vendor = VendorAMD;
143	}	142	}
144		143
145	/*	144	/*
146	* Check for Intel processor.	145	* Check for Intel processor.
147	*/	146	*/
148	if (info.cpuid_ebx==INTEL_CPUID_EBX && info.cpuid_ecx==INTEL_CPUID_ECX && info.cpuid_edx==INTEL_CPUID_EDX) {	147	if (info.cpuid_ebx==INTEL_CPUID_EBX && info.cpuid_ecx==INTEL_CPUID_ECX && info.cpuid_edx==INTEL_CPUID_EDX) {
149	CPU->arch.vendor = VendorIntel;	148	CPU->arch.vendor = VendorIntel;
150	}	149	}
151		150
152	cpuid(1, &info);	151	cpuid(1, &info);
153	CPU->arch.family = (info.cpuid_eax>>8)&0xf;	152	CPU->arch.family = (info.cpuid_eax>>8)&0xf;
154	CPU->arch.model = (info.cpuid_eax>>4)&0xf;	153	CPU->arch.model = (info.cpuid_eax>>4)&0xf;
155	CPU->arch.stepping = (info.cpuid_eax>>0)&0xf;	154	CPU->arch.stepping = (info.cpuid_eax>>0)&0xf;
156	}	155	}
157	}	156	}
158		157
159	void cpu_print_report(cpu_t* m)	158	void cpu_print_report(cpu_t* m)
160	{	159	{
161	printf("cpu%d: (%s family=%d model=%d stepping=%d) %dMHz\n",	160	printf("cpu%d: (%s family=%d model=%d stepping=%d) %dMHz\n",
162	m->id, vendor_str[m->arch.vendor], m->arch.family, m->arch.model, m->arch.stepping,	161	m->id, vendor_str[m->arch.vendor], m->arch.family, m->arch.model, m->arch.stepping,
163	m->frequency_mhz);	162	m->frequency_mhz);
164	}	163	}
165		164
166	/** @}	165	/** @}
167	*/	166	*/
168		167
169		168

Subversion Repositories HelenOS-historic

(root)/kernel/trunk/arch/ia32/src/cpu/cpu.c – Rev 1702 → 1705