WebSVN – HelenOS-historic – Diff – /kernel/trunk/arch/ia32/src/cpu/cpu.c


/*
 * Copyright (C) 2001-2004 Jakub Jermar
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the distribution.
 * - The name of the author may not be used to endorse or promote products
 *   derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */
 
 /** @addtogroup ia32cpu ia32
 * @ingroup cpu
 * @{
 */
/** @file
 */
 
#include <arch/cpu.h>
#include <arch/cpuid.h>
#include <arch/pm.h>
 
#include <arch.h>
#include <arch/types.h>
#include <print.h>
#include <typedefs.h>
#include <fpu_context.h>
 
#include <arch/smp/apic.h>
 
/*
 * Identification of CPUs.
 * Contains only non-MP-Specification specific SMP code.
 */
#define AMD_CPUID_EBX   0x68747541
#define AMD_CPUID_ECX   0x444d4163
#define AMD_CPUID_EDX   0x69746e65
 
#define INTEL_CPUID_EBX 0x756e6547
#define INTEL_CPUID_ECX 0x6c65746e
#define INTEL_CPUID_EDX 0x49656e69
 
 
enum vendor {
    VendorUnknown=0,
    VendorAMD,
    VendorIntel
};
 
static char *vendor_str[] = {
    "Unknown Vendor",
    "AuthenticAMD",
    "GenuineIntel"
};
 
void fpu_disable(void)
{
    __asm__ volatile (
        "mov %%cr0,%%eax;"
        "or $8,%%eax;"
        "mov %%eax,%%cr0;"
        :
        :
        :"%eax"
    );
}
 
void fpu_enable(void)
{
    __asm__ volatile (
        "mov %%cr0,%%eax;"
        "and $0xffFFffF7,%%eax;"
        "mov %%eax,%%cr0;"
        :
        :
        :"%eax"
    ); 
}
 
void cpu_arch_init(void)
{
    cpuid_feature_info fi;
    cpuid_extended_feature_info efi;
    cpu_info_t info;
    __u32 help = 0;
   
    CPU->arch.tss = tss_p;
    CPU->arch.tss->iomap_base = &CPU->arch.tss->iomap[0] - ((__u8 *) CPU->arch.tss);
 
    CPU->fpu_owner = NULL;
 
    cpuid(1, &info);
 
    fi.word = info.cpuid_edx;
    efi.word = info.cpuid_ecx;
   
    if (fi.bits.fxsr)
        fpu_fxsr();
    else
        fpu_fsr(); 
   
    if (fi.bits.sse) {
        asm volatile (
            "mov %%cr4,%0\n"
            "or %1,%0\n"
            "mov %0,%%cr4\n"
            : "+r" (help)
            : "i" (CR4_OSFXSR_MASK|(1<<10))
        );
    }
}
 
void cpu_identify(void)
{
    cpu_info_t info;
 
    CPU->arch.vendor = VendorUnknown;
    if (has_cpuid()) {
        cpuid(0, &info);
 
        /*
         * Check for AMD processor.
         */
        if (info.cpuid_ebx==AMD_CPUID_EBX && info.cpuid_ecx==AMD_CPUID_ECX && info.cpuid_edx==AMD_CPUID_EDX) {
            CPU->arch.vendor = VendorAMD;
        }
 
        /*
         * Check for Intel processor.
         */    
        if (info.cpuid_ebx==INTEL_CPUID_EBX && info.cpuid_ecx==INTEL_CPUID_ECX && info.cpuid_edx==INTEL_CPUID_EDX) {
            CPU->arch.vendor = VendorIntel;
        }
               
        cpuid(1, &info);
        CPU->arch.family = (info.cpuid_eax>>8)&0xf;
        CPU->arch.model = (info.cpuid_eax>>4)&0xf;
        CPU->arch.stepping = (info.cpuid_eax>>0)&0xf;                      
    }
}
 
void cpu_print_report(cpu_t* m)
{
    printf("cpu%d: (%s family=%d model=%d stepping=%d) %dMHz\n",
        m->id, vendor_str[m->arch.vendor], m->arch.family, m->arch.model, m->arch.stepping,
        m->frequency_mhz);
}
 
 /** @}
 */
 
 

Rev 1187	Rev 1702
1	/*	1	/*
2	* Copyright (C) 2001-2004 Jakub Jermar	2	* Copyright (C) 2001-2004 Jakub Jermar
3	* All rights reserved.	3	* All rights reserved.
4	*	4	*
5	* Redistribution and use in source and binary forms, with or without	5	* Redistribution and use in source and binary forms, with or without
6	* modification, are permitted provided that the following conditions	6	* modification, are permitted provided that the following conditions
7	* are met:	7	* are met:
8	*	8	*
9	* - Redistributions of source code must retain the above copyright	9	* - Redistributions of source code must retain the above copyright
10	* notice, this list of conditions and the following disclaimer.	10	* notice, this list of conditions and the following disclaimer.
11	* - Redistributions in binary form must reproduce the above copyright	11	* - Redistributions in binary form must reproduce the above copyright
12	* notice, this list of conditions and the following disclaimer in the	12	* notice, this list of conditions and the following disclaimer in the
13	* documentation and/or other materials provided with the distribution.	13	* documentation and/or other materials provided with the distribution.
14	* - The name of the author may not be used to endorse or promote products	14	* - The name of the author may not be used to endorse or promote products
15	* derived from this software without specific prior written permission.	15	* derived from this software without specific prior written permission.
16	*	16	*
17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR	17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES	18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.	19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,	20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT	21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,	22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY	23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT	24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF	25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.	26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27	*/	27	*/
28		28
-		29	/** @addtogroup ia32cpu ia32
-		30	* @ingroup cpu
-		31	* @{
-		32	*/
-		33	/** @file
-		34	*/
-		35
29	#include <arch/cpu.h>	36	#include <arch/cpu.h>
30	#include <arch/cpuid.h>	37	#include <arch/cpuid.h>
31	#include <arch/pm.h>	38	#include <arch/pm.h>
32		39
33	#include <arch.h>	40	#include <arch.h>
34	#include <arch/types.h>	41	#include <arch/types.h>
35	#include <print.h>	42	#include <print.h>
36	#include <typedefs.h>	43	#include <typedefs.h>
37	#include <fpu_context.h>	44	#include <fpu_context.h>
38		45
39	#include <arch/smp/apic.h>	46	#include <arch/smp/apic.h>
40		47
41	/*	48	/*
42	* Identification of CPUs.	49	* Identification of CPUs.
43	* Contains only non-MP-Specification specific SMP code.	50	* Contains only non-MP-Specification specific SMP code.
44	*/	51	*/
45	#define AMD_CPUID_EBX 0x68747541	52	#define AMD_CPUID_EBX 0x68747541
46	#define AMD_CPUID_ECX 0x444d4163	53	#define AMD_CPUID_ECX 0x444d4163
47	#define AMD_CPUID_EDX 0x69746e65	54	#define AMD_CPUID_EDX 0x69746e65
48		55
49	#define INTEL_CPUID_EBX 0x756e6547	56	#define INTEL_CPUID_EBX 0x756e6547
50	#define INTEL_CPUID_ECX 0x6c65746e	57	#define INTEL_CPUID_ECX 0x6c65746e
51	#define INTEL_CPUID_EDX 0x49656e69	58	#define INTEL_CPUID_EDX 0x49656e69
52		59
53		60
54	enum vendor {	61	enum vendor {
55	VendorUnknown=0,	62	VendorUnknown=0,
56	VendorAMD,	63	VendorAMD,
57	VendorIntel	64	VendorIntel
58	};	65	};
59		66
60	static char *vendor_str[] = {	67	static char *vendor_str[] = {
61	"Unknown Vendor",	68	"Unknown Vendor",
62	"AuthenticAMD",	69	"AuthenticAMD",
63	"GenuineIntel"	70	"GenuineIntel"
64	};	71	};
65		72
66	void fpu_disable(void)	73	void fpu_disable(void)
67	{	74	{
68	__asm__ volatile (	75	__asm__ volatile (
69	"mov %%cr0,%%eax;"	76	"mov %%cr0,%%eax;"
70	"or $8,%%eax;"	77	"or $8,%%eax;"
71	"mov %%eax,%%cr0;"	78	"mov %%eax,%%cr0;"
72	:	79	:
73	:	80	:
74	:"%eax"	81	:"%eax"
75	);	82	);
76	}	83	}
77		84
78	void fpu_enable(void)	85	void fpu_enable(void)
79	{	86	{
80	__asm__ volatile (	87	__asm__ volatile (
81	"mov %%cr0,%%eax;"	88	"mov %%cr0,%%eax;"
82	"and $0xffFFffF7,%%eax;"	89	"and $0xffFFffF7,%%eax;"
83	"mov %%eax,%%cr0;"	90	"mov %%eax,%%cr0;"
84	:	91	:
85	:	92	:
86	:"%eax"	93	:"%eax"
87	);	94	);
88	}	95	}
89		96
90	void cpu_arch_init(void)	97	void cpu_arch_init(void)
91	{	98	{
92	cpuid_feature_info fi;	99	cpuid_feature_info fi;
93	cpuid_extended_feature_info efi;	100	cpuid_extended_feature_info efi;
94	cpu_info_t info;	101	cpu_info_t info;
95	__u32 help = 0;	102	__u32 help = 0;
96		103
97	CPU->arch.tss = tss_p;	104	CPU->arch.tss = tss_p;
98	CPU->arch.tss->iomap_base = &CPU->arch.tss->iomap[0] - ((__u8 *) CPU->arch.tss);	105	CPU->arch.tss->iomap_base = &CPU->arch.tss->iomap[0] - ((__u8 *) CPU->arch.tss);
99		106
100	CPU->fpu_owner = NULL;	107	CPU->fpu_owner = NULL;
101		108
102	cpuid(1, &info);	109	cpuid(1, &info);
103		110
104	fi.word = info.cpuid_edx;	111	fi.word = info.cpuid_edx;
105	efi.word = info.cpuid_ecx;	112	efi.word = info.cpuid_ecx;
106		113
107	if (fi.bits.fxsr)	114	if (fi.bits.fxsr)
108	fpu_fxsr();	115	fpu_fxsr();
109	else	116	else
110	fpu_fsr();	117	fpu_fsr();
111		118
112	if (fi.bits.sse) {	119	if (fi.bits.sse) {
113	asm volatile (	120	asm volatile (
114	"mov %%cr4,%0\n"	121	"mov %%cr4,%0\n"
115	"or %1,%0\n"	122	"or %1,%0\n"
116	"mov %0,%%cr4\n"	123	"mov %0,%%cr4\n"
117	: "+r" (help)	124	: "+r" (help)
118	: "i" (CR4_OSFXSR_MASK\|(1<<10))	125	: "i" (CR4_OSFXSR_MASK\|(1<<10))
119	);	126	);
120	}	127	}
121	}	128	}
122		129
123	void cpu_identify(void)	130	void cpu_identify(void)
124	{	131	{
125	cpu_info_t info;	132	cpu_info_t info;
126		133
127	CPU->arch.vendor = VendorUnknown;	134	CPU->arch.vendor = VendorUnknown;
128	if (has_cpuid()) {	135	if (has_cpuid()) {
129	cpuid(0, &info);	136	cpuid(0, &info);
130		137
131	/*	138	/*
132	* Check for AMD processor.	139	* Check for AMD processor.
133	*/	140	*/
134	if (info.cpuid_ebx==AMD_CPUID_EBX && info.cpuid_ecx==AMD_CPUID_ECX && info.cpuid_edx==AMD_CPUID_EDX) {	141	if (info.cpuid_ebx==AMD_CPUID_EBX && info.cpuid_ecx==AMD_CPUID_ECX && info.cpuid_edx==AMD_CPUID_EDX) {
135	CPU->arch.vendor = VendorAMD;	142	CPU->arch.vendor = VendorAMD;
136	}	143	}
137		144
138	/*	145	/*
139	* Check for Intel processor.	146	* Check for Intel processor.
140	*/	147	*/
141	if (info.cpuid_ebx==INTEL_CPUID_EBX && info.cpuid_ecx==INTEL_CPUID_ECX && info.cpuid_edx==INTEL_CPUID_EDX) {	148	if (info.cpuid_ebx==INTEL_CPUID_EBX && info.cpuid_ecx==INTEL_CPUID_ECX && info.cpuid_edx==INTEL_CPUID_EDX) {
142	CPU->arch.vendor = VendorIntel;	149	CPU->arch.vendor = VendorIntel;
143	}	150	}
144		151
145	cpuid(1, &info);	152	cpuid(1, &info);
146	CPU->arch.family = (info.cpuid_eax>>8)&0xf;	153	CPU->arch.family = (info.cpuid_eax>>8)&0xf;
147	CPU->arch.model = (info.cpuid_eax>>4)&0xf;	154	CPU->arch.model = (info.cpuid_eax>>4)&0xf;
148	CPU->arch.stepping = (info.cpuid_eax>>0)&0xf;	155	CPU->arch.stepping = (info.cpuid_eax>>0)&0xf;
149	}	156	}
150	}	157	}
151		158
152	void cpu_print_report(cpu_t* m)	159	void cpu_print_report(cpu_t* m)
153	{	160	{
154	printf("cpu%d: (%s family=%d model=%d stepping=%d) %dMHz\n",	161	printf("cpu%d: (%s family=%d model=%d stepping=%d) %dMHz\n",
155	m->id, vendor_str[m->arch.vendor], m->arch.family, m->arch.model, m->arch.stepping,	162	m->id, vendor_str[m->arch.vendor], m->arch.family, m->arch.model, m->arch.stepping,
156	m->frequency_mhz);	163	m->frequency_mhz);
157	}	164	}
-		165
-		166	/** @}
-		167	*/
-		168
158		169

Subversion Repositories HelenOS-historic

(root)/kernel/trunk/arch/ia32/src/cpu/cpu.c – Rev 1187 → 1702