WebSVN – HelenOS-historic – Diff – /kernel/trunk/arch/amd64/src/amd64.c


/*
 * Copyright (C) 2005 Ondrej Palkovsky
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the distribution.
 * - The name of the author may not be used to endorse or promote products
 *   derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */
 
#include <arch.h>
 
#include <arch/types.h>
 
#include <config.h>
 
#include <arch/ega.h>
#include <genarch/i8042/i8042.h>
#include <arch/i8254.h>
#include <arch/i8259.h>
 
#include <arch/bios/bios.h>
#include <arch/mm/memory_init.h>
#include <arch/cpu.h>
#include <print.h>
#include <arch/cpuid.h>
#include <genarch/acpi/acpi.h>
#include <panic.h>
#include <interrupt.h>
#include <arch/syscall.h>
#include <arch/debugger.h>
 
/** Disable I/O on non-privileged levels
 *
 * Clean IOPL(12,13) and NT(14) flags in EFLAGS register
 */
static void clean_IOPL_NT_flags(void)
{
    asm
    (
        "pushfq;"
        "pop %%rax;"
        "and $~(0x7000),%%rax;"
        "pushq %%rax;"
        "popfq;"
        :
        :
        :"%rax"
    );
}
 
/** Disable alignment check
 *
 * Clean AM(18) flag in CR0 register
 */
static void clean_AM_flag(void)
{
    asm
    (
        "mov %%cr0,%%rax;"
        "and $~(0x40000),%%rax;"
        "mov %%rax,%%cr0;"
        :
        :
        :"%rax"
    );
}
 
void arch_pre_mm_init(void)
{
    struct cpu_info cpuid_s;
 
    cpuid(AMD_CPUID_EXTENDED,&cpuid_s);
    if (! (cpuid_s.cpuid_edx & (1<<AMD_EXT_NOEXECUTE)))
        panic("Processor does not support No-execute pages.\n");
 
    cpuid(INTEL_CPUID_STANDARD,&cpuid_s);
    if (! (cpuid_s.cpuid_edx & (1<<INTEL_FXSAVE)))
        panic("Processor does not support FXSAVE/FXRESTORE.\n");
   
    if (! (cpuid_s.cpuid_edx & (1<<INTEL_SSE2)))
        panic("Processor does not support SSE2 instructions.\n");
 
    /* Enable No-execute pages */
    set_efer_flag(AMD_NXE_FLAG);
    /* Enable FPU */
    cpu_setup_fpu();
 
    /* Initialize segmentation */
    pm_init();
 
        /* Disable I/O on nonprivileged levels
     * clear the NT(nested-thread) flag
     */
    clean_IOPL_NT_flags();
    /* Disable alignment check */
    clean_AM_flag();
 
    if (config.cpu_active == 1) {
        bios_init();
        i8259_init();   /* PIC */
        i8254_init();   /* hard clock */
 
        #ifdef CONFIG_SMP
        exc_register(VECTOR_TLB_SHOOTDOWN_IPI, "tlb_shootdown",
                 tlb_shootdown_ipi);
        #endif /* CONFIG_SMP */
    }
}
 
void arch_post_mm_init(void)
{
    if (config.cpu_active == 1) {
        ega_init(); /* video */
        /* Enable debugger */
        debugger_init();
    }
    /* Setup fast SYSCALL/SYSRET */
    syscall_setup_cpu();
   
}
 
void arch_pre_smp_init(void)
{
    if (config.cpu_active == 1) {
        memory_print_map();
       
        #ifdef CONFIG_SMP
        acpi_init();
        #endif /* CONFIG_SMP */
    }
}
 
void arch_post_smp_init(void)
{
    i8042_init();   /* keyboard controller */
}
 
void calibrate_delay_loop(void)
{
    i8254_calibrate_delay_loop();
    i8254_normal_operation();
}
 

Rev 894	Rev 1072
1	/*	1	/*
2	* Copyright (C) 2005 Ondrej Palkovsky	2	* Copyright (C) 2005 Ondrej Palkovsky
3	* All rights reserved.	3	* All rights reserved.
4	*	4	*
5	* Redistribution and use in source and binary forms, with or without	5	* Redistribution and use in source and binary forms, with or without
6	* modification, are permitted provided that the following conditions	6	* modification, are permitted provided that the following conditions
7	* are met:	7	* are met:
8	*	8	*
9	* - Redistributions of source code must retain the above copyright	9	* - Redistributions of source code must retain the above copyright
10	* notice, this list of conditions and the following disclaimer.	10	* notice, this list of conditions and the following disclaimer.
11	* - Redistributions in binary form must reproduce the above copyright	11	* - Redistributions in binary form must reproduce the above copyright
12	* notice, this list of conditions and the following disclaimer in the	12	* notice, this list of conditions and the following disclaimer in the
13	* documentation and/or other materials provided with the distribution.	13	* documentation and/or other materials provided with the distribution.
14	* - The name of the author may not be used to endorse or promote products	14	* - The name of the author may not be used to endorse or promote products
15	* derived from this software without specific prior written permission.	15	* derived from this software without specific prior written permission.
16	*	16	*
17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR	17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES	18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.	19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,	20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT	21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,	22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY	23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT	24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF	25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.	26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27	*/	27	*/
28		28
29	#include <arch.h>	29	#include <arch.h>
30		30
31	#include <arch/types.h>	31	#include <arch/types.h>
32		32
33	#include <config.h>	33	#include <config.h>
34		34
35	#include <arch/ega.h>	35	#include <arch/ega.h>
36	#include <genarch/i8042/i8042.h>	36	#include <genarch/i8042/i8042.h>
37	#include <arch/i8254.h>	37	#include <arch/i8254.h>
38	#include <arch/i8259.h>	38	#include <arch/i8259.h>
39		39
40	#include <arch/bios/bios.h>	40	#include <arch/bios/bios.h>
41	#include <arch/mm/memory_init.h>	41	#include <arch/mm/memory_init.h>
42	#include <arch/cpu.h>	42	#include <arch/cpu.h>
43	#include <print.h>	43	#include <print.h>
44	#include <arch/cpuid.h>	44	#include <arch/cpuid.h>
45	#include <genarch/acpi/acpi.h>	45	#include <genarch/acpi/acpi.h>
46	#include <panic.h>	46	#include <panic.h>
47	#include <interrupt.h>	47	#include <interrupt.h>
48	#include <arch/syscall.h>	48	#include <arch/syscall.h>
-		49	#include <arch/debugger.h>
49		50
50	/** Disable I/O on non-privileged levels	51	/** Disable I/O on non-privileged levels
51	*	52	*
52	* Clean IOPL(12,13) and NT(14) flags in EFLAGS register	53	* Clean IOPL(12,13) and NT(14) flags in EFLAGS register
53	*/	54	*/
54	static void clean_IOPL_NT_flags(void)	55	static void clean_IOPL_NT_flags(void)
55	{	56	{
56	asm	57	asm
57	(	58	(
58	"pushfq;"	59	"pushfq;"
59	"pop %%rax;"	60	"pop %%rax;"
60	"and $~(0x7000),%%rax;"	61	"and $~(0x7000),%%rax;"
61	"pushq %%rax;"	62	"pushq %%rax;"
62	"popfq;"	63	"popfq;"
63	:	64	:
64	:	65	:
65	:"%rax"	66	:"%rax"
66	);	67	);
67	}	68	}
68		69
69	/** Disable alignment check	70	/** Disable alignment check
70	*	71	*
71	* Clean AM(18) flag in CR0 register	72	* Clean AM(18) flag in CR0 register
72	*/	73	*/
73	static void clean_AM_flag(void)	74	static void clean_AM_flag(void)
74	{	75	{
75	asm	76	asm
76	(	77	(
77	"mov %%cr0,%%rax;"	78	"mov %%cr0,%%rax;"
78	"and $~(0x40000),%%rax;"	79	"and $~(0x40000),%%rax;"
79	"mov %%rax,%%cr0;"	80	"mov %%rax,%%cr0;"
80	:	81	:
81	:	82	:
82	:"%rax"	83	:"%rax"
83	);	84	);
84	}	85	}
85		86
86	void arch_pre_mm_init(void)	87	void arch_pre_mm_init(void)
87	{	88	{
88	struct cpu_info cpuid_s;	89	struct cpu_info cpuid_s;
89		90
90	cpuid(AMD_CPUID_EXTENDED,&cpuid_s);	91	cpuid(AMD_CPUID_EXTENDED,&cpuid_s);
91	if (! (cpuid_s.cpuid_edx & (1<<AMD_EXT_NOEXECUTE)))	92	if (! (cpuid_s.cpuid_edx & (1<<AMD_EXT_NOEXECUTE)))
92	panic("Processor does not support No-execute pages.\n");	93	panic("Processor does not support No-execute pages.\n");
93		94
94	cpuid(INTEL_CPUID_STANDARD,&cpuid_s);	95	cpuid(INTEL_CPUID_STANDARD,&cpuid_s);
95	if (! (cpuid_s.cpuid_edx & (1<<INTEL_FXSAVE)))	96	if (! (cpuid_s.cpuid_edx & (1<<INTEL_FXSAVE)))
96	panic("Processor does not support FXSAVE/FXRESTORE.\n");	97	panic("Processor does not support FXSAVE/FXRESTORE.\n");
97		98
98	if (! (cpuid_s.cpuid_edx & (1<<INTEL_SSE2)))	99	if (! (cpuid_s.cpuid_edx & (1<<INTEL_SSE2)))
99	panic("Processor does not support SSE2 instructions.\n");	100	panic("Processor does not support SSE2 instructions.\n");
100		101
101	/* Enable No-execute pages */	102	/* Enable No-execute pages */
102	set_efer_flag(AMD_NXE_FLAG);	103	set_efer_flag(AMD_NXE_FLAG);
103	/* Enable FPU */	104	/* Enable FPU */
104	cpu_setup_fpu();	105	cpu_setup_fpu();
105		106
106	/* Initialize segmentation */	107	/* Initialize segmentation */
107	pm_init();	108	pm_init();
108		109
109	/* Disable I/O on nonprivileged levels	110	/* Disable I/O on nonprivileged levels
110	* clear the NT(nested-thread) flag	111	* clear the NT(nested-thread) flag
111	*/	112	*/
112	clean_IOPL_NT_flags();	113	clean_IOPL_NT_flags();
113	/* Disable alignment check */	114	/* Disable alignment check */
114	clean_AM_flag();	115	clean_AM_flag();
115		116
116	if (config.cpu_active == 1) {	117	if (config.cpu_active == 1) {
117	bios_init();	118	bios_init();
118	i8259_init(); /* PIC */	119	i8259_init(); /* PIC */
119	i8254_init(); /* hard clock */	120	i8254_init(); /* hard clock */
120		121
121	#ifdef CONFIG_SMP	122	#ifdef CONFIG_SMP
122	exc_register(VECTOR_TLB_SHOOTDOWN_IPI, "tlb_shootdown",	123	exc_register(VECTOR_TLB_SHOOTDOWN_IPI, "tlb_shootdown",
123	tlb_shootdown_ipi);	124	tlb_shootdown_ipi);
124	#endif /* CONFIG_SMP */	125	#endif /* CONFIG_SMP */
125	}	126	}
126	}	127	}
127		128
128	void arch_post_mm_init(void)	129	void arch_post_mm_init(void)
129	{	130	{
130	if (config.cpu_active == 1) {	131	if (config.cpu_active == 1) {
131	ega_init(); /* video */	132	ega_init(); /* video */
-		133	/* Enable debugger */
-		134	debugger_init();
132	}	135	}
133	/* Setup fast SYSCALL/SYSRET */	136	/* Setup fast SYSCALL/SYSRET */
134	syscall_setup_cpu();	137	syscall_setup_cpu();
135		138
136	}	139	}
137		140
138	void arch_pre_smp_init(void)	141	void arch_pre_smp_init(void)
139	{	142	{
140	if (config.cpu_active == 1) {	143	if (config.cpu_active == 1) {
141	memory_print_map();	144	memory_print_map();
142		145
143	#ifdef CONFIG_SMP	146	#ifdef CONFIG_SMP
144	acpi_init();	147	acpi_init();
145	#endif /* CONFIG_SMP */	148	#endif /* CONFIG_SMP */
146	}	149	}
147	}	150	}
148		151
149	void arch_post_smp_init(void)	152	void arch_post_smp_init(void)
150	{	153	{
151	i8042_init(); /* keyboard controller */	154	i8042_init(); /* keyboard controller */
152	}	155	}
153		156
154	void calibrate_delay_loop(void)	157	void calibrate_delay_loop(void)
155	{	158	{
156	i8254_calibrate_delay_loop();	159	i8254_calibrate_delay_loop();
157	i8254_normal_operation();	160	i8254_normal_operation();
158	}	161	}
159		162

Subversion Repositories HelenOS-historic

(root)/kernel/trunk/arch/amd64/src/amd64.c – Rev 894 → 1072