WebSVN – HelenOS-historic – Diff – /kernel/trunk/arch/amd64/include/cpu.h


/*
 * Copyright (C) 2001-2004 Jakub Jermar
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the distribution.
 * - The name of the author may not be used to endorse or promote products
 *   derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */
 
/** @addtogroup amd64
 * @{
 */
/** @file
 */
 
#ifndef __amd64_CPU_H__
#define __amd64_CPU_H__
 
#define RFLAGS_IF       (1 << 9)
#define RFLAGS_RF       (1 << 16)
 
#define EFER_MSR_NUM    0xc0000080
#define AMD_SCE_FLAG    0
#define AMD_LME_FLAG    8
#define AMD_LMA_FLAG    10
#define AMD_FFXSR_FLAG  14
#define AMD_NXE_FLAG    11
 
/* MSR registers */
#define AMD_MSR_STAR    0xc0000081
#define AMD_MSR_LSTAR   0xc0000082
#define AMD_MSR_SFMASK  0xc0000084
#define AMD_MSR_FS      0xc0000100
#define AMD_MSR_GS      0xc0000101
 
#ifndef __ASM__
 
#include <typedefs.h>
#include <arch/pm.h>
 
struct cpu_arch {
    int vendor;
    int family;
    int model;
    int stepping;
    struct tss *tss;
   
    count_t iomapver_copy;  /** Copy of TASK's I/O Permission bitmap generation count. */
};
 
struct star_msr {
   
};
 
struct lstar_msr {
   
};
 
extern void set_efer_flag(int flag);
extern uint64_t read_efer_flag(void);
void cpu_setup_fpu(void);
 
#endif /* __ASM__ */
 
#endif
 
/** @}
 */
 

Rev 1731	Rev 1780
1	/*	1	/*
2	* Copyright (C) 2001-2004 Jakub Jermar	2	* Copyright (C) 2001-2004 Jakub Jermar
3	* All rights reserved.	3	* All rights reserved.
4	*	4	*
5	* Redistribution and use in source and binary forms, with or without	5	* Redistribution and use in source and binary forms, with or without
6	* modification, are permitted provided that the following conditions	6	* modification, are permitted provided that the following conditions
7	* are met:	7	* are met:
8	*	8	*
9	* - Redistributions of source code must retain the above copyright	9	* - Redistributions of source code must retain the above copyright
10	* notice, this list of conditions and the following disclaimer.	10	* notice, this list of conditions and the following disclaimer.
11	* - Redistributions in binary form must reproduce the above copyright	11	* - Redistributions in binary form must reproduce the above copyright
12	* notice, this list of conditions and the following disclaimer in the	12	* notice, this list of conditions and the following disclaimer in the
13	* documentation and/or other materials provided with the distribution.	13	* documentation and/or other materials provided with the distribution.
14	* - The name of the author may not be used to endorse or promote products	14	* - The name of the author may not be used to endorse or promote products
15	* derived from this software without specific prior written permission.	15	* derived from this software without specific prior written permission.
16	*	16	*
17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR	17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES	18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.	19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,	20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT	21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,	22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY	23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT	24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF	25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.	26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27	*/	27	*/
28		28
29	/** @addtogroup amd64	29	/** @addtogroup amd64
30	* @{	30	* @{
31	*/	31	*/
32	/** @file	32	/** @file
33	*/	33	*/
34		34
35	#ifndef __amd64_CPU_H__	35	#ifndef __amd64_CPU_H__
36	#define __amd64_CPU_H__	36	#define __amd64_CPU_H__
37		37
38	#define RFLAGS_IF (1 << 9)	38	#define RFLAGS_IF (1 << 9)
39	#define RFLAGS_RF (1 << 16)	39	#define RFLAGS_RF (1 << 16)
40		40
41	#define EFER_MSR_NUM 0xc0000080	41	#define EFER_MSR_NUM 0xc0000080
42	#define AMD_SCE_FLAG 0	42	#define AMD_SCE_FLAG 0
43	#define AMD_LME_FLAG 8	43	#define AMD_LME_FLAG 8
44	#define AMD_LMA_FLAG 10	44	#define AMD_LMA_FLAG 10
45	#define AMD_FFXSR_FLAG 14	45	#define AMD_FFXSR_FLAG 14
46	#define AMD_NXE_FLAG 11	46	#define AMD_NXE_FLAG 11
47		47
48	/* MSR registers */	48	/* MSR registers */
49	#define AMD_MSR_STAR 0xc0000081	49	#define AMD_MSR_STAR 0xc0000081
50	#define AMD_MSR_LSTAR 0xc0000082	50	#define AMD_MSR_LSTAR 0xc0000082
51	#define AMD_MSR_SFMASK 0xc0000084	51	#define AMD_MSR_SFMASK 0xc0000084
52	#define AMD_MSR_FS 0xc0000100	52	#define AMD_MSR_FS 0xc0000100
53	#define AMD_MSR_GS 0xc0000101	53	#define AMD_MSR_GS 0xc0000101
54		54
55	#ifndef __ASM__	55	#ifndef __ASM__
56		56
57	#include <typedefs.h>	57	#include <typedefs.h>
58	#include <arch/pm.h>	58	#include <arch/pm.h>
59		59
60	struct cpu_arch {	60	struct cpu_arch {
61	int vendor;	61	int vendor;
62	int family;	62	int family;
63	int model;	63	int model;
64	int stepping;	64	int stepping;
65	struct tss *tss;	65	struct tss *tss;
66		66
67	count_t iomapver_copy; /** Copy of TASK's I/O Permission bitmap generation count. */	67	count_t iomapver_copy; /** Copy of TASK's I/O Permission bitmap generation count. */
68	};	68	};
69		69
70	struct star_msr {	70	struct star_msr {
71		71
72	};	72	};
73		73
74	struct lstar_msr {	74	struct lstar_msr {
75		75
76	};	76	};
77		77
78	extern void set_efer_flag(int flag);	78	extern void set_efer_flag(int flag);
79	extern __u64 read_efer_flag(void);	79	extern uint64_t read_efer_flag(void);
80	void cpu_setup_fpu(void);	80	void cpu_setup_fpu(void);
81		81
82	#endif /* __ASM__ */	82	#endif /* __ASM__ */
83		83
84	#endif	84	#endif
85		85
86	/** @}	86	/** @}
87	*/	87	*/
88		88

Subversion Repositories HelenOS-historic

(root)/kernel/trunk/arch/amd64/include/cpu.h – Rev 1731 → 1780