Rev 1702 | Show entire file | Ignore whitespace | Details | Blame | Last modification | View Log | RSS feed
| Rev 1702 | Rev 1780 | ||
|---|---|---|---|
| Line 81... | Line 81... | ||
| 81 | } |
81 | } |
| 82 | 82 | ||
| 83 | #define atomic_preinc(val) (atomic_postinc(val)+1) |
83 | #define atomic_preinc(val) (atomic_postinc(val)+1) |
| 84 | #define atomic_predec(val) (atomic_postdec(val)-1) |
84 | #define atomic_predec(val) (atomic_postdec(val)-1) |
| 85 | 85 | ||
| 86 | static inline __u64 test_and_set(atomic_t *val) { |
86 | static inline uint64_t test_and_set(atomic_t *val) { |
| 87 | __u64 v; |
87 | uint64_t v; |
| 88 | 88 | ||
| 89 | __asm__ volatile ( |
89 | __asm__ volatile ( |
| 90 | "movq $1, %0\n" |
90 | "movq $1, %0\n" |
| 91 | "xchgq %0, %1\n" |
91 | "xchgq %0, %1\n" |
| 92 | : "=r" (v),"=m" (val->count) |
92 | : "=r" (v),"=m" (val->count) |
| Line 97... | Line 97... | ||
| 97 | 97 | ||
| 98 | 98 | ||
| 99 | /** amd64 specific fast spinlock */ |
99 | /** amd64 specific fast spinlock */ |
| 100 | static inline void atomic_lock_arch(atomic_t *val) |
100 | static inline void atomic_lock_arch(atomic_t *val) |
| 101 | { |
101 | { |
| 102 | __u64 tmp; |
102 | uint64_t tmp; |
| 103 | 103 | ||
| 104 | preemption_disable(); |
104 | preemption_disable(); |
| 105 | __asm__ volatile ( |
105 | __asm__ volatile ( |
| 106 | "0:;" |
106 | "0:;" |
| 107 | #ifdef CONFIG_HT |
107 | #ifdef CONFIG_HT |