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 */
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 */
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#ifndef __SPR_H__
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#ifndef __SPR_H__
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#define __SPR_H__
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#define __SPR_H__
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#define MSR_DR (1<<27)
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#define MSR_DR (1 << 27)
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#define MSR_IR (1<<26)
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#define MSR_IR (1 << 26)
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#define SPRN_SRR0  0x1a
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#define SPRN_SRR0  0x1a
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#define SPRN_SRR1  0x1b
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#define SPRN_SRR1  0x1b
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#define SPRN_HID0  0x3f0
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- 
 
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#define HID0_ICE  (1 << 15)
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#define HID0_DCE  (1 << 14)
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#define HID0_ICFI (1 << 11)
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/* Works for PPC32 */
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#define HID0_DCI  (1 << 10)
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#define L1_CACHE_LINES (128 * 8)
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#define L1_CACHE_BYTES (1 << 5)
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#define L1_CACHE_BYTES 5
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#endif
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#endif