WebSVN – HelenOS-historic – Diff – /boot/trunk/arch/ppc32/loader/asm.S


#
# Copyright (C) 2006 Martin Decky
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# - Redistributions of source code must retain the above copyright
#   notice, this list of conditions and the following disclaimer.
# - Redistributions in binary form must reproduce the above copyright
#   notice, this list of conditions and the following disclaimer in the
#   documentation and/or other materials provided with the distribution.
# - The name of the author may not be used to endorse or promote products
#   derived from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
 
#include "asm.h"
#include "regname.h"
#include "debug.inc"
 
.text
 
.global halt
.global memcpy
.global jump_to_kernel
 
halt:
	b halt
 
memcpy:
	srwi. r7, r5, 3
	addi r6, r3, -4
	addi r4, r4, -4
	beq	2f
	
	andi. r0, r6, 3
	mtctr r7
	bne 5f
	
	1:
	
	lwz r7, 4(r4)
	lwzu r8, 8(r4)
	stw r7, 4(r6)
	stwu r8, 8(r6)
	bdnz 1b
	
	andi. r5, r5, 7
	
	2:
	
	cmplwi 0, r5, 4
	blt 3f
	
	lwzu r0, 4(r4)
	addi r5, r5, -4
	stwu r0, 4(r6)
	
	3:
	
	cmpwi 0, r5, 0
	beqlr
	mtctr r5
	addi r4, r4, 3
	addi r6, r6, 3
	
	4:
	
	lbzu r0, 1(r4)
	stbu r0, 1(r6)
	bdnz 4b
	blr
	
	5:
	
	subfic r0, r0, 4
	mtctr r0
	
	6:
	
	lbz r7, 4(r4)
	addi r4, r4, 1
	stb r7, 4(r6)
	addi r6, r6, 1
	bdnz 6b
	subf r5, r0, r5
	rlwinm. r7, r5, 32-3, 3, 31
	beq 2b
	mtctr r7
	b 1b
 
 
jump_to_kernel:
	
	# r3 = bootinfo (pa)
	# r4 = bootinfo_size
	# r5 = trans (pa)
	# r6 = bytes to copy
	# r7 = real_mode (pa)
	# r8 = framebuffer (pa)
	# r9 = scanline
	
	# disable interrupts
	
	mfmsr r31
	rlwinm r31, r31, 0, 17, 15
	mtmsr r31
	
	# set real_mode meeting point address
	
	mtspr srr0, r7
	
	# jumps to real_mode
	
	mfmsr r31
	lis r30, ~0@h
	ori r30, r30, ~(msr_ir | msr_dr | msr_ee)@l
	and r31, r31, r30
	mtspr srr1, r31
	
	sync
	isync
	rfi
 
.section REALMODE, "ax"
.align PAGE_WIDTH
.global real_mode
 
real_mode:
	
	DEBUG_INIT
	DEBUG_real_mode
	
	# copy kernel to proper location
	#
	# r5 = trans (pa)
	# r6 = bytes to copy
	# r8 = framebuffer (pa)
	# r9 = scanline
	
	li r31, PAGE_SIZE >> 2
	li r30, 0
	
	page_copy:
		
		cmpwi r6, 0
		beq copy_end
		
		# copy page
		
		mtctr r31
		lwz r29, 0(r5)
		
		DEBUG_INIT
		DEBUG_copy_loop
		
		copy_loop:
			
			lwz r28, 0(r29)
			stw r28, 0(r30)
			
			addi r29, r29, 4
			addi r30, r30, 4
			subi r6, r6, 4
			
			cmpwi r6, 0
			beq copy_end
			
			bdnz copy_loop
			
			DEBUG_end_copy_loop
		
		addi r5, r5, 4
		b page_copy
	
	copy_end:
	
	DEBUG_segments
	
	# initially fill segment registers
	
	li r31, 0
	
	li r29, 8
	mtctr r29
	li r30, 0                     # ASID 0 (VSIDs 0 .. 7)
 
	seg_fill_uspace:
	
		mtsrin r30, r31
		addi r30, r30, 1
		addis r31, r31, 0x1000    # move to next SR
		
		bdnz seg_fill_uspace
	
	li r29, 8
	mtctr r29
	lis r30, 0x4000               # priviledged access only
	ori r30, r30, 8               # ASID 0 (VSIDs 8 .. 15)
	
	seg_fill_kernel:
	
		mtsrin r30, r31
		addi r30, r30, 1
		addis r31, r31, 0x1000    # move to next SR
		
		bdnz seg_fill_kernel
	
	# invalidate block address translation registers
	
	DEBUG_bat
	
	li r30, 0
	
	mtspr ibat0u, r30
	mtspr ibat0l, r30
	
	mtspr ibat1u, r30
	mtspr ibat1l, r30
	
	mtspr ibat2u, r30
	mtspr ibat2l, r30
	
	mtspr ibat3u, r30
	mtspr ibat3l, r30
	
	mtspr dbat0u, r30
	mtspr dbat0l, r30
	
	mtspr dbat1u, r30
	mtspr dbat1l, r30
	
	mtspr dbat2u, r30
	mtspr dbat2l, r30
	
	mtspr dbat3u, r30
	mtspr dbat3l, r30
	
	# create empty page hash table FIXME
	
	DEBUG_pht
	
	lis r31, 0x07ff
	ori r31, r31, 0x0000
	
	li r30, 0x4000
	li r29, 0
	
	pht_clear:
		
		# write zeroes
		
		stw r29, 0(r31)
		
		addi r31, r31, 4
		subi r30, r30, 4
		
		cmpwi r30, 0
		beq clear_end
		
		bdnz pht_clear
 
		DEBUG_end_pht_clear
		
	clear_end:
	
	lis r31, 0x07ff
	ori r31, r31, 0x0000
	
	mtsdr1 r31
	
 
 
#ifdef CONFIG_BAT
	
	# create BAT identity mapping
	
	DEBUG_mapping
	
	lwz r31, 0(r3)
	
	lis r29, 0x0002
	cmpw r31, r29
	blt no_bat                    # less than 128 KB -> no BAT
	
	li r29, 18
	srw r31, r31, r29             # r31 = total >> 18
	
	# create Block Length mask by replicating
	# the leading logical one 14 times
	
	li r29, 14
	mtctr r31
	li r29, 1
	
	bat_mask:
		srw r30, r31, r29         # r30 = mask >> 1
		or r31, r31, r30          # mask = mask | r30
		
		bdnz bat_mask
	
	andi. r31, r31, 0x07ff        # mask = mask & 0x07ff (BAT can map up to 256 MB)
	
	li r29, 2
	slw r31, r31, r29             # mask = mask << 2
	ori r31, r31, 0x0002          # mask = mask | 0x0002 (priviledged access only)
	
	lis r29, 0x8000
	or r29, r29, r31
	
	lis r30, 0x0000
	ori r30, r30, 0x0002
	
	mtspr ibat0u, r29
	mtspr ibat0l, r30
	
	mtspr dbat0u, r29
	mtspr dbat0l, r30
	
	no_bat:
 
#endif
	
	DEBUG_tlb
	
	tlbia
	tlbsync
	
	DEBUG_prepare
	
	# start the kernel
	#
	# pc = KERNEL_START_ADDR
	# r3 = bootinfo (pa)
	# sprg0 = KA2PA(KERNEL_START_ADDR)
	# sprg3 = physical memory size
	# sp = 0 (pa)
	
	lis r31, KERNEL_START_ADDR@ha
	addi r31, r31, KERNEL_START_ADDR@l
	
	mtspr srr0, r31
	
	subis r31, r31, 0x8000
	mtsprg0 r31
	
	lwz r31, 0(r3)
	mtsprg3 r31
	
	li sp, 0
	
	mfmsr r31
	ori r31, r31, (msr_ir | msr_dr)@l
	mtspr srr1, r31
	
	sync
	isync
	
	DEBUG_rfi
	rfi
 
.align PAGE_WIDTH
.global trans
trans:
	.space (TRANS_SIZE * TRANS_ITEM_SIZE)
 

Rev 1732	Rev 1737
1	#	1	#
2	# Copyright (C) 2006 Martin Decky	2	# Copyright (C) 2006 Martin Decky
3	# All rights reserved.	3	# All rights reserved.
4	#	4	#
5	# Redistribution and use in source and binary forms, with or without	5	# Redistribution and use in source and binary forms, with or without
6	# modification, are permitted provided that the following conditions	6	# modification, are permitted provided that the following conditions
7	# are met:	7	# are met:
8	#	8	#
9	# - Redistributions of source code must retain the above copyright	9	# - Redistributions of source code must retain the above copyright
10	# notice, this list of conditions and the following disclaimer.	10	# notice, this list of conditions and the following disclaimer.
11	# - Redistributions in binary form must reproduce the above copyright	11	# - Redistributions in binary form must reproduce the above copyright
12	# notice, this list of conditions and the following disclaimer in the	12	# notice, this list of conditions and the following disclaimer in the
13	# documentation and/or other materials provided with the distribution.	13	# documentation and/or other materials provided with the distribution.
14	# - The name of the author may not be used to endorse or promote products	14	# - The name of the author may not be used to endorse or promote products
15	# derived from this software without specific prior written permission.	15	# derived from this software without specific prior written permission.
16	#	16	#
17	# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR	17	# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18	# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES	18	# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19	# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.	19	# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20	# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,	20	# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21	# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT	21	# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22	# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,	22	# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23	# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY	23	# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24	# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT	24	# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25	# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF	25	# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26	# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.	26	# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27	#	27	#
28		28
29	#include "asm.h"	29	#include "asm.h"
30	#include "regname.h"	30	#include "regname.h"
31	#include "debug.inc"	31	#include "debug.inc"
32		32
33	.text	33	.text
34		34
35	.global halt	35	.global halt
36	.global memcpy	36	.global memcpy
37	.global jump_to_kernel	37	.global jump_to_kernel
38		38
39	halt:	39	halt:
40	b halt	40	b halt
41		41
42	memcpy:	42	memcpy:
43	srwi. r7, r5, 3	43	srwi. r7, r5, 3
44	addi r6, r3, -4	44	addi r6, r3, -4
45	addi r4, r4, -4	45	addi r4, r4, -4
46	beq 2f	46	beq 2f
47		47
48	andi. r0, r6, 3	48	andi. r0, r6, 3
49	mtctr r7	49	mtctr r7
50	bne 5f	50	bne 5f
51		51
52	1:	52	1:
53		53
54	lwz r7, 4(r4)	54	lwz r7, 4(r4)
55	lwzu r8, 8(r4)	55	lwzu r8, 8(r4)
56	stw r7, 4(r6)	56	stw r7, 4(r6)
57	stwu r8, 8(r6)	57	stwu r8, 8(r6)
58	bdnz 1b	58	bdnz 1b
59		59
60	andi. r5, r5, 7	60	andi. r5, r5, 7
61		61
62	2:	62	2:
63		63
64	cmplwi 0, r5, 4	64	cmplwi 0, r5, 4
65	blt 3f	65	blt 3f
66		66
67	lwzu r0, 4(r4)	67	lwzu r0, 4(r4)
68	addi r5, r5, -4	68	addi r5, r5, -4
69	stwu r0, 4(r6)	69	stwu r0, 4(r6)
70		70
71	3:	71	3:
72		72
73	cmpwi 0, r5, 0	73	cmpwi 0, r5, 0
74	beqlr	74	beqlr
75	mtctr r5	75	mtctr r5
76	addi r4, r4, 3	76	addi r4, r4, 3
77	addi r6, r6, 3	77	addi r6, r6, 3
78		78
79	4:	79	4:
80		80
81	lbzu r0, 1(r4)	81	lbzu r0, 1(r4)
82	stbu r0, 1(r6)	82	stbu r0, 1(r6)
83	bdnz 4b	83	bdnz 4b
84	blr	84	blr
85		85
86	5:	86	5:
87		87
88	subfic r0, r0, 4	88	subfic r0, r0, 4
89	mtctr r0	89	mtctr r0
90		90
91	6:	91	6:
92		92
93	lbz r7, 4(r4)	93	lbz r7, 4(r4)
94	addi r4, r4, 1	94	addi r4, r4, 1
95	stb r7, 4(r6)	95	stb r7, 4(r6)
96	addi r6, r6, 1	96	addi r6, r6, 1
97	bdnz 6b	97	bdnz 6b
98	subf r5, r0, r5	98	subf r5, r0, r5
99	rlwinm. r7, r5, 32-3, 3, 31	99	rlwinm. r7, r5, 32-3, 3, 31
100	beq 2b	100	beq 2b
101	mtctr r7	101	mtctr r7
102	b 1b	102	b 1b
103		103
104		104
105	jump_to_kernel:	105	jump_to_kernel:
106		106
107	# r3 = bootinfo (pa)	107	# r3 = bootinfo (pa)
108	# r4 = bootinfo_size	108	# r4 = bootinfo_size
109	# r5 = trans (pa)	109	# r5 = trans (pa)
110	# r6 = bytes to copy	110	# r6 = bytes to copy
111	# r7 = real_mode (pa)	111	# r7 = real_mode (pa)
112	# r8 = framebuffer (pa)	112	# r8 = framebuffer (pa)
113	# r9 = scanline	113	# r9 = scanline
114		114
115	# disable interrupts	115	# disable interrupts
116		116
117	mfmsr r31	117	mfmsr r31
118	rlwinm r31, r31, 0, 17, 15	118	rlwinm r31, r31, 0, 17, 15
119	mtmsr r31	119	mtmsr r31
120		120
121	# set real_mode meeting point address	121	# set real_mode meeting point address
122		122
123	mtspr srr0, r7	123	mtspr srr0, r7
124		124
125	# jumps to real_mode	125	# jumps to real_mode
126		126
127	mfmsr r31	127	mfmsr r31
128	lis r30, ~0@h	128	lis r30, ~0@h
129	ori r30, r30, ~(msr_ir \| msr_dr \| msr_ee)@l	129	ori r30, r30, ~(msr_ir \| msr_dr \| msr_ee)@l
130	and r31, r31, r30	130	and r31, r31, r30
131	mtspr srr1, r31	131	mtspr srr1, r31
132		132
133	sync	133	sync
134	isync	134	isync
135	rfi	135	rfi
136		136
137	.section REALMODE, "ax"	137	.section REALMODE, "ax"
138	.align PAGE_WIDTH	138	.align PAGE_WIDTH
139	.global real_mode	139	.global real_mode
140		140
141	real_mode:	141	real_mode:
142		142
143	DEBUG_INIT	143	DEBUG_INIT
144	DEBUG_real_mode	144	DEBUG_real_mode
145		145
146	# copy kernel to proper location	146	# copy kernel to proper location
147	#	147	#
148	# r5 = trans (pa)	148	# r5 = trans (pa)
149	# r6 = bytes to copy	149	# r6 = bytes to copy
150	# r8 = framebuffer (pa)	150	# r8 = framebuffer (pa)
151	# r9 = scanline	151	# r9 = scanline
152		152
153	li r31, PAGE_SIZE >> 2	153	li r31, PAGE_SIZE >> 2
154	li r30, 0	154	li r30, 0
155		155
156	page_copy:	156	page_copy:
157		157
158	cmpwi r6, 0	158	cmpwi r6, 0
159	beq copy_end	159	beq copy_end
160		160
161	# copy page	161	# copy page
162		162
163	mtctr r31	163	mtctr r31
164	lwz r29, 0(r5)	164	lwz r29, 0(r5)
165		165
166	DEBUG_INIT	166	DEBUG_INIT
167	DEBUG_copy_loop	167	DEBUG_copy_loop
168		168
169	copy_loop:	169	copy_loop:
170		170
171	lwz r28, 0(r29)	171	lwz r28, 0(r29)
172	stw r28, 0(r30)	172	stw r28, 0(r30)
173		173
174	addi r29, r29, 4	174	addi r29, r29, 4
175	addi r30, r30, 4	175	addi r30, r30, 4
176	subi r6, r6, 4	176	subi r6, r6, 4
177		177
178	cmpwi r6, 0	178	cmpwi r6, 0
179	beq copy_end	179	beq copy_end
180		180
181	bdnz copy_loop	181	bdnz copy_loop
182		182
183	DEBUG_end_copy_loop	183	DEBUG_end_copy_loop
184		184
185	addi r5, r5, 4	185	addi r5, r5, 4
186	b page_copy	186	b page_copy
187		187
188	copy_end:	188	copy_end:
189		189
190	DEBUG_segments	190	DEBUG_segments
191		191
192	# initially fill segment registers	192	# initially fill segment registers
193		193
194	li r31, 0	194	li r31, 0
195		195
196	li r29, 8	196	li r29, 8
197	mtctr r29	197	mtctr r29
198	li r30, 0	198	li r30, 0 # ASID 0 (VSIDs 0 .. 7)
199		199
200	seg_fill_uspace:	200	seg_fill_uspace:
201		201
202	mtsrin r30, r31	202	mtsrin r30, r31
203	addi r30, r30, 1	203	addi r30, r30, 1
204	addis r31, r31, 0x1000 # move to next SR	204	addis r31, r31, 0x1000 # move to next SR
205		205
206	bdnz seg_fill_uspace	206	bdnz seg_fill_uspace
207		207
208	li r29, 8	208	li r29, 8
209	mtctr r29	209	mtctr r29
210	lis r30, 0x4000	210	lis r30, 0x4000 # priviledged access only
211	ori r30, r30, 8	211	ori r30, r30, 8 # ASID 0 (VSIDs 8 .. 15)
212		212
213	seg_fill_kernel:	213	seg_fill_kernel:
214		214
215	mtsrin r30, r31	215	mtsrin r30, r31
216	addi r30, r30, 1	216	addi r30, r30, 1
217	addis r31, r31, 0x1000 # move to next SR	217	addis r31, r31, 0x1000 # move to next SR
218		218
219	bdnz seg_fill_kernel	219	bdnz seg_fill_kernel
220		220
221	# invalidate block address translation registers	221	# invalidate block address translation registers
222		222
223	DEBUG_bat	223	DEBUG_bat
224		224
225	li r30, 0	225	li r30, 0
226		226
227	mtspr ibat0u, r30	227	mtspr ibat0u, r30
228	mtspr ibat0l, r30	228	mtspr ibat0l, r30
229		229
230	mtspr ibat1u, r30	230	mtspr ibat1u, r30
231	mtspr ibat1l, r30	231	mtspr ibat1l, r30
232		232
233	mtspr ibat2u, r30	233	mtspr ibat2u, r30
234	mtspr ibat2l, r30	234	mtspr ibat2l, r30
235		235
236	mtspr ibat3u, r30	236	mtspr ibat3u, r30
237	mtspr ibat3l, r30	237	mtspr ibat3l, r30
238		238
239	mtspr dbat0u, r30	239	mtspr dbat0u, r30
240	mtspr dbat0l, r30	240	mtspr dbat0l, r30
241		241
242	mtspr dbat1u, r30	242	mtspr dbat1u, r30
243	mtspr dbat1l, r30	243	mtspr dbat1l, r30
244		244
245	mtspr dbat2u, r30	245	mtspr dbat2u, r30
246	mtspr dbat2l, r30	246	mtspr dbat2l, r30
247		247
248	mtspr dbat3u, r30	248	mtspr dbat3u, r30
249	mtspr dbat3l, r30	249	mtspr dbat3l, r30
250		250
251	# create empty page hash table FIXME	251	# create empty page hash table FIXME
252		252
253	DEBUG_pht	253	DEBUG_pht
254		254
255	lis r31, 0x07ff	255	lis r31, 0x07ff
256	ori r31, r31, 0x0000	256	ori r31, r31, 0x0000
257		257
258	li r30, 0x4000	258	li r30, 0x4000
259	li r29, 0	259	li r29, 0
260		260
261	pht_clear:	261	pht_clear:
262		262
-		263	# write zeroes
-		264
263	stw r29, 0(r31)	265	stw r29, 0(r31)
264		266
265	addi r31, r31, 4	267	addi r31, r31, 4
266	subi r30, r30, 4	268	subi r30, r30, 4
267		269
268	cmpwi r30, 0	270	cmpwi r30, 0
269	beq clear_end	271	beq clear_end
270		272
271	bdnz pht_clear	273	bdnz pht_clear
272		274
273	DEBUG_end_pht_clear	275	DEBUG_end_pht_clear
274		276
275	clear_end:	277	clear_end:
276		278
277	lis r31, 0x07ff	279	lis r31, 0x07ff
278	ori r31, r31, 0x0000	280	ori r31, r31, 0x0000
279		281
280	mtsdr1 r31	282	mtsdr1 r31
281		283
282	# create identity mapping	-
283		-
284	#ifdef CONFIG_BAT	284	#ifdef CONFIG_BAT
285		285
-		286	# create BAT identity mapping
-		287
286	DEBUG_mapping	288	DEBUG_mapping
287		289
-		290	lwz r31, 0(r3)
-		291
-		292	lis r29, 0x0002
-		293	cmpw r31, r29
-		294	blt no_bat # less than 128 KB -> no BAT
-		295
-		296	li r29, 18
-		297	srw r31, r31, r29 # r31 = total >> 18
-		298
-		299	# create Block Length mask by replicating
288	# FIXME: map exactly the size of RAM	300	# the leading logical one 14 times
289		301
-		302	li r29, 14
-		303	mtctr r31
-		304	li r29, 1
-		305
-		306	bat_mask:
-		307	srw r30, r31, r29 # r30 = mask >> 1
-		308	or r31, r31, r30 # mask = mask \| r30
-		309
-		310	bdnz bat_mask
-		311
-		312	andi. r31, r31, 0x07ff # mask = mask & 0x07ff (BAT can map up to 256 MB)
-		313
-		314	li r29, 2
-		315	slw r31, r31, r29 # mask = mask << 2
-		316	ori r31, r31, 0x0002 # mask = mask \| 0x0002 (priviledged access only)
-		317
290	lis r31, 0x8000	318	lis r29, 0x8000
291	ori r31, r31, 0x0ffe	319	or r29, r29, r31
292		320
293	lis r30, 0x0000	321	lis r30, 0x0000
294	ori r30, r30, 0x0002	322	ori r30, r30, 0x0002
295		323
296	mtspr ibat0u, r31	324	mtspr ibat0u, r29
297	mtspr ibat0l, r30	325	mtspr ibat0l, r30
298		326
299	mtspr dbat0u, r31	327	mtspr dbat0u, r29
300	mtspr dbat0l, r30	328	mtspr dbat0l, r30
-		329
-		330	no_bat:
301		331
302	#endif	332	#endif
303		333
304	DEBUG_tlb	334	DEBUG_tlb
305		335
306	tlbia	336	tlbia
307	tlbsync	337	tlbsync
308		338
309	DEBUG_prepare	339	DEBUG_prepare
310		340
311	# start the kernel	341	# start the kernel
312	#	342	#
313	# pc = KERNEL_START_ADDR	343	# pc = KERNEL_START_ADDR
314	# r3 = bootinfo (pa)	344	# r3 = bootinfo (pa)
315	# sprg0 = KA2PA(KERNEL_START_ADDR)	345	# sprg0 = KA2PA(KERNEL_START_ADDR)
316	# sprg3 = physical memory size	346	# sprg3 = physical memory size
317	# sp = 0 (pa)	347	# sp = 0 (pa)
318		348
319	lis r31, KERNEL_START_ADDR@ha	349	lis r31, KERNEL_START_ADDR@ha
320	addi r31, r31, KERNEL_START_ADDR@l	350	addi r31, r31, KERNEL_START_ADDR@l
321		351
322	mtspr srr0, r31	352	mtspr srr0, r31
323		353
324	subis r31, r31, 0x8000	354	subis r31, r31, 0x8000
325	mtsprg0 r31	355	mtsprg0 r31
326		356
327	lwz r31, 0(r3)	357	lwz r31, 0(r3)
328	mtsprg3 r31	358	mtsprg3 r31
329		359
330	li sp, 0	360	li sp, 0
331		361
332	mfmsr r31	362	mfmsr r31
333	ori r31, r31, (msr_ir \| msr_dr)@l	363	ori r31, r31, (msr_ir \| msr_dr)@l
334	mtspr srr1, r31	364	mtspr srr1, r31
335		365
336	sync	366	sync
337	isync	367	isync
338		368
339	DEBUG_rfi	369	DEBUG_rfi
340	rfi	370	rfi
341		371
342	.align PAGE_WIDTH	372	.align PAGE_WIDTH
343	.global trans	373	.global trans
344	trans:	374	trans:
345	.space (TRANS_SIZE * TRANS_ITEM_SIZE)	375	.space (TRANS_SIZE * TRANS_ITEM_SIZE)
346		376

Subversion Repositories HelenOS-historic

(root)/boot/trunk/arch/ppc32/loader/asm.S – Rev 1732 → 1737