WebSVN – HelenOS-historic – Diff – /boot/trunk/arch/ppc32/loader/asm.S


#
# Copyright (C) 2006 Martin Decky
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# - Redistributions of source code must retain the above copyright
#   notice, this list of conditions and the following disclaimer.
# - Redistributions in binary form must reproduce the above copyright
#   notice, this list of conditions and the following disclaimer in the
#   documentation and/or other materials provided with the distribution.
# - The name of the author may not be used to endorse or promote products
#   derived from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
 
#include "asm.h"
#include "regname.h"
#include "debug.inc"
 
.text
 
.global halt
.global memcpy
.global jump_to_kernel
 
halt:
	b halt
 
memcpy:
	srwi. r7, r5, 3
	addi r6, r3, -4
	addi r4, r4, -4
	beq	2f
	
	andi. r0, r6, 3
	mtctr r7
	bne 5f
	
	1:
	
	lwz r7, 4(r4)
	lwzu r8, 8(r4)
	stw r7, 4(r6)
	stwu r8, 8(r6)
	bdnz 1b
	
	andi. r5, r5, 7
	
	2:
	
	cmplwi 0, r5, 4
	blt 3f
	
	lwzu r0, 4(r4)
	addi r5, r5, -4
	stwu r0, 4(r6)
	
	3:
	
	cmpwi 0, r5, 0
	beqlr
	mtctr r5
	addi r4, r4, 3
	addi r6, r6, 3
	
	4:
	
	lbzu r0, 1(r4)
	stbu r0, 1(r6)
	bdnz 4b
	blr
	
	5:
	
	subfic r0, r0, 4
	mtctr r0
	
	6:
	
	lbz r7, 4(r4)
	addi r4, r4, 1
	stb r7, 4(r6)
	addi r6, r6, 1
	bdnz 6b
	subf r5, r0, r5
	rlwinm. r7, r5, 32-3, 3, 31
	beq 2b
	mtctr r7
	b 1b
 
 
jump_to_kernel:
	
	# r3 = bootinfo (pa)
	# r4 = bootinfo_size
	# r5 = trans (pa)
	# r6 = bytes to copy
	# r7 = real_mode (pa)
	# r8 = framebuffer (pa)
	# r9 = scanline
	
	# disable interrupts
	
	mfmsr r31
	rlwinm r31, r31, 0, 17, 15
	mtmsr r31
	
	# set real_mode meeting point address
	
	mtspr srr0, r7
	
	# jumps to real_mode
	
	mfmsr r31
	lis r30, ~0@h
	ori r30, r30, ~(msr_ir | msr_dr | msr_ee)@l
	and r31, r31, r30
	mtspr srr1, r31
	
	sync
	isync
	rfi
 
.section REALMODE, "ax"
.align PAGE_WIDTH
.global real_mode
 
real_mode:
	
	DEBUG_INIT
	DEBUG_real_mode
	
	# copy kernel to proper location
	#
	# r5 = trans (pa)
	# r6 = bytes to copy
	# r8 = framebuffer (pa)
	# r9 = scanline
	
	li r31, PAGE_SIZE >> 2
	li r30, 0
	
	page_copy:
		
		cmpwi r6, 0
		beq copy_end
		
		# copy page
		
		mtctr r31
		lwz r29, 0(r5)
		
		DEBUG_INIT
		DEBUG_copy_loop
		
		copy_loop:
			
			lwz r28, 0(r29)
			stw r28, 0(r30)
			
			addi r29, r29, 4
			addi r30, r30, 4
			subi r6, r6, 4
			
			cmpwi r6, 0
			beq copy_end
			
			bdnz copy_loop
			
			DEBUG_end_copy_loop
		
		addi r5, r5, 4
		b page_copy
	
	copy_end:
	
	DEBUG_segments
	
	# initially fill segment registers
 
	li r31, 16
	mtctr r31
	li r31, 0
	li r30, 0x2000
 
	seg_fill:
	
		mtsrin r30, r31
		addi r30, r30, 0x111
		addis r31, r31, 0x1000    # move to next SR
		
		bdnz seg_fill
	
	# invalidate block address translation registers
	
	DEBUG_bat
	
	li r30, 0
	
	mtspr ibat0u, r30
	mtspr ibat0l, r30
	
	mtspr ibat1u, r30
	mtspr ibat1l, r30
	
	mtspr ibat2u, r30
	mtspr ibat2l, r30
	
	mtspr ibat3u, r30
	mtspr ibat3l, r30
	
	mtspr dbat0u, r30
	mtspr dbat0l, r30
	
	mtspr dbat1u, r30
	mtspr dbat1l, r30
	
	mtspr dbat2u, r30
	mtspr dbat2l, r30
	
	mtspr dbat3u, r30
	mtspr dbat3l, r30
	
	# create empty page hash table FIXME
	
	DEBUG_pht
	
	lis r31, 0x07ff
	ori r31, r31, 0x0000
	
	mtsdr1 r31
	
	# create identity mapping
	
	DEBUG_mapping
	
	# FIXME: map exactly the size of RAM
	
	lis r31, 0x8000
	ori r31, r31, 0x0ffe
	
	lis r30, 0x0000
	ori r30, r30, 0x0002
	
	mtspr ibat0u, r31
	mtspr ibat0l, r30
	
	mtspr dbat0u, r31
	mtspr dbat0l, r30
	
	DEBUG_tlb
	
	tlbia
	tlbsync
	
	DEBUG_prepare
	
	# start the kernel
	#
	# r3 = bootinfo (pa)
	
	lis r31, KERNEL_START_ADDR@ha
	addi r31, r31, KERNEL_START_ADDR@l
	
	mtspr srr0, r31
	
	mfmsr r31
	ori r31, r31, (msr_ir | msr_dr)@l
	mtspr srr1, r31
	
	sync
	isync
	
	DEBUG_rfi
	rfi
 
.align PAGE_WIDTH
.global trans
trans:
	.space (TRANS_SIZE * TRANS_ITEM_SIZE)
 

Rev 1479	Rev 1725
1	#	1	#
2	# Copyright (C) 2006 Martin Decky	2	# Copyright (C) 2006 Martin Decky
3	# All rights reserved.	3	# All rights reserved.
4	#	4	#
5	# Redistribution and use in source and binary forms, with or without	5	# Redistribution and use in source and binary forms, with or without
6	# modification, are permitted provided that the following conditions	6	# modification, are permitted provided that the following conditions
7	# are met:	7	# are met:
8	#	8	#
9	# - Redistributions of source code must retain the above copyright	9	# - Redistributions of source code must retain the above copyright
10	# notice, this list of conditions and the following disclaimer.	10	# notice, this list of conditions and the following disclaimer.
11	# - Redistributions in binary form must reproduce the above copyright	11	# - Redistributions in binary form must reproduce the above copyright
12	# notice, this list of conditions and the following disclaimer in the	12	# notice, this list of conditions and the following disclaimer in the
13	# documentation and/or other materials provided with the distribution.	13	# documentation and/or other materials provided with the distribution.
14	# - The name of the author may not be used to endorse or promote products	14	# - The name of the author may not be used to endorse or promote products
15	# derived from this software without specific prior written permission.	15	# derived from this software without specific prior written permission.
16	#	16	#
17	# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR	17	# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18	# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES	18	# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19	# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.	19	# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20	# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,	20	# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21	# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT	21	# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22	# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,	22	# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23	# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY	23	# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24	# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT	24	# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25	# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF	25	# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26	# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.	26	# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27	#	27	#
28		28
29	#include "asm.h"	29	#include "asm.h"
30	#include "regname.h"	30	#include "regname.h"
31	#include "debug.inc"	31	#include "debug.inc"
32		32
33	.text	33	.text
34		34
35	.global halt	35	.global halt
36	.global memcpy	36	.global memcpy
37	.global jump_to_kernel	37	.global jump_to_kernel
38		38
39	halt:	39	halt:
40	b halt	40	b halt
41		41
42	memcpy:	42	memcpy:
43	srwi. r7, r5, 3	43	srwi. r7, r5, 3
44	addi r6, r3, -4	44	addi r6, r3, -4
45	addi r4, r4, -4	45	addi r4, r4, -4
46	beq 2f	46	beq 2f
47		47
48	andi. r0, r6, 3	48	andi. r0, r6, 3
49	mtctr r7	49	mtctr r7
50	bne 5f	50	bne 5f
51		51
52	1:	52	1:
53		53
54	lwz r7, 4(r4)	54	lwz r7, 4(r4)
55	lwzu r8, 8(r4)	55	lwzu r8, 8(r4)
56	stw r7, 4(r6)	56	stw r7, 4(r6)
57	stwu r8, 8(r6)	57	stwu r8, 8(r6)
58	bdnz 1b	58	bdnz 1b
59		59
60	andi. r5, r5, 7	60	andi. r5, r5, 7
61		61
62	2:	62	2:
63		63
64	cmplwi 0, r5, 4	64	cmplwi 0, r5, 4
65	blt 3f	65	blt 3f
66		66
67	lwzu r0, 4(r4)	67	lwzu r0, 4(r4)
68	addi r5, r5, -4	68	addi r5, r5, -4
69	stwu r0, 4(r6)	69	stwu r0, 4(r6)
70		70
71	3:	71	3:
72		72
73	cmpwi 0, r5, 0	73	cmpwi 0, r5, 0
74	beqlr	74	beqlr
75	mtctr r5	75	mtctr r5
76	addi r4, r4, 3	76	addi r4, r4, 3
77	addi r6, r6, 3	77	addi r6, r6, 3
78		78
79	4:	79	4:
80		80
81	lbzu r0, 1(r4)	81	lbzu r0, 1(r4)
82	stbu r0, 1(r6)	82	stbu r0, 1(r6)
83	bdnz 4b	83	bdnz 4b
84	blr	84	blr
85		85
86	5:	86	5:
87		87
88	subfic r0, r0, 4	88	subfic r0, r0, 4
89	mtctr r0	89	mtctr r0
90		90
91	6:	91	6:
92		92
93	lbz r7, 4(r4)	93	lbz r7, 4(r4)
94	addi r4, r4, 1	94	addi r4, r4, 1
95	stb r7, 4(r6)	95	stb r7, 4(r6)
96	addi r6, r6, 1	96	addi r6, r6, 1
97	bdnz 6b	97	bdnz 6b
98	subf r5, r0, r5	98	subf r5, r0, r5
99	rlwinm. r7, r5, 32-3, 3, 31	99	rlwinm. r7, r5, 32-3, 3, 31
100	beq 2b	100	beq 2b
101	mtctr r7	101	mtctr r7
102	b 1b	102	b 1b
103		103
104		104
105	jump_to_kernel:	105	jump_to_kernel:
106		106
107	# r3 = bootinfo (pa)	107	# r3 = bootinfo (pa)
108	# r4 = bootinfo_size	108	# r4 = bootinfo_size
109	# r5 = trans (pa)	109	# r5 = trans (pa)
110	# r6 = bytes to copy	110	# r6 = bytes to copy
111	# r7 = real_mode (pa)	111	# r7 = real_mode (pa)
112	# r8 = framebuffer (pa)	112	# r8 = framebuffer (pa)
113	# r9 = scanline	113	# r9 = scanline
114		114
115	# disable interrupts	115	# disable interrupts
116		116
117	mfmsr r31	117	mfmsr r31
118	rlwinm r31, r31, 0, 17, 15	118	rlwinm r31, r31, 0, 17, 15
119	mtmsr r31	119	mtmsr r31
120		120
121	# set real_mode meeting point address	121	# set real_mode meeting point address
122		122
123	mtspr srr0, r7	123	mtspr srr0, r7
124		124
125	# jumps to real_mode	125	# jumps to real_mode
126		126
127	mfmsr r31	127	mfmsr r31
128	lis r30, ~0@h	128	lis r30, ~0@h
129	ori r30, r30, ~(msr_ir \| msr_dr \| msr_ee)@l	129	ori r30, r30, ~(msr_ir \| msr_dr \| msr_ee)@l
130	and r31, r31, r30	130	and r31, r31, r30
131	mtspr srr1, r31	131	mtspr srr1, r31
132		132
133	sync	133	sync
134	isync	134	isync
135	rfi	135	rfi
136		136
137	.section REALMODE, "ax"	137	.section REALMODE, "ax"
138	.align PAGE_WIDTH	138	.align PAGE_WIDTH
139	.global real_mode	139	.global real_mode
140		140
141	real_mode:	141	real_mode:
142		142
143	DEBUG_INIT	143	DEBUG_INIT
144	DEBUG_real_mode	144	DEBUG_real_mode
145		145
146	# copy kernel to proper location	146	# copy kernel to proper location
147	#	147	#
148	# r5 = trans (pa)	148	# r5 = trans (pa)
149	# r6 = bytes to copy	149	# r6 = bytes to copy
150	# r8 = framebuffer (pa)	150	# r8 = framebuffer (pa)
151	# r9 = scanline	151	# r9 = scanline
152		152
153	li r31, PAGE_SIZE >> 2	153	li r31, PAGE_SIZE >> 2
154	li r30, 0	154	li r30, 0
155		155
156	page_copy:	156	page_copy:
157		157
158	cmpwi r6, 0	158	cmpwi r6, 0
159	beq copy_end	159	beq copy_end
160		160
161	# copy page	161	# copy page
162		162
163	mtctr r31	163	mtctr r31
164	lwz r29, 0(r5)	164	lwz r29, 0(r5)
165		165
166	DEBUG_INIT	166	DEBUG_INIT
167	DEBUG_copy_loop	167	DEBUG_copy_loop
168		168
169	copy_loop:	169	copy_loop:
170		170
171	lwz r28, 0(r29)	171	lwz r28, 0(r29)
172	stw r28, 0(r30)	172	stw r28, 0(r30)
173		173
174	addi r29, r29, 4	174	addi r29, r29, 4
175	addi r30, r30, 4	175	addi r30, r30, 4
176	subi r6, r6, 4	176	subi r6, r6, 4
177		177
178	cmpwi r6, 0	178	cmpwi r6, 0
179	beq copy_end	179	beq copy_end
180		180
181	bdnz copy_loop	181	bdnz copy_loop
182		182
183	DEBUG_end_copy_loop	183	DEBUG_end_copy_loop
184		184
185	addi r5, r5, 4	185	addi r5, r5, 4
186	b page_copy	186	b page_copy
187		187
188	copy_end:	188	copy_end:
189		189
190	DEBUG_segments	190	DEBUG_segments
191		191
192	# initially fill segment registers	192	# initially fill segment registers
193		193
194	li r31, 16	194	li r31, 16
195	mtctr r31	195	mtctr r31
196	li r31, 0	196	li r31, 0
197	li r30, 0x2000	197	li r30, 0x2000
198		198
199	seg_fill:	199	seg_fill:
200		200
201	mtsrin r30, r31	201	mtsrin r30, r31
202	addi r30, r30, 0x111	202	addi r30, r30, 0x111
203	addis r31, r31, 0x1000 # move to next SR	203	addis r31, r31, 0x1000 # move to next SR
204		204
205	bdnz seg_fill	205	bdnz seg_fill
206		206
207	# invalidate block address translation registers	207	# invalidate block address translation registers
208		208
209	DEBUG_bat	209	DEBUG_bat
210		210
211	li r30, 0	211	li r30, 0
212		212
213	mtspr ibat0u, r30	213	mtspr ibat0u, r30
214	mtspr ibat0l, r30	214	mtspr ibat0l, r30
215		215
216	mtspr ibat1u, r30	216	mtspr ibat1u, r30
217	mtspr ibat1l, r30	217	mtspr ibat1l, r30
218		218
219	mtspr ibat2u, r30	219	mtspr ibat2u, r30
220	mtspr ibat2l, r30	220	mtspr ibat2l, r30
221		221
222	mtspr ibat3u, r30	222	mtspr ibat3u, r30
223	mtspr ibat3l, r30	223	mtspr ibat3l, r30
224		224
225	mtspr dbat0u, r30	225	mtspr dbat0u, r30
226	mtspr dbat0l, r30	226	mtspr dbat0l, r30
227		227
228	mtspr dbat1u, r30	228	mtspr dbat1u, r30
229	mtspr dbat1l, r30	229	mtspr dbat1l, r30
230		230
231	mtspr dbat2u, r30	231	mtspr dbat2u, r30
232	mtspr dbat2l, r30	232	mtspr dbat2l, r30
233		233
234	mtspr dbat3u, r30	234	mtspr dbat3u, r30
235	mtspr dbat3l, r30	235	mtspr dbat3l, r30
236		236
-		237	# create empty page hash table FIXME
-		238
-		239	DEBUG_pht
-		240
-		241	lis r31, 0x07ff
-		242	ori r31, r31, 0x0000
-		243
-		244	mtsdr1 r31
-		245
237	# create identity mapping	246	# create identity mapping
238		247
239	DEBUG_mapping	248	DEBUG_mapping
240		249
241	# FIXME: map exactly the size of RAM	250	# FIXME: map exactly the size of RAM
242		251
243	lis r31, 0x8000	252	lis r31, 0x8000
244	ori r31, r31, 0x0ffe	253	ori r31, r31, 0x0ffe
245		254
246	lis r30, 0x0000	255	lis r30, 0x0000
247	ori r30, r30, 0x0002	256	ori r30, r30, 0x0002
248		257
249	mtspr ibat0u, r31	258	mtspr ibat0u, r31
250	mtspr ibat0l, r30	259	mtspr ibat0l, r30
251		260
252	mtspr dbat0u, r31	261	mtspr dbat0u, r31
253	mtspr dbat0l, r30	262	mtspr dbat0l, r30
254		263
255	DEBUG_tlb	264	DEBUG_tlb
256		265
257	tlbia	266	tlbia
258	tlbsync	267	tlbsync
259		268
260	DEBUG_prepare	269	DEBUG_prepare
261		270
262	# start the kernel	271	# start the kernel
263	#	272	#
264	# r3 = bootinfo (pa)	273	# r3 = bootinfo (pa)
265		274
266	lis r31, KERNEL_START_ADDR@ha	275	lis r31, KERNEL_START_ADDR@ha
267	addi r31, r31, KERNEL_START_ADDR@l	276	addi r31, r31, KERNEL_START_ADDR@l
268		277
269	mtspr srr0, r31	278	mtspr srr0, r31
270		279
271	mfmsr r31	280	mfmsr r31
272	ori r31, r31, (msr_ir \| msr_dr)@l	281	ori r31, r31, (msr_ir \| msr_dr)@l
273	mtspr srr1, r31	282	mtspr srr1, r31
274		283
275	sync	284	sync
276	isync	285	isync
277		286
278	DEBUG_rfi	287	DEBUG_rfi
279	rfi	288	rfi
280		289
281	.align PAGE_WIDTH	290	.align PAGE_WIDTH
282	.global trans	291	.global trans
283	trans:	292	trans:
284	.space (TRANS_SIZE * TRANS_ITEM_SIZE)	293	.space (TRANS_SIZE * TRANS_ITEM_SIZE)
285		294

Subversion Repositories HelenOS-historic

(root)/boot/trunk/arch/ppc32/loader/asm.S – Rev 1479 → 1725