Subversion Repositories HelenOS-historic

Rev

Rev 1478 | Rev 1725 | Go to most recent revision | Only display areas with differences | Ignore whitespace | Details | Blame | Last modification | View Log | RSS feed

Rev 1478 Rev 1479
1
#
1
#
2
# Copyright (C) 2006 Martin Decky
2
# Copyright (C) 2006 Martin Decky
3
# All rights reserved.
3
# All rights reserved.
4
#
4
#
5
# Redistribution and use in source and binary forms, with or without
5
# Redistribution and use in source and binary forms, with or without
6
# modification, are permitted provided that the following conditions
6
# modification, are permitted provided that the following conditions
7
# are met:
7
# are met:
8
#
8
#
9
# - Redistributions of source code must retain the above copyright
9
# - Redistributions of source code must retain the above copyright
10
#   notice, this list of conditions and the following disclaimer.
10
#   notice, this list of conditions and the following disclaimer.
11
# - Redistributions in binary form must reproduce the above copyright
11
# - Redistributions in binary form must reproduce the above copyright
12
#   notice, this list of conditions and the following disclaimer in the
12
#   notice, this list of conditions and the following disclaimer in the
13
#   documentation and/or other materials provided with the distribution.
13
#   documentation and/or other materials provided with the distribution.
14
# - The name of the author may not be used to endorse or promote products
14
# - The name of the author may not be used to endorse or promote products
15
#   derived from this software without specific prior written permission.
15
#   derived from this software without specific prior written permission.
16
#
16
#
17
# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17
# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18
# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18
# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19
# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19
# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20
# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20
# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
21
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22
# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
22
# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
23
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
24
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
25
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26
# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26
# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27
#
27
#
28
 
28
 
29
#include "asm.h"
29
#include "asm.h"
30
#include "regname.h"
30
#include "regname.h"
31
#include "debug.inc"
31
#include "debug.inc"
32
 
32
 
33
.text
33
.text
34
 
34
 
35
.global halt
35
.global halt
36
.global memcpy
36
.global memcpy
37
.global jump_to_kernel
37
.global jump_to_kernel
38
 
38
 
39
halt:
39
halt:
40
	b halt
40
	b halt
41
 
41
 
42
memcpy:
42
memcpy:
43
	srwi. r7, r5, 3
43
	srwi. r7, r5, 3
44
	addi r6, r3, -4
44
	addi r6, r3, -4
45
	addi r4, r4, -4
45
	addi r4, r4, -4
46
	beq	2f
46
	beq	2f
47
	
47
	
48
	andi. r0, r6, 3
48
	andi. r0, r6, 3
49
	mtctr r7
49
	mtctr r7
50
	bne 5f
50
	bne 5f
51
	
51
	
52
	1:
52
	1:
53
	
53
	
54
	lwz r7, 4(r4)
54
	lwz r7, 4(r4)
55
	lwzu r8, 8(r4)
55
	lwzu r8, 8(r4)
56
	stw r7, 4(r6)
56
	stw r7, 4(r6)
57
	stwu r8, 8(r6)
57
	stwu r8, 8(r6)
58
	bdnz 1b
58
	bdnz 1b
59
	
59
	
60
	andi. r5, r5, 7
60
	andi. r5, r5, 7
61
	
61
	
62
	2:
62
	2:
63
	
63
	
64
	cmplwi 0, r5, 4
64
	cmplwi 0, r5, 4
65
	blt 3f
65
	blt 3f
66
	
66
	
67
	lwzu r0, 4(r4)
67
	lwzu r0, 4(r4)
68
	addi r5, r5, -4
68
	addi r5, r5, -4
69
	stwu r0, 4(r6)
69
	stwu r0, 4(r6)
70
	
70
	
71
	3:
71
	3:
72
	
72
	
73
	cmpwi 0, r5, 0
73
	cmpwi 0, r5, 0
74
	beqlr
74
	beqlr
75
	mtctr r5
75
	mtctr r5
76
	addi r4, r4, 3
76
	addi r4, r4, 3
77
	addi r6, r6, 3
77
	addi r6, r6, 3
78
	
78
	
79
	4:
79
	4:
80
	
80
	
81
	lbzu r0, 1(r4)
81
	lbzu r0, 1(r4)
82
	stbu r0, 1(r6)
82
	stbu r0, 1(r6)
83
	bdnz 4b
83
	bdnz 4b
84
	blr
84
	blr
85
	
85
	
86
	5:
86
	5:
87
	
87
	
88
	subfic r0, r0, 4
88
	subfic r0, r0, 4
89
	mtctr r0
89
	mtctr r0
90
	
90
	
91
	6:
91
	6:
92
	
92
	
93
	lbz r7, 4(r4)
93
	lbz r7, 4(r4)
94
	addi r4, r4, 1
94
	addi r4, r4, 1
95
	stb r7, 4(r6)
95
	stb r7, 4(r6)
96
	addi r6, r6, 1
96
	addi r6, r6, 1
97
	bdnz 6b
97
	bdnz 6b
98
	subf r5, r0, r5
98
	subf r5, r0, r5
99
	rlwinm. r7, r5, 32-3, 3, 31
99
	rlwinm. r7, r5, 32-3, 3, 31
100
	beq 2b
100
	beq 2b
101
	mtctr r7
101
	mtctr r7
102
	b 1b
102
	b 1b
103
 
103
 
104
 
104
 
105
jump_to_kernel:
105
jump_to_kernel:
106
	
106
	
107
	# r3 = bootinfo (pa)
107
	# r3 = bootinfo (pa)
108
	# r4 = bootinfo_size
108
	# r4 = bootinfo_size
109
	# r5 = trans (pa)
109
	# r5 = trans (pa)
110
	# r6 = bytes to copy
110
	# r6 = bytes to copy
111
	# r7 = real_mode (pa)
111
	# r7 = real_mode (pa)
112
	# r8 = framebuffer (pa)
112
	# r8 = framebuffer (pa)
113
	# r9 = scanline
113
	# r9 = scanline
114
	
114
	
115
	# disable interrupts
115
	# disable interrupts
116
	
116
	
117
	mfmsr r31
117
	mfmsr r31
118
	rlwinm r31, r31, 0, 17, 15
118
	rlwinm r31, r31, 0, 17, 15
119
	mtmsr r31
119
	mtmsr r31
120
	
120
	
121
	# set real_mode meeting point address
121
	# set real_mode meeting point address
122
	
122
	
123
	mtspr srr0, r7
123
	mtspr srr0, r7
124
	
124
	
125
	# jumps to real_mode
125
	# jumps to real_mode
126
	
126
	
127
	mfmsr r31
127
	mfmsr r31
128
	lis r30, ~0@h
128
	lis r30, ~0@h
129
	ori r30, r30, ~(msr_ir | msr_dr | msr_ee)@l
129
	ori r30, r30, ~(msr_ir | msr_dr | msr_ee)@l
130
	and r31, r31, r30
130
	and r31, r31, r30
131
	mtspr srr1, r31
131
	mtspr srr1, r31
132
	
132
	
133
	sync
133
	sync
134
	isync
134
	isync
135
	rfi
135
	rfi
136
 
136
 
137
.section REALMODE, "ax"
137
.section REALMODE, "ax"
138
.align PAGE_WIDTH
138
.align PAGE_WIDTH
139
.global real_mode
139
.global real_mode
140
 
140
 
141
real_mode:
141
real_mode:
142
 
142
	
-
 
143
	DEBUG_INIT
143
	DEBUG_real_mode
144
	DEBUG_real_mode
144
	
145
	
145
	# copy kernel to proper location
146
	# copy kernel to proper location
146
	#
147
	#
147
	# r5 = trans (pa)
148
	# r5 = trans (pa)
148
	# r6 = bytes to copy
149
	# r6 = bytes to copy
149
	# r8 = framebuffer (pa)
150
	# r8 = framebuffer (pa)
150
	# r9 = scanline
151
	# r9 = scanline
151
	
152
	
152
	li r31, PAGE_SIZE >> 2
153
	li r31, PAGE_SIZE >> 2
153
	li r30, 0
154
	li r30, 0
154
	
155
	
155
	page_copy:
156
	page_copy:
156
		
157
		
157
		cmpwi r6, 0
158
		cmpwi r6, 0
158
		beq copy_end
159
		beq copy_end
159
		
160
		
160
		# copy page
161
		# copy page
161
		
162
		
162
		mtctr r31
163
		mtctr r31
163
		lwz r29, 0(r5)
164
		lwz r29, 0(r5)
164
		
165
		
-
 
166
		DEBUG_INIT
-
 
167
		DEBUG_copy_loop
-
 
168
		
165
		copy_loop:
169
		copy_loop:
166
			
170
			
167
			lwz r28, 0(r29)
171
			lwz r28, 0(r29)
168
			stw r28, 0(r30)
172
			stw r28, 0(r30)
169
			
173
			
170
			addi r29, r29, 4
174
			addi r29, r29, 4
171
			addi r30, r30, 4
175
			addi r30, r30, 4
172
			subi r6, r6, 4
176
			subi r6, r6, 4
173
			
177
			
174
			cmpwi r6, 0
178
			cmpwi r6, 0
175
			beq copy_end
179
			beq copy_end
176
			
180
			
177
			bdnz copy_loop
181
			bdnz copy_loop
-
 
182
			
-
 
183
			DEBUG_end_copy_loop
178
		
184
		
179
		addi r5, r5, 4
185
		addi r5, r5, 4
180
		b page_copy
186
		b page_copy
181
	
187
	
182
	copy_end:
188
	copy_end:
183
	
189
	
-
 
190
	DEBUG_segments
-
 
191
	
184
	# initially fill segment registers
192
	# initially fill segment registers
185
 
193
 
186
	li r31, 16
194
	li r31, 16
187
	mtctr r31
195
	mtctr r31
188
	li r31, 0
196
	li r31, 0
189
	li r30, 0x2000
197
	li r30, 0x2000
190
 
198
 
191
	seg_fill:
199
	seg_fill:
192
	
200
	
193
		mtsrin r30, r31
201
		mtsrin r30, r31
194
		addi r30, r30, 0x111
202
		addi r30, r30, 0x111
195
		addis r31, r31, 0x1000    # move to next SR
203
		addis r31, r31, 0x1000    # move to next SR
196
		
204
		
197
		bdnz seg_fill
205
		bdnz seg_fill
198
	
206
	
199
	# invalidate block address translation registers
207
	# invalidate block address translation registers
200
	
208
	
-
 
209
	DEBUG_bat
-
 
210
	
201
	li r30, 0
211
	li r30, 0
202
	
212
	
203
	mtspr ibat0u, r30
213
	mtspr ibat0u, r30
204
	mtspr ibat0l, r30
214
	mtspr ibat0l, r30
205
	
215
	
206
	mtspr ibat1u, r30
216
	mtspr ibat1u, r30
207
	mtspr ibat1l, r30
217
	mtspr ibat1l, r30
208
	
218
	
209
	mtspr ibat2u, r30
219
	mtspr ibat2u, r30
210
	mtspr ibat2l, r30
220
	mtspr ibat2l, r30
211
	
221
	
212
	mtspr ibat3u, r30
222
	mtspr ibat3u, r30
213
	mtspr ibat3l, r30
223
	mtspr ibat3l, r30
214
	
224
	
215
	mtspr dbat0u, r30
225
	mtspr dbat0u, r30
216
	mtspr dbat0l, r30
226
	mtspr dbat0l, r30
217
	
227
	
218
	mtspr dbat1u, r30
228
	mtspr dbat1u, r30
219
	mtspr dbat1l, r30
229
	mtspr dbat1l, r30
220
	
230
	
221
	mtspr dbat2u, r30
231
	mtspr dbat2u, r30
222
	mtspr dbat2l, r30
232
	mtspr dbat2l, r30
223
	
233
	
224
	mtspr dbat3u, r30
234
	mtspr dbat3u, r30
225
	mtspr dbat3l, r30
235
	mtspr dbat3l, r30
226
	
236
	
227
	# create identity mapping
237
	# create identity mapping
228
	
238
	
-
 
239
	DEBUG_mapping
-
 
240
	
229
	# FIXME: map exactly the size of RAM
241
	# FIXME: map exactly the size of RAM
230
	
242
	
231
	lis r31, 0x8000
243
	lis r31, 0x8000
232
	ori r31, r31, 0x0ffe
244
	ori r31, r31, 0x0ffe
233
	
245
	
234
	lis r30, 0x0000
246
	lis r30, 0x0000
235
	ori r30, r30, 0x0002
247
	ori r30, r30, 0x0002
236
	
248
	
237
	mtspr ibat0u, r31
249
	mtspr ibat0u, r31
238
	mtspr ibat0l, r30
250
	mtspr ibat0l, r30
239
	
251
	
240
	mtspr dbat0u, r31
252
	mtspr dbat0u, r31
241
	mtspr dbat0l, r30
253
	mtspr dbat0l, r30
242
	
254
	
-
 
255
	DEBUG_tlb
-
 
256
	
243
	tlbia
257
	tlbia
244
	tlbsync
258
	tlbsync
245
	
259
	
-
 
260
	DEBUG_prepare
-
 
261
	
246
	# start the kernel
262
	# start the kernel
247
	#
263
	#
248
	# r3 = bootinfo (pa)
264
	# r3 = bootinfo (pa)
249
	
265
	
250
	lis r31, KERNEL_START_ADDR@ha
266
	lis r31, KERNEL_START_ADDR@ha
251
	addi r31, r31, KERNEL_START_ADDR@l
267
	addi r31, r31, KERNEL_START_ADDR@l
252
	
268
	
253
	mtspr srr0, r31
269
	mtspr srr0, r31
254
	
270
	
255
	mfmsr r31
271
	mfmsr r31
256
	ori r31, r31, (msr_ir | msr_dr)@l
272
	ori r31, r31, (msr_ir | msr_dr)@l
257
	mtspr srr1, r31
273
	mtspr srr1, r31
258
	
274
	
259
	sync
275
	sync
260
	isync
276
	isync
261
	
277
	
262
	DEBUG_rfi
278
	DEBUG_rfi
263
	rfi
279
	rfi
264
 
280
 
265
.align PAGE_WIDTH
281
.align PAGE_WIDTH
266
.global trans
282
.global trans
267
trans:
283
trans:
268
	.space (TRANS_SIZE * TRANS_ITEM_SIZE)
284
	.space (TRANS_SIZE * TRANS_ITEM_SIZE)
269
 
285