WebSVN – HelenOS-historic – Diff – /boot/trunk/arch/ppc32/loader/asm.S


#
# Copyright (C) 2006 Martin Decky
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# - Redistributions of source code must retain the above copyright
#   notice, this list of conditions and the following disclaimer.
# - Redistributions in binary form must reproduce the above copyright
#   notice, this list of conditions and the following disclaimer in the
#   documentation and/or other materials provided with the distribution.
# - The name of the author may not be used to endorse or promote products
#   derived from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
 
#include "asm.h"
#include "regname.h"
 
.text
 
.global halt
.global memcpy
.global jump_to_kernel
 
halt:
	b halt
 
memcpy:
	srwi. r7, r5, 3
	addi r6, r3, -4
	addi r4, r4, -4
	beq	2f
	
	andi. r0, r6, 3
	mtctr r7
	bne 5f
	
	1:
	
	lwz r7, 4(r4)
	lwzu r8, 8(r4)
	stw r7, 4(r6)
	stwu r8, 8(r6)
	bdnz 1b
	
	andi. r5, r5, 7
	
	2:
	
	cmplwi 0, r5, 4
	blt 3f
	
	lwzu r0, 4(r4)
	addi r5, r5, -4
	stwu r0, 4(r6)
	
	3:
	
	cmpwi 0, r5, 0
	beqlr
	mtctr r5
	addi r4, r4, 3
	addi r6, r6, 3
	
	4:
	
	lbzu r0, 1(r4)
	stbu r0, 1(r6)
	bdnz 4b
	blr
	
	5:
	
	subfic r0, r0, 4
	mtctr r0
	
	6:
	
	lbz r7, 4(r4)
	addi r4, r4, 1
	stb r7, 4(r6)
	addi r6, r6, 1
	bdnz 6b
	subf r5, r0, r5
	rlwinm. r7, r5, 32-3, 3, 31
	beq 2b
	mtctr r7
	b 1b
 
 
jump_to_kernel:
	
	# r3 = bootinfo (pa)
	# r4 = bootinfo_size
	# r5 = trans (pa)
	# r6 = bytes to copy
 
	# r7 = real_mode (pa)
	
	# disable interrupts
	
	mfmsr r31
	rlwinm r31, r31, 0, 17, 15
	mtmsr r31
	
	# set real_mode meeting point address
	
	mtspr srr0, r7
	
	# jumps to real_mode
	
	mfmsr r31
	lis r30, ~0@h
	ori r30, r30, ~(msr_ir | msr_dr)@l
	and r31, r31, r30
	mtspr srr1, r31
	
	sync
	isync
	rfi
 
.section REALMODE, "ax"
.align PAGE_WIDTH
.global real_mode
 
real_mode:
	
	# copy kernel to proper location
	#
	# r5 = trans (pa)
	# r6 = bytes to copy
 
	
	li r31, PAGE_SIZE >> 2
	li r30, 0
	
	page_copy:
		
		cmpwi r6, 0
		beq copy_end
		
		# copy page
		
		mtctr r31
		lwz r29, 0(r5)
		
		copy_loop:
			
			lwz r28, 0(r29)
			stw r28, 0(r30)
			
			addi r29, r29, 4
			addi r30, r30, 4
			subi r6, r6, 4
			
			cmpwi r6, 0
			beq copy_end
			
			bdnz copy_loop
		
		addi r5, r5, 4
		b page_copy
	
	copy_end:
	
	# initially fill segment registers
 
	li r31, 16
	mtctr r31
	li r31, 0
	li r30, 0x2000
 
	seg_fill:
	
		mtsrin r30, r31
		addi r30, r30, 0x111
		addis r31, r31, 0x1000    # move to next SR
		
		bdnz seg_fill
	
	# invalidate block address translation registers
	
	mtspr ibat0u, r30
	mtspr ibat0l, r30
	
	mtspr ibat1u, r30
	mtspr ibat1l, r30
	
	mtspr ibat2u, r30
	mtspr ibat2l, r30
	
	mtspr ibat3u, r30
	mtspr ibat3l, r30
	
	mtspr dbat0u, r30
	mtspr dbat0l, r30
	
	mtspr dbat1u, r30
	mtspr dbat1l, r30
	
	mtspr dbat2u, r30
	mtspr dbat2l, r30
	
	mtspr dbat3u, r30
	mtspr dbat3l, r30
	
	# create identity mapping
	
	# FIXME: map exactly the size of RAM
	
	lis r31, 0x8000
	ori r31, r31, 0x0ffe
	
	lis r30, 0x0000
	ori r30, r30, 0x0002
	
	mtspr ibat0u, r31
	mtspr ibat0l, r30
	
	mtspr dbat0u, r31
	mtspr dbat0l, r30
	
 
 
 
 
 
 
 
 
 
 
 
	tlbia
	
	# start the kernel
	#
	# r3 = bootinfo (pa)
	
	lis r31, KERNEL_START_ADDR@ha
	addi r31, r31, KERNEL_START_ADDR@l
	
	mtspr srr0, r31
	
	mfmsr r31
	ori r31, r31, (msr_ir | msr_dr)@l
	mtspr srr1, r31
	
	sync
	isync
	rfi
 
.align PAGE_WIDTH
.global trans
trans:
	.space (TRANS_SIZE * TRANS_ITEM_SIZE)
 

Rev 1216	Rev 1372
1	#	1	#
2	# Copyright (C) 2006 Martin Decky	2	# Copyright (C) 2006 Martin Decky
3	# All rights reserved.	3	# All rights reserved.
4	#	4	#
5	# Redistribution and use in source and binary forms, with or without	5	# Redistribution and use in source and binary forms, with or without
6	# modification, are permitted provided that the following conditions	6	# modification, are permitted provided that the following conditions
7	# are met:	7	# are met:
8	#	8	#
9	# - Redistributions of source code must retain the above copyright	9	# - Redistributions of source code must retain the above copyright
10	# notice, this list of conditions and the following disclaimer.	10	# notice, this list of conditions and the following disclaimer.
11	# - Redistributions in binary form must reproduce the above copyright	11	# - Redistributions in binary form must reproduce the above copyright
12	# notice, this list of conditions and the following disclaimer in the	12	# notice, this list of conditions and the following disclaimer in the
13	# documentation and/or other materials provided with the distribution.	13	# documentation and/or other materials provided with the distribution.
14	# - The name of the author may not be used to endorse or promote products	14	# - The name of the author may not be used to endorse or promote products
15	# derived from this software without specific prior written permission.	15	# derived from this software without specific prior written permission.
16	#	16	#
17	# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR	17	# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18	# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES	18	# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19	# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.	19	# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20	# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,	20	# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21	# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT	21	# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22	# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,	22	# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23	# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY	23	# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24	# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT	24	# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25	# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF	25	# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26	# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.	26	# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27	#	27	#
28		28
29	#include "asm.h"	29	#include "asm.h"
30	#include "regname.h"	30	#include "regname.h"
31		31
32	.text	32	.text
33		33
34	.global halt	34	.global halt
35	.global memcpy	35	.global memcpy
36	.global jump_to_kernel	36	.global jump_to_kernel
37		37
38	halt:	38	halt:
39	b halt	39	b halt
40		40
41	memcpy:	41	memcpy:
42	srwi. r7, r5, 3	42	srwi. r7, r5, 3
43	addi r6, r3, -4	43	addi r6, r3, -4
44	addi r4, r4, -4	44	addi r4, r4, -4
45	beq 2f	45	beq 2f
46		46
47	andi. r0, r6, 3	47	andi. r0, r6, 3
48	mtctr r7	48	mtctr r7
49	bne 5f	49	bne 5f
50		50
51	1:	51	1:
52		52
53	lwz r7, 4(r4)	53	lwz r7, 4(r4)
54	lwzu r8, 8(r4)	54	lwzu r8, 8(r4)
55	stw r7, 4(r6)	55	stw r7, 4(r6)
56	stwu r8, 8(r6)	56	stwu r8, 8(r6)
57	bdnz 1b	57	bdnz 1b
58		58
59	andi. r5, r5, 7	59	andi. r5, r5, 7
60		60
61	2:	61	2:
62		62
63	cmplwi 0, r5, 4	63	cmplwi 0, r5, 4
64	blt 3f	64	blt 3f
65		65
66	lwzu r0, 4(r4)	66	lwzu r0, 4(r4)
67	addi r5, r5, -4	67	addi r5, r5, -4
68	stwu r0, 4(r6)	68	stwu r0, 4(r6)
69		69
70	3:	70	3:
71		71
72	cmpwi 0, r5, 0	72	cmpwi 0, r5, 0
73	beqlr	73	beqlr
74	mtctr r5	74	mtctr r5
75	addi r4, r4, 3	75	addi r4, r4, 3
76	addi r6, r6, 3	76	addi r6, r6, 3
77		77
78	4:	78	4:
79		79
80	lbzu r0, 1(r4)	80	lbzu r0, 1(r4)
81	stbu r0, 1(r6)	81	stbu r0, 1(r6)
82	bdnz 4b	82	bdnz 4b
83	blr	83	blr
84		84
85	5:	85	5:
86		86
87	subfic r0, r0, 4	87	subfic r0, r0, 4
88	mtctr r0	88	mtctr r0
89		89
90	6:	90	6:
91		91
92	lbz r7, 4(r4)	92	lbz r7, 4(r4)
93	addi r4, r4, 1	93	addi r4, r4, 1
94	stb r7, 4(r6)	94	stb r7, 4(r6)
95	addi r6, r6, 1	95	addi r6, r6, 1
96	bdnz 6b	96	bdnz 6b
97	subf r5, r0, r5	97	subf r5, r0, r5
98	rlwinm. r7, r5, 32-3, 3, 31	98	rlwinm. r7, r5, 32-3, 3, 31
99	beq 2b	99	beq 2b
100	mtctr r7	100	mtctr r7
101	b 1b	101	b 1b
102		102
103		103
104	jump_to_kernel:	104	jump_to_kernel:
105		105
106	# r3 = bootinfo (pa)	106	# r3 = bootinfo (pa)
107	# r4 = bootinfo_size	107	# r4 = bootinfo_size
108	# r5 = trans (pa)	108	# r5 = trans (pa)
109	# r6 = kernel size	109	# r6 = bytes to copy
110	# r7 = framebuffer (pa)	-
111	# r8 = real_mode (pa)	110	# r7 = real_mode (pa)
112		111
113	# disable interrupts	112	# disable interrupts
114		113
115	mfmsr r31	114	mfmsr r31
116	rlwinm r31, r31, 0, 17, 15	115	rlwinm r31, r31, 0, 17, 15
117	mtmsr r31	116	mtmsr r31
118		117
119	# set real_mode meeting point address	118	# set real_mode meeting point address
120		119
121	mtspr srr0, r8	120	mtspr srr0, r7
122		121
123	# jumps to real_mode	122	# jumps to real_mode
124		123
125	mfmsr r31	124	mfmsr r31
126	lis r30, ~0@h	125	lis r30, ~0@h
127	ori r30, r30, ~(msr_ir \| msr_dr)@l	126	ori r30, r30, ~(msr_ir \| msr_dr)@l
128	and r31, r31, r30	127	and r31, r31, r30
129	mtspr srr1, r31	128	mtspr srr1, r31
130		129
131	sync	130	sync
132	isync	131	isync
133	rfi	132	rfi
134		133
135	.section REALMODE, "ax"	134	.section REALMODE, "ax"
136	.align PAGE_WIDTH	135	.align PAGE_WIDTH
137	.global real_mode	136	.global real_mode
138		137
139	real_mode:	138	real_mode:
140		139
141	# copy kernel to proper location	140	# copy kernel to proper location
142	#	141	#
143	# r5 = trans (pa)	142	# r5 = trans (pa)
144	# r6 = kernel size	143	# r6 = bytes to copy
145	# r7 = framebuffer (pa)	-
146		144
147	li r31, PAGE_SIZE >> 2	145	li r31, PAGE_SIZE >> 2
148	li r30, 0	146	li r30, 0
149		147
150	page_copy:	148	page_copy:
151		149
152	cmpwi r6, 0	150	cmpwi r6, 0
153	beq copy_end	151	beq copy_end
154		152
155	# copy page	153	# copy page
156		154
157	mtctr r31	155	mtctr r31
158	lwz r29, 0(r5)	156	lwz r29, 0(r5)
159		157
160	copy_loop:	158	copy_loop:
161		159
162	lwz r28, 0(r29)	160	lwz r28, 0(r29)
163	stw r28, 0(r30)	161	stw r28, 0(r30)
164		162
165	addi r29, r29, 4	163	addi r29, r29, 4
166	addi r30, r30, 4	164	addi r30, r30, 4
167	subi r6, r6, 4	165	subi r6, r6, 4
168		166
169	cmpwi r6, 0	167	cmpwi r6, 0
170	beq copy_end	168	beq copy_end
171		169
172	bdnz copy_loop	170	bdnz copy_loop
173		171
174	addi r5, r5, 4	172	addi r5, r5, 4
175	b page_copy	173	b page_copy
176		174
177	copy_end:	175	copy_end:
178		176
179	# initially fill segment registers	177	# initially fill segment registers
180		178
181	li r31, 16	179	li r31, 16
182	mtctr r31	180	mtctr r31
183	li r31, 0	181	li r31, 0
184	li r30, 0x2000	182	li r30, 0x2000
185		183
186	seg_fill:	184	seg_fill:
187		185
188	mtsrin r30, r31	186	mtsrin r30, r31
189	addi r30, r30, 0x111	187	addi r30, r30, 0x111
190	addis r31, r31, 0x1000 # move to next SR	188	addis r31, r31, 0x1000 # move to next SR
191		189
192	bdnz seg_fill	190	bdnz seg_fill
193		191
194	# invalidate block address translation registers	192	# invalidate block address translation registers
195		193
196	mtspr ibat0u, r30	194	mtspr ibat0u, r30
197	mtspr ibat0l, r30	195	mtspr ibat0l, r30
198		196
199	mtspr ibat1u, r30	197	mtspr ibat1u, r30
200	mtspr ibat1l, r30	198	mtspr ibat1l, r30
201		199
202	mtspr ibat2u, r30	200	mtspr ibat2u, r30
203	mtspr ibat2l, r30	201	mtspr ibat2l, r30
204		202
205	mtspr ibat3u, r30	203	mtspr ibat3u, r30
206	mtspr ibat3l, r30	204	mtspr ibat3l, r30
207		205
208	mtspr dbat0u, r30	206	mtspr dbat0u, r30
209	mtspr dbat0l, r30	207	mtspr dbat0l, r30
210		208
211	mtspr dbat1u, r30	209	mtspr dbat1u, r30
212	mtspr dbat1l, r30	210	mtspr dbat1l, r30
213		211
214	mtspr dbat2u, r30	212	mtspr dbat2u, r30
215	mtspr dbat2l, r30	213	mtspr dbat2l, r30
216		214
217	mtspr dbat3u, r30	215	mtspr dbat3u, r30
218	mtspr dbat3l, r30	216	mtspr dbat3l, r30
219		217
220	# create identity mapping	218	# create identity mapping
221		219
222	# FIXME: map exactly the size of RAM	220	# FIXME: map exactly the size of RAM
223		221
224	lis r31, 0x8000	222	lis r31, 0x8000
225	ori r31, r31, 0x0ffe	223	ori r31, r31, 0x0ffe
226		224
227	lis r30, 0x0000	225	lis r30, 0x0000
228	ori r30, r30, 0x0002	226	ori r30, r30, 0x0002
229		227
230	mtspr ibat0u, r31	228	mtspr ibat0u, r31
231	mtspr ibat0l, r30	229	mtspr ibat0l, r30
232		230
233	mtspr dbat0u, r31	231	mtspr dbat0u, r31
234	mtspr dbat0l, r30	232	mtspr dbat0l, r30
235		233
236	# FIXME: temporal framebuffer mapping	-
237		-
238	lis r31, 0xf000	-
239	ori r31, r31, 0x0ffe	-
240		-
241	mr r30, r7	-
242	ori r30, r30, 0x0002	-
243		-
244	mtspr dbat1u, r31	-
245	mtspr dbat1l, r30	-
246		-
247	tlbia	234	tlbia
248		235
249	# start the kernel	236	# start the kernel
250	#	237	#
251	# r3 = bootinfo (pa)	238	# r3 = bootinfo (pa)
252		239
253	lis r31, KERNEL_START_ADDR@ha	240	lis r31, KERNEL_START_ADDR@ha
254	addi r31, r31, KERNEL_START_ADDR@l	241	addi r31, r31, KERNEL_START_ADDR@l
255		242
256	mtspr srr0, r31	243	mtspr srr0, r31
257		244
258	mfmsr r31	245	mfmsr r31
259	ori r31, r31, (msr_ir \| msr_dr)@l	246	ori r31, r31, (msr_ir \| msr_dr)@l
260	mtspr srr1, r31	247	mtspr srr1, r31
261		248
262	sync	249	sync
263	isync	250	isync
264	rfi	251	rfi
265		252
266	.align PAGE_WIDTH	253	.align PAGE_WIDTH
267	.global trans	254	.global trans
268	trans:	255	trans:
269	.space (TRANS_SIZE * TRANS_ITEM_SIZE)	256	.space (TRANS_SIZE * TRANS_ITEM_SIZE)
270		257

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(root)/boot/trunk/arch/ppc32/loader/asm.S – Rev 1216 → 1372