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#
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#
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# Copyright (C) 2006 Martin Decky
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# Copyright (C) 2006 Martin Decky
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# All rights reserved.
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# All rights reserved.
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#
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#
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# Redistribution and use in source and binary forms, with or without
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# Redistribution and use in source and binary forms, with or without
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# modification, are permitted provided that the following conditions
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# modification, are permitted provided that the following conditions
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# are met:
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# are met:
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#
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#
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# - Redistributions of source code must retain the above copyright
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# - Redistributions of source code must retain the above copyright
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#   notice, this list of conditions and the following disclaimer.
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#   notice, this list of conditions and the following disclaimer.
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# - Redistributions in binary form must reproduce the above copyright
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# - Redistributions in binary form must reproduce the above copyright
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#   notice, this list of conditions and the following disclaimer in the
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#   notice, this list of conditions and the following disclaimer in the
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#   documentation and/or other materials provided with the distribution.
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#   documentation and/or other materials provided with the distribution.
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# - The name of the author may not be used to endorse or promote products
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# - The name of the author may not be used to endorse or promote products
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#   derived from this software without specific prior written permission.
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#   derived from this software without specific prior written permission.
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#
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#
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# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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#
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#
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#include "asm.h"
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#include "asm.h"
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#include "regname.h"
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#include "regname.h"
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.text
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.text
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.global halt
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.global halt
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.global memcpy
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.global memcpy
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.global jump_to_kernel
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.global jump_to_kernel
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halt:
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halt:
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	b halt
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	b halt
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memcpy:
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memcpy:
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	srwi. r7, r5, 3
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	srwi. r7, r5, 3
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	addi r6, r3, -4
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	addi r6, r3, -4
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	addi r4, r4, -4
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	addi r4, r4, -4
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	beq	2f
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	beq	2f
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46
	
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	andi. r0, r6, 3
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	andi. r0, r6, 3
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	mtctr r7
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	mtctr r7
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	bne 5f
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	bne 5f
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50
	
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	1:
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	1:
52
	
52
	
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	lwz r7, 4(r4)
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	lwz r7, 4(r4)
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	lwzu r8, 8(r4)
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	lwzu r8, 8(r4)
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	stw r7, 4(r6)
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	stw r7, 4(r6)
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	stwu r8, 8(r6)
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	stwu r8, 8(r6)
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	bdnz 1b
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	bdnz 1b
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58
	
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	andi. r5, r5, 7
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	andi. r5, r5, 7
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60
	
61
	2:
61
	2:
62
	
62
	
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	cmplwi 0, r5, 4
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	cmplwi 0, r5, 4
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	blt 3f
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	blt 3f
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65
	
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	lwzu r0, 4(r4)
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	lwzu r0, 4(r4)
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	addi r5, r5, -4
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	addi r5, r5, -4
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	stwu r0, 4(r6)
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	stwu r0, 4(r6)
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	3:
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	3:
71
	
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	cmpwi 0, r5, 0
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	cmpwi 0, r5, 0
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	beqlr
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	beqlr
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	mtctr r5
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	mtctr r5
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	addi r4, r4, 3
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	addi r4, r4, 3
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	addi r6, r6, 3
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	addi r6, r6, 3
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	4:
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	4:
79
	
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	lbzu r0, 1(r4)
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	lbzu r0, 1(r4)
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	stbu r0, 1(r6)
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	stbu r0, 1(r6)
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	bdnz 4b
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	bdnz 4b
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	blr
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	blr
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	5:
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	5:
86
	
86
	
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	subfic r0, r0, 4
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	subfic r0, r0, 4
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	mtctr r0
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	mtctr r0
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	6:
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	6:
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	lbz r7, 4(r4)
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	lbz r7, 4(r4)
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	addi r4, r4, 1
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	addi r4, r4, 1
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	stb r7, 4(r6)
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	stb r7, 4(r6)
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	addi r6, r6, 1
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	addi r6, r6, 1
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	bdnz 6b
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	bdnz 6b
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	subf r5, r0, r5
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	subf r5, r0, r5
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	rlwinm. r7, r5, 32-3, 3, 31
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	rlwinm. r7, r5, 32-3, 3, 31
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	beq 2b
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	beq 2b
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	mtctr r7
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	mtctr r7
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	b 1b
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	b 1b
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104
jump_to_kernel:
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jump_to_kernel:
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105
	
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	# r3 = bootinfo (pa)
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	# r3 = bootinfo (pa)
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	# r4 = bootinfo_size
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	# r4 = bootinfo_size
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	# r5 = trans (pa)
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	# r5 = trans (pa)
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	# r6 = kernel size
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	# r6 = kernel size
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	# r7 = framebuffer (pa)
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	# r7 = framebuffer (pa)
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	# r8 = real_mode (pa)
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	# r8 = real_mode (pa)
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112
	
-
 
113
	# disable interrupts
-
 
114
	
-
 
115
	mfmsr r31
-
 
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	rlwinm r31, r31, 0, 17, 15
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117
	mtmsr r31
-
 
118
	
-
 
119
	# set real_mode meeting point address
-
 
120
	
113
	mtspr srr0, r8
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	mtspr srr0, r8
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	# jumps to real_mode
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	# jumps to real_mode
116
	
124
	
117
	mfmsr r31
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	mfmsr r31
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	lis r30, ~0@h
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	lis r30, ~0@h
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	ori r30, r30, ~(msr_ir | msr_dr)@l
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	ori r30, r30, ~(msr_ir | msr_dr)@l
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	and r31, r31, r30
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	and r31, r31, r30
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	mtspr srr1, r31
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	mtspr srr1, r31
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130
	
123
	sync
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	sync
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	isync
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	isync
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	rfi
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	rfi
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.section REALMODE, "ax"
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.section REALMODE, "ax"
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.align PAGE_WIDTH
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.align PAGE_WIDTH
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.global real_mode
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.global real_mode
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real_mode:
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real_mode:
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	# copy kernel to proper location
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	# copy kernel to proper location
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	#
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	#
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	# r5 = trans (pa)
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	# r5 = trans (pa)
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	# r6 = kernel size
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	# r6 = kernel size
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	# r7 = framebuffer (pa)
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	# r7 = framebuffer (pa)
138
	
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139
	li r31, PAGE_SIZE >> 2
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	li r31, PAGE_SIZE >> 2
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	li r30, 0
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	li r30, 0
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149
	
142
	page_copy:
150
	page_copy:
143
		
151
		
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		cmpwi r6, 0
152
		cmpwi r6, 0
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		beq copy_end
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		beq copy_end
146
		
154
		
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		# copy page
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		# copy page
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156
		
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		mtctr r31
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		mtctr r31
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		lwz r29, 0(r5)
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		lwz r29, 0(r5)
151
		
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		copy_loop:
160
		copy_loop:
153
			
161
			
154
			lwz r28, 0(r29)
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			lwz r28, 0(r29)
155
			stw r28, 0(r30)
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			stw r28, 0(r30)
156
			
164
			
157
			addi r29, r29, 4
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			addi r29, r29, 4
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			addi r30, r30, 4
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			addi r30, r30, 4
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			subi r6, r6, 4
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			subi r6, r6, 4
160
			
168
			
161
			cmpwi r6, 0
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			cmpwi r6, 0
162
			beq copy_end
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			beq copy_end
163
			
171
			
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			bdnz copy_loop
172
			bdnz copy_loop
165
		
173
		
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		addi r5, r5, 4
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		addi r5, r5, 4
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		b page_copy
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		b page_copy
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176
	
169
	copy_end:
177
	copy_end:
170
	
178
	
171
	# initially fill segment registers
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	# initially fill segment registers
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180
 
173
	li r31, 16
181
	li r31, 16
174
	mtctr r31
182
	mtctr r31
175
	li r31, 0
183
	li r31, 0
176
	li r30, 0x2000
184
	li r30, 0x2000
177
 
185
 
178
	seg_fill:
186
	seg_fill:
179
	
187
	
180
		mtsrin r30, r31
188
		mtsrin r30, r31
181
		addi r30, r30, 0x111
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		addi r30, r30, 0x111
182
		addis r31, r31, 0x1000    # move to next SR
190
		addis r31, r31, 0x1000    # move to next SR
183
		
191
		
184
		bdnz seg_fill
192
		bdnz seg_fill
185
	
193
	
186
	# invalidate block address translation registers
194
	# invalidate block address translation registers
187
	
195
	
188
	mtspr ibat0u, r30
196
	mtspr ibat0u, r30
189
	mtspr ibat0l, r30
197
	mtspr ibat0l, r30
190
	
198
	
191
	mtspr ibat1u, r30
199
	mtspr ibat1u, r30
192
	mtspr ibat1l, r30
200
	mtspr ibat1l, r30
193
	
201
	
194
	mtspr ibat2u, r30
202
	mtspr ibat2u, r30
195
	mtspr ibat2l, r30
203
	mtspr ibat2l, r30
196
	
204
	
197
	mtspr ibat3u, r30
205
	mtspr ibat3u, r30
198
	mtspr ibat3l, r30
206
	mtspr ibat3l, r30
199
	
207
	
200
	mtspr dbat0u, r30
208
	mtspr dbat0u, r30
201
	mtspr dbat0l, r30
209
	mtspr dbat0l, r30
202
	
210
	
203
	mtspr dbat1u, r30
211
	mtspr dbat1u, r30
204
	mtspr dbat1l, r30
212
	mtspr dbat1l, r30
205
	
213
	
206
	mtspr dbat2u, r30
214
	mtspr dbat2u, r30
207
	mtspr dbat2l, r30
215
	mtspr dbat2l, r30
208
	
216
	
209
	mtspr dbat3u, r30
217
	mtspr dbat3u, r30
210
	mtspr dbat3l, r30
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	mtspr dbat3l, r30
211
	
219
	
212
	# create identity mapping
220
	# create identity mapping
213
	
221
	
214
	# FIXME: map exactly the size of RAM
222
	# FIXME: map exactly the size of RAM
215
	
223
	
216
	lis r31, 0x8000
224
	lis r31, 0x8000
217
	ori r31, r31, 0x0ffe
225
	ori r31, r31, 0x0ffe
218
	
226
	
219
	lis r30, 0x0000
227
	lis r30, 0x0000
220
	ori r30, r30, 0x0002
228
	ori r30, r30, 0x0002
221
	
229
	
222
	mtspr ibat0u, r31
230
	mtspr ibat0u, r31
223
	mtspr ibat0l, r30
231
	mtspr ibat0l, r30
224
	
232
	
225
	mtspr dbat0u, r31
233
	mtspr dbat0u, r31
226
	mtspr dbat0l, r30
234
	mtspr dbat0l, r30
227
	
235
	
228
	# FIXME: temporal framebuffer mapping
236
	# FIXME: temporal framebuffer mapping
229
	
237
	
230
	lis r31, 0xf000
238
	lis r31, 0xf000
231
	ori r31, r31, 0x0ffe
239
	ori r31, r31, 0x0ffe
232
	
240
	
233
	mr r30, r7
241
	mr r30, r7
234
	ori r30, r30, 0x0002
242
	ori r30, r30, 0x0002
235
	
243
	
236
	mtspr dbat1u, r31
244
	mtspr dbat1u, r31
237
	mtspr dbat1l, r30
245
	mtspr dbat1l, r30
238
	
246
	
239
	tlbia
247
	tlbia
240
	
248
	
241
	# start the kernel
249
	# start the kernel
242
	#
250
	#
243
	# r3 = bootinfo (pa)
251
	# r3 = bootinfo (pa)
244
	
252
	
245
	lis r31, KERNEL_START_ADDR@ha
253
	lis r31, KERNEL_START_ADDR@ha
246
	addi r31, r31, KERNEL_START_ADDR@l
254
	addi r31, r31, KERNEL_START_ADDR@l
247
	
255
	
248
	mtspr srr0, r31
256
	mtspr srr0, r31
249
	
257
	
250
	mfmsr r31
258
	mfmsr r31
251
	ori r31, r31, (msr_ir | msr_dr)@l
259
	ori r31, r31, (msr_ir | msr_dr)@l
252
	mtspr srr1, r31
260
	mtspr srr1, r31
253
	
261
	
254
	sync
262
	sync
255
	isync
263
	isync
256
	rfi
264
	rfi
257
 
265
 
258
.align PAGE_WIDTH
266
.align PAGE_WIDTH
259
.global trans
267
.global trans
260
trans:
268
trans:
261
	.space (TRANS_SIZE * TRANS_ITEM_SIZE)
269
	.space (TRANS_SIZE * TRANS_ITEM_SIZE)
262
 
270