WebSVN – HelenOS-historic – Diff – /boot/trunk/arch/ppc32/loader/asm.S


#
# Copyright (C) 2006 Martin Decky
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# - Redistributions of source code must retain the above copyright
#   notice, this list of conditions and the following disclaimer.
# - Redistributions in binary form must reproduce the above copyright
#   notice, this list of conditions and the following disclaimer in the
#   documentation and/or other materials provided with the distribution.
# - The name of the author may not be used to endorse or promote products
#   derived from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
 
#include "asm.h"
#include "regname.h"
 
 
 
 
 
 
.text
 
.global halt
.global memcpy
.global jump_to_kernel
 
halt:
	b halt
 
memcpy:
	srwi. r7, r5, 3
	addi r6, r3, -4
	addi r4, r4, -4
	beq	2f
	
	andi. r0, r6, 3
	mtctr r7
	bne 5f
	
	1:
	
	lwz r7, 4(r4)
	lwzu r8, 8(r4)
	stw r7, 4(r6)
	stwu r8, 8(r6)
	bdnz 1b
	
	andi. r5, r5, 7
	
	2:
	
	cmplwi 0, r5, 4
	blt 3f
	
	lwzu r0, 4(r4)
	addi r5, r5, -4
	stwu r0, 4(r6)
	
	3:
	
	cmpwi 0, r5, 0
	beqlr
	mtctr r5
	addi r4, r4, 3
	addi r6, r6, 3
	
	4:
	
	lbzu r0, 1(r4)
	stbu r0, 1(r6)
	bdnz 4b
	blr
	
	5:
	
	subfic r0, r0, 4
	mtctr r0
	
	6:
	
	lbz r7, 4(r4)
	addi r4, r4, 1
	stb r7, 4(r6)
	addi r6, r6, 1
	bdnz 6b
	subf r5, r0, r5
	rlwinm. r7, r5, 32-3, 3, 31
	beq 2b
	mtctr r7
	b 1b
 
 
jump_to_kernel:
	
	# r3 = bootinfo (pa)
	# r4 = bootinfo_size
	# r5 = trans (pa)
	# r6 = kernel size
	# r7 = framebuffer (pa)
	# r8 = real_mode (pa)
	
	mtspr srr0, r8
	
	# jumps to real_mode
	
	mfmsr r31
	lis r30, ~0@h
	ori r30, r30, ~(msr_ir | msr_dr)@l
	and r31, r31, r30
	mtspr srr1, r31
	
	sync
	isync
	rfi
 
.section REALMODE
.align PAGE_WIDTH
.global real_mode
 
real_mode:
	
	# copy kernel to proper location
	#
	# r5 = trans (pa)
	# r6 = kernel size
	# r7 = framebuffer (pa)
	
	li r31, PAGE_SIZE >> 2
	li r30, 0
	
	page_copy:
		
		cmpwi r6, 0
		beq copy_end
		
		# copy page
		
		mtctr r31
		lwz r29, 0(r5)
		
		copy_loop:
			
			lwz r28, 0(r29)
			stw r28, 0(r30)
			
			addi r29, r29, 4
			addi r30, r30, 4
			subi r6, r6, 4
			
			cmpwi r6, 0
			beq copy_end
			
			bdnz copy_loop
		
		addi r5, r5, 4
		b page_copy
	
	copy_end:
	
	# invalidate segment registers
 
	li r31, 16
	mtctr r31
	li r31, 0
	li r30, 0
 
	seg_fill:
	
		mtsrin r30, r31
		addis r31, r31, 0x1000    # move to next SR
		
		bdnz seg_fill
	
	# invalidate block address translation registers
	
	mtspr ibat0u, r30
	mtspr ibat0l, r30
	
	mtspr ibat1u, r30
	mtspr ibat1l, r30
	
	mtspr ibat2u, r30
	mtspr ibat2l, r30
	
	mtspr ibat3u, r30
	mtspr ibat3l, r30
	
	mtspr dbat0u, r30
	mtspr dbat0l, r30
	
	mtspr dbat1u, r30
	mtspr dbat1l, r30
	
	mtspr dbat2u, r30
	mtspr dbat2l, r30
	
	mtspr dbat3u, r30
	mtspr dbat3l, r30
	
	# create identity mapping
	
	# FIXME: map exactly the size of RAM
	
	lis r31, 0x8000
	ori r31, r31, 0x0ffe
	
	lis r30, 0x0000
	ori r30, r30, 0x0002
	
	mtspr ibat0u, r31
	mtspr ibat0l, r30
	
	mtspr dbat0u, r31
	mtspr dbat0l, r30
	
	# FIXME: temporal framebuffer mapping
	
	lis r31, 0xf000
	ori r31, r31, 0x0ffe
	
	mr r30, r7
	ori r30, r30, 0x0002
	
	mtspr dbat1u, r31
	mtspr dbat1l, r30
	
	tlbia
	
	# start the kernel
	#
	# r3 = bootinfo (pa)
	
	lis r31, KERNEL_START_ADDR@ha
	addi r31, r31, KERNEL_START_ADDR@l
	
	mtspr srr0, r31
	
	mfmsr r31
	ori r31, r31, (msr_ir | msr_dr)@l
	mtspr srr1, r31
	
	sync
	isync
	rfi
 
.align PAGE_WIDTH
.global trans
trans:
	.space (TRANS_SIZE * TRANS_ITEM_SIZE)
 

Rev 1146	Rev 1157
1	#	1	#
2	# Copyright (C) 2006 Martin Decky	2	# Copyright (C) 2006 Martin Decky
3	# All rights reserved.	3	# All rights reserved.
4	#	4	#
5	# Redistribution and use in source and binary forms, with or without	5	# Redistribution and use in source and binary forms, with or without
6	# modification, are permitted provided that the following conditions	6	# modification, are permitted provided that the following conditions
7	# are met:	7	# are met:
8	#	8	#
9	# - Redistributions of source code must retain the above copyright	9	# - Redistributions of source code must retain the above copyright
10	# notice, this list of conditions and the following disclaimer.	10	# notice, this list of conditions and the following disclaimer.
11	# - Redistributions in binary form must reproduce the above copyright	11	# - Redistributions in binary form must reproduce the above copyright
12	# notice, this list of conditions and the following disclaimer in the	12	# notice, this list of conditions and the following disclaimer in the
13	# documentation and/or other materials provided with the distribution.	13	# documentation and/or other materials provided with the distribution.
14	# - The name of the author may not be used to endorse or promote products	14	# - The name of the author may not be used to endorse or promote products
15	# derived from this software without specific prior written permission.	15	# derived from this software without specific prior written permission.
16	#	16	#
17	# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR	17	# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18	# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES	18	# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19	# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.	19	# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20	# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,	20	# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21	# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT	21	# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22	# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,	22	# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23	# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY	23	# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24	# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT	24	# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25	# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF	25	# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26	# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.	26	# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27	#	27	#
28		28
29	#include "asm.h"	29	#include "asm.h"
30	#include "regname.h"	30	#include "regname.h"
31		31
32	.data	-
33		-
34	flush_buffer:	-
35	.space (L1_CACHE_LINES * L1_CACHE_BYTES)	-
36		-
37	.text	32	.text
38		33
39	.global halt	34	.global halt
40	.global memcpy	35	.global memcpy
41	.global jump_to_kernel	36	.global jump_to_kernel
42		37
43	halt:	38	halt:
44	b halt	39	b halt
45		40
46	memcpy:	41	memcpy:
47	srwi. r7, r5, 3	42	srwi. r7, r5, 3
48	addi r6, r3, -4	43	addi r6, r3, -4
49	addi r4, r4, -4	44	addi r4, r4, -4
50	beq 2f	45	beq 2f
51		46
52	andi. r0, r6, 3	47	andi. r0, r6, 3
53	mtctr r7	48	mtctr r7
54	bne 5f	49	bne 5f
55		50
56	1:	51	1:
57		52
58	lwz r7, 4(r4)	53	lwz r7, 4(r4)
59	lwzu r8, 8(r4)	54	lwzu r8, 8(r4)
60	stw r7, 4(r6)	55	stw r7, 4(r6)
61	stwu r8, 8(r6)	56	stwu r8, 8(r6)
62	bdnz 1b	57	bdnz 1b
63		58
64	andi. r5, r5, 7	59	andi. r5, r5, 7
65		60
66	2:	61	2:
67		62
68	cmplwi 0, r5, 4	63	cmplwi 0, r5, 4
69	blt 3f	64	blt 3f
70		65
71	lwzu r0, 4(r4)	66	lwzu r0, 4(r4)
72	addi r5, r5, -4	67	addi r5, r5, -4
73	stwu r0, 4(r6)	68	stwu r0, 4(r6)
74		69
75	3:	70	3:
76		71
77	cmpwi 0, r5, 0	72	cmpwi 0, r5, 0
78	beqlr	73	beqlr
79	mtctr r5	74	mtctr r5
80	addi r4, r4, 3	75	addi r4, r4, 3
81	addi r6, r6, 3	76	addi r6, r6, 3
82		77
83	4:	78	4:
84		79
85	lbzu r0, 1(r4)	80	lbzu r0, 1(r4)
86	stbu r0, 1(r6)	81	stbu r0, 1(r6)
87	bdnz 4b	82	bdnz 4b
88	blr	83	blr
89		84
90	5:	85	5:
91		86
92	subfic r0, r0, 4	87	subfic r0, r0, 4
93	mtctr r0	88	mtctr r0
94		89
95	6:	90	6:
96		91
97	lbz r7, 4(r4)	92	lbz r7, 4(r4)
98	addi r4, r4, 1	93	addi r4, r4, 1
99	stb r7, 4(r6)	94	stb r7, 4(r6)
100	addi r6, r6, 1	95	addi r6, r6, 1
101	bdnz 6b	96	bdnz 6b
102	subf r5, r0, r5	97	subf r5, r0, r5
103	rlwinm. r7, r5, 32-3, 3, 31	98	rlwinm. r7, r5, 32-3, 3, 31
104	beq 2b	99	beq 2b
105	mtctr r7	100	mtctr r7
106	b 1b	101	b 1b
107		102
108		103
109	jump_to_kernel:	104	jump_to_kernel:
110		105
111	# r3 = bootinfo (pa)	106	# r3 = bootinfo (pa)
112	# r4 = bootinfo_size	107	# r4 = bootinfo_size
113	# r5 = trans (pa)	108	# r5 = trans (pa)
114	# r6 = kernel size	109	# r6 = kernel size
115	# r7 = framebuffer (pa)	110	# r7 = framebuffer (pa)
116	# r8 = real_mode (pa)	111	# r8 = real_mode (pa)
117		112
118	mtspr srr0, r8	113	mtspr srr0, r8
119		114
120	# jumps to real_mode	115	# jumps to real_mode
121		116
122	mfmsr r31	117	mfmsr r31
123	lis r30, ~0@h	118	lis r30, ~0@h
124	ori r30, r30, ~(msr_ir \| msr_dr)@l	119	ori r30, r30, ~(msr_ir \| msr_dr)@l
125	and r31, r31, r30	120	and r31, r31, r30
126	mtspr srr1, r31	121	mtspr srr1, r31
-		122
-		123	sync
-		124	isync
127	rfi	125	rfi
128		126
129	.section REALMODE	127	.section REALMODE
130	.align PAGE_WIDTH	128	.align PAGE_WIDTH
131	.global real_mode	129	.global real_mode
132		130
133	real_mode:	131	real_mode:
134		132
135	# copy kernel to proper location	133	# copy kernel to proper location
136	#	134	#
137	# r5 = trans (pa)	135	# r5 = trans (pa)
138	# r6 = kernel size	136	# r6 = kernel size
139	# r7 = framebuffer (pa)	137	# r7 = framebuffer (pa)
140		138
141	li r31, PAGE_SIZE >> 2	139	li r31, PAGE_SIZE >> 2
142	li r30, 0	140	li r30, 0
143		141
144	page_copy:	142	page_copy:
145		143
146	cmpwi r6, 0	144	cmpwi r6, 0
147	beq copy_end	145	beq copy_end
148		146
149	# copy page	147	# copy page
150		148
151	mtctr r31	149	mtctr r31
152	lwz r29, 0(r5)	150	lwz r29, 0(r5)
153		151
154	copy_loop:	152	copy_loop:
155		153
156	lwz r28, 0(r29)	154	lwz r28, 0(r29)
157	stw r28, 0(r30)	155	stw r28, 0(r30)
158		156
159	addi r29, r29, 4	157	addi r29, r29, 4
160	addi r30, r30, 4	158	addi r30, r30, 4
161	subi r6, r6, 4	159	subi r6, r6, 4
162		160
163	cmpwi r6, 0	161	cmpwi r6, 0
164	beq copy_end	162	beq copy_end
165		163
166	bdnz copy_loop	164	bdnz copy_loop
167		165
168	addi r5, r5, 4	166	addi r5, r5, 4
169	b page_copy	167	b page_copy
170		168
171	copy_end:	169	copy_end:
172		170
173	# invalidate segment registers	171	# invalidate segment registers
174		172
175	li r31, 16	173	li r31, 16
176	mtctr r31	174	mtctr r31
177	li r31, 0	175	li r31, 0
178	li r30, 0	176	li r30, 0
179		177
180	seg_fill:	178	seg_fill:
181		179
182	mtsrin r30, r31	180	mtsrin r30, r31
183	addis r31, r31, 0x1000 # move to next SR	181	addis r31, r31, 0x1000 # move to next SR
184		182
185	bdnz seg_fill	183	bdnz seg_fill
186		184
187	# invalidate block address translation registers	185	# invalidate block address translation registers
188		186
189	mtspr ibat0u, r30	187	mtspr ibat0u, r30
190	mtspr ibat0l, r30	188	mtspr ibat0l, r30
191		189
192	mtspr ibat1u, r30	190	mtspr ibat1u, r30
193	mtspr ibat1l, r30	191	mtspr ibat1l, r30
194		192
195	mtspr ibat2u, r30	193	mtspr ibat2u, r30
196	mtspr ibat2l, r30	194	mtspr ibat2l, r30
197		195
198	mtspr ibat3u, r30	196	mtspr ibat3u, r30
199	mtspr ibat3l, r30	197	mtspr ibat3l, r30
200		198
201	mtspr dbat0u, r30	199	mtspr dbat0u, r30
202	mtspr dbat0l, r30	200	mtspr dbat0l, r30
203		201
204	mtspr dbat1u, r30	202	mtspr dbat1u, r30
205	mtspr dbat1l, r30	203	mtspr dbat1l, r30
206		204
207	mtspr dbat2u, r30	205	mtspr dbat2u, r30
208	mtspr dbat2l, r30	206	mtspr dbat2l, r30
209		207
210	mtspr dbat3u, r30	208	mtspr dbat3u, r30
211	mtspr dbat3l, r30	209	mtspr dbat3l, r30
212		210
213	# create identity mapping	211	# create identity mapping
214		212
215	# FIXME: map exactly the size of RAM	213	# FIXME: map exactly the size of RAM
216		214
217	lis r31, 0x8000	215	lis r31, 0x8000
218	ori r31, r31, 0x0ffe	216	ori r31, r31, 0x0ffe
219		217
220	lis r30, 0x0000	218	lis r30, 0x0000
221	ori r30, r30, 0x0002	219	ori r30, r30, 0x0002
222		220
223	mtspr ibat0u, r31	221	mtspr ibat0u, r31
224	mtspr ibat0l, r30	222	mtspr ibat0l, r30
225		223
226	mtspr dbat0u, r31	224	mtspr dbat0u, r31
227	mtspr dbat0l, r30	225	mtspr dbat0l, r30
228		226
229	# FIXME: temporal framebuffer mapping	227	# FIXME: temporal framebuffer mapping
230		228
231	lis r31, 0xf000	229	lis r31, 0xf000
232	ori r31, r31, 0x0ffe	230	ori r31, r31, 0x0ffe
233		231
234	mr r30, r7	232	mr r30, r7
235	ori r30, r30, 0x0002	233	ori r30, r30, 0x0002
236		234
237	mtspr dbat1u, r31	235	mtspr dbat1u, r31
238	mtspr dbat1l, r30	236	mtspr dbat1l, r30
239		237
240	tlbia	238	tlbia
241		239
242	# start the kernel	240	# start the kernel
243	#	241	#
244	# r3 = bootinfo (pa)	242	# r3 = bootinfo (pa)
245		243
246	lis r31, KERNEL_START_ADDR@ha	244	lis r31, KERNEL_START_ADDR@ha
247	addi r31, r31, KERNEL_START_ADDR@l	245	addi r31, r31, KERNEL_START_ADDR@l
248		246
249	mtspr srr0, r31	247	mtspr srr0, r31
250		248
251	mfmsr r31	249	mfmsr r31
252	ori r31, r31, (msr_ir \| msr_dr)@l	250	ori r31, r31, (msr_ir \| msr_dr)@l
253	mtspr srr1, r31	251	mtspr srr1, r31
254		252
255	sync	253	sync
256	isync	254	isync
257	rfi	255	rfi
258		256
259	.align PAGE_WIDTH	257	.align PAGE_WIDTH
260	.global trans	258	.global trans
261	trans:	259	trans:
262	.space (TRANS_SIZE * TRANS_ITEM_SIZE)	260	.space (TRANS_SIZE * TRANS_ITEM_SIZE)
263		261

Subversion Repositories HelenOS-historic

(root)/boot/trunk/arch/ppc32/loader/asm.S – Rev 1146 → 1157