WebSVN – HelenOS-historic – Diff – /boot/trunk/arch/ppc32/loader/asm.S


#
# Copyright (C) 2006 Martin Decky
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# - Redistributions of source code must retain the above copyright
#   notice, this list of conditions and the following disclaimer.
# - Redistributions in binary form must reproduce the above copyright
#   notice, this list of conditions and the following disclaimer in the
#   documentation and/or other materials provided with the distribution.
# - The name of the author may not be used to endorse or promote products
#   derived from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
 
#include "asm.h"
#include "regname.h"
 
.data
 
flush_buffer:
	.space (L1_CACHE_LINES * L1_CACHE_BYTES)
 
.text
 
.global halt
.global memcpy
.global jump_to_kernel
 
halt:
	b halt
 
memcpy:
	srwi. r7, r5, 3
	addi r6, r3, -4
	addi r4, r4, -4
	beq	2f
	
	andi. r0, r6, 3
	mtctr r7
	bne 5f
	
	1:
	
	lwz r7, 4(r4)
	lwzu r8, 8(r4)
	stw r7, 4(r6)
	stwu r8, 8(r6)
	bdnz 1b
	
	andi. r5, r5, 7
	
	2:
	
	cmplwi 0, r5, 4
	blt 3f
	
	lwzu r0, 4(r4)
	addi r5, r5, -4
	stwu r0, 4(r6)
	
	3:
	
	cmpwi 0, r5, 0
	beqlr
	mtctr r5
	addi r4, r4, 3
	addi r6, r6, 3
	
	4:
	
	lbzu r0, 1(r4)
	stbu r0, 1(r6)
	bdnz 4b
	blr
	
	5:
	
	subfic r0, r0, 4
	mtctr r0
	
	6:
	
	lbz r7, 4(r4)
	addi r4, r4, 1
	stb r7, 4(r6)
	addi r6, r6, 1
	bdnz 6b
	subf r5, r0, r5
	rlwinm. r7, r5, 32-3, 3, 31
	beq 2b
	mtctr r7
	b 1b
 
 
jump_to_kernel:
	
	# r3 = bootinfo (pa)
	# r4 = bootinfo_size
	# r5 = trans (pa)
	# r6 = kernel size
	# r7 = real_mode (pa)
	
	mtspr srr0, r7
	
	# jumps to real_mode
	
	mfmsr r31
	lis r30, ~0@h
	ori r30, r30, ~(msr_ir | msr_dr)@l
	and r31, r31, r30
	mtspr srr1, r31
	rfi
 
.section REALMODE
.align PAGE_WIDTH
.global real_mode
 
real_mode:
	
	# copy kernel to proper location
	#
	# r5 = trans (pa)
	# r6 = kernel size
	
	li r31, PAGE_SIZE >> 2
	li r30, 0
	
	page_copy:
		
		cmpwi r6, 0
		beq copy_end
		
		# copy page
		
		mtctr r31
		lwz r29, 0(r5)
		
		copy_loop:
			
			lwz r28, 0(r29)
			stw r28, 0(r30)
			
			addi r29, r29, 4
			addi r30, r30, 4
			subi r6, r6, 4
			
			cmpwi r6, 0
			beq copy_end
			
			bdnz copy_loop
		
		addi r5, r5, 4
		b page_copy
	
	copy_end:
	
	# invalidate segment registers
 
	li r31, 16
	mtctr r31
	li r31, 0
	li r30, 0
 
	seg_fill:
	
		mtsrin r30, r31
		addis r31, r31, 0x1000    # move to next SR
		
		bdnz seg_fill
	
	# invalidate block address translation registers
	
	mtspr ibat0u, r30
	mtspr ibat0l, r30
	
	mtspr ibat1u, r30
	mtspr ibat1l, r30
	
	mtspr ibat2u, r30
	mtspr ibat2l, r30
	
	mtspr ibat3u, r30
	mtspr ibat3l, r30
	
	mtspr dbat0u, r30
	mtspr dbat0l, r30
	
	mtspr dbat1u, r30
	mtspr dbat1l, r30
	
	mtspr dbat2u, r30
	mtspr dbat2l, r30
	
	mtspr dbat3u, r30
	mtspr dbat3l, r30
	
	# create identity mapping
	
	# FIXME: map exactly the size of RAM
	
	lis r31, 0x8000
	ori r31, r31, 0x0ffe
	
	lis r30, 0x0000
	ori r30, r30, 0x0002
	
	mtspr ibat0u, r31
	mtspr ibat0l, r30
	
	mtspr dbat0u, r31
	mtspr dbat0l, r30
	
	# FIXME: temporal framebuffer mapping
	
	lis r31, 0xf000
	ori r31, r31, 0x0ffe
	
	lis r30, 0x8400
	ori r30, r30, 0x0002
	
	mtspr dbat1u, r31
	mtspr dbat1l, r30
	
	tlbia
	
	# start the kernel
	#
	# r3 = bootinfo (pa)
	
	lis r31, KERNEL_START_ADDR@ha
	addi r31, r31, KERNEL_START_ADDR@l
	
	mtspr srr0, r31
	
	mfmsr r31
	ori r31, r31, (msr_ir | msr_dr)@l
	mtspr srr1, r31
	
	rfi
 
.align PAGE_WIDTH
.global trans
trans:
	.space (TRANS_SIZE * TRANS_ITEM_SIZE)
 

Rev 1075	Rev 1131
1	#	1	#
2	# Copyright (C) 2006 Martin Decky	2	# Copyright (C) 2006 Martin Decky
3	# All rights reserved.	3	# All rights reserved.
4	#	4	#
5	# Redistribution and use in source and binary forms, with or without	5	# Redistribution and use in source and binary forms, with or without
6	# modification, are permitted provided that the following conditions	6	# modification, are permitted provided that the following conditions
7	# are met:	7	# are met:
8	#	8	#
9	# - Redistributions of source code must retain the above copyright	9	# - Redistributions of source code must retain the above copyright
10	# notice, this list of conditions and the following disclaimer.	10	# notice, this list of conditions and the following disclaimer.
11	# - Redistributions in binary form must reproduce the above copyright	11	# - Redistributions in binary form must reproduce the above copyright
12	# notice, this list of conditions and the following disclaimer in the	12	# notice, this list of conditions and the following disclaimer in the
13	# documentation and/or other materials provided with the distribution.	13	# documentation and/or other materials provided with the distribution.
14	# - The name of the author may not be used to endorse or promote products	14	# - The name of the author may not be used to endorse or promote products
15	# derived from this software without specific prior written permission.	15	# derived from this software without specific prior written permission.
16	#	16	#
17	# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR	17	# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18	# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES	18	# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19	# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.	19	# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20	# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,	20	# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21	# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT	21	# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22	# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,	22	# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23	# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY	23	# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24	# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT	24	# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25	# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF	25	# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26	# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.	26	# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27	#	27	#
28		28
29	#include "asm.h"	29	#include "asm.h"
30	#include "regname.h"	30	#include "regname.h"
31		31
32	.data	32	.data
33		33
34	flush_buffer:	34	flush_buffer:
35	.space (L1_CACHE_LINES * L1_CACHE_BYTES)	35	.space (L1_CACHE_LINES * L1_CACHE_BYTES)
36		36
37	.text	37	.text
38		38
39	.global halt	39	.global halt
40	.global memcpy	40	.global memcpy
41	.global jump_to_kernel	41	.global jump_to_kernel
42		42
43	halt:	43	halt:
44	b halt	44	b halt
45		45
46	memcpy:	46	memcpy:
47	srwi. r7, r5, 3	47	srwi. r7, r5, 3
48	addi r6, r3, -4	48	addi r6, r3, -4
49	addi r4, r4, -4	49	addi r4, r4, -4
50	beq 2f	50	beq 2f
51		51
52	andi. r0, r6, 3	52	andi. r0, r6, 3
53	mtctr r7	53	mtctr r7
54	bne 5f	54	bne 5f
55		55
56	1:	56	1:
57		57
58	lwz r7, 4(r4)	58	lwz r7, 4(r4)
59	lwzu r8, 8(r4)	59	lwzu r8, 8(r4)
60	stw r7, 4(r6)	60	stw r7, 4(r6)
61	stwu r8, 8(r6)	61	stwu r8, 8(r6)
62	bdnz 1b	62	bdnz 1b
63		63
64	andi. r5, r5, 7	64	andi. r5, r5, 7
65		65
66	2:	66	2:
67		67
68	cmplwi 0, r5, 4	68	cmplwi 0, r5, 4
69	blt 3f	69	blt 3f
70		70
71	lwzu r0, 4(r4)	71	lwzu r0, 4(r4)
72	addi r5, r5, -4	72	addi r5, r5, -4
73	stwu r0, 4(r6)	73	stwu r0, 4(r6)
74		74
75	3:	75	3:
76		76
77	cmpwi 0, r5, 0	77	cmpwi 0, r5, 0
78	beqlr	78	beqlr
79	mtctr r5	79	mtctr r5
80	addi r4, r4, 3	80	addi r4, r4, 3
81	addi r6, r6, 3	81	addi r6, r6, 3
82		82
83	4:	83	4:
84		84
85	lbzu r0, 1(r4)	85	lbzu r0, 1(r4)
86	stbu r0, 1(r6)	86	stbu r0, 1(r6)
87	bdnz 4b	87	bdnz 4b
88	blr	88	blr
89		89
90	5:	90	5:
91		91
92	subfic r0, r0, 4	92	subfic r0, r0, 4
93	mtctr r0	93	mtctr r0
94		94
95	6:	95	6:
96		96
97	lbz r7, 4(r4)	97	lbz r7, 4(r4)
98	addi r4, r4, 1	98	addi r4, r4, 1
99	stb r7, 4(r6)	99	stb r7, 4(r6)
100	addi r6, r6, 1	100	addi r6, r6, 1
101	bdnz 6b	101	bdnz 6b
102	subf r5, r0, r5	102	subf r5, r0, r5
103	rlwinm. r7, r5, 32-3, 3, 31	103	rlwinm. r7, r5, 32-3, 3, 31
104	beq 2b	104	beq 2b
105	mtctr r7	105	mtctr r7
106	b 1b	106	b 1b
107		107
108		108
109	jump_to_kernel:	109	jump_to_kernel:
110		110
111	# r3 = memmap (pa)	111	# r3 = bootinfo (pa)
-		112	# r4 = bootinfo_size
112	# r4 = trans (pa)	113	# r5 = trans (pa)
113	# r5 = kernel size	114	# r6 = kernel size
114	# r6 = real_mode (pa)	115	# r7 = real_mode (pa)
115		116
116	mtspr srr0, r6	117	mtspr srr0, r7
117		118
118	# jumps to real_mode	119	# jumps to real_mode
119		120
120	mfmsr r31	121	mfmsr r31
121	lis r30, ~0@h	122	lis r30, ~0@h
122	ori r30, r30, ~(msr_ir \| msr_dr)@l	123	ori r30, r30, ~(msr_ir \| msr_dr)@l
123	and r31, r31, r30	124	and r31, r31, r30
124	mtspr srr1, r31	125	mtspr srr1, r31
125	rfi	126	rfi
126		127
127	.section REALMODE	128	.section REALMODE
128	.align PAGE_WIDTH	129	.align PAGE_WIDTH
129	.global real_mode	130	.global real_mode
130		131
131	real_mode:	132	real_mode:
132		133
133	# copy kernel to proper location	134	# copy kernel to proper location
134	#	135	#
135	# r4 = trans (pa)	136	# r5 = trans (pa)
136	# r5 = kernel size	137	# r6 = kernel size
137		138
138	li r31, PAGE_SIZE >> 2	139	li r31, PAGE_SIZE >> 2
139	li r30, 0	140	li r30, 0
140		141
141	page_copy:	142	page_copy:
142		143
143	cmpwi r5, 0	144	cmpwi r6, 0
144	beq copy_end	145	beq copy_end
145		146
146	# copy page	147	# copy page
147		148
148	mtctr r31	149	mtctr r31
149	lwz r29, 0(r4)	150	lwz r29, 0(r5)
150		151
151	copy_loop:	152	copy_loop:
152		153
153	lwz r28, 0(r29)	154	lwz r28, 0(r29)
154	stw r28, 0(r30)	155	stw r28, 0(r30)
155		156
156	addi r29, r29, 4	157	addi r29, r29, 4
157	addi r30, r30, 4	158	addi r30, r30, 4
158	subi r5, r5, 4	159	subi r6, r6, 4
159		160
160	cmpwi r5, 0	161	cmpwi r6, 0
161	beq copy_end	162	beq copy_end
162		163
163	bdnz copy_loop	164	bdnz copy_loop
164		165
165	addi r4, r4, 4	166	addi r5, r5, 4
166	b page_copy	167	b page_copy
167		168
168	copy_end:	169	copy_end:
169		170
170	# invalidate segment registers	171	# invalidate segment registers
171		172
172	li r31, 16	173	li r31, 16
173	mtctr r31	174	mtctr r31
174	li r31, 0	175	li r31, 0
175	li r30, 0	176	li r30, 0
176		177
177	seg_fill:	178	seg_fill:
178		179
179	mtsrin r30, r31	180	mtsrin r30, r31
180	addis r31, r31, 0x1000 # move to next SR	181	addis r31, r31, 0x1000 # move to next SR
181		182
182	bdnz seg_fill	183	bdnz seg_fill
183		184
184	# invalidate block address translation registers	185	# invalidate block address translation registers
185		186
186	mtspr ibat0u, r30	187	mtspr ibat0u, r30
187	mtspr ibat0l, r30	188	mtspr ibat0l, r30
188		189
189	mtspr ibat1u, r30	190	mtspr ibat1u, r30
190	mtspr ibat1l, r30	191	mtspr ibat1l, r30
191		192
192	mtspr ibat2u, r30	193	mtspr ibat2u, r30
193	mtspr ibat2l, r30	194	mtspr ibat2l, r30
194		195
195	mtspr ibat3u, r30	196	mtspr ibat3u, r30
196	mtspr ibat3l, r30	197	mtspr ibat3l, r30
197		198
198	mtspr dbat0u, r30	199	mtspr dbat0u, r30
199	mtspr dbat0l, r30	200	mtspr dbat0l, r30
200		201
201	mtspr dbat1u, r30	202	mtspr dbat1u, r30
202	mtspr dbat1l, r30	203	mtspr dbat1l, r30
203		204
204	mtspr dbat2u, r30	205	mtspr dbat2u, r30
205	mtspr dbat2l, r30	206	mtspr dbat2l, r30
206		207
207	mtspr dbat3u, r30	208	mtspr dbat3u, r30
208	mtspr dbat3l, r30	209	mtspr dbat3l, r30
209		210
210	# create identity mapping	211	# create identity mapping
211		212
212	# FIXME: map exactly the size of RAM	213	# FIXME: map exactly the size of RAM
213		214
214	lis r31, 0x8000	215	lis r31, 0x8000
215	ori r31, r31, 0x0ffe	216	ori r31, r31, 0x0ffe
216		217
217	lis r30, 0x0000	218	lis r30, 0x0000
218	ori r30, r30, 0x0002	219	ori r30, r30, 0x0002
219		220
220	mtspr ibat0u, r31	221	mtspr ibat0u, r31
221	mtspr ibat0l, r30	222	mtspr ibat0l, r30
222		223
223	mtspr dbat0u, r31	224	mtspr dbat0u, r31
224	mtspr dbat0l, r30	225	mtspr dbat0l, r30
225		226
226	# FIXME: temporal framebuffer mapping	227	# FIXME: temporal framebuffer mapping
227		228
228	lis r31, 0xf000	229	lis r31, 0xf000
229	ori r31, r31, 0x0ffe	230	ori r31, r31, 0x0ffe
230		231
231	lis r30, 0x8400	232	lis r30, 0x8400
232	ori r30, r30, 0x0002	233	ori r30, r30, 0x0002
233		234
234	mtspr dbat1u, r31	235	mtspr dbat1u, r31
235	mtspr dbat1l, r30	236	mtspr dbat1l, r30
236		237
237	tlbia	238	tlbia
238		239
239	# start the kernel	240	# start the kernel
240	#	241	#
241	# r3 = memmap (pa)	242	# r3 = bootinfo (pa)
242		243
243	lis r31, KERNEL_START_ADDR@ha	244	lis r31, KERNEL_START_ADDR@ha
244	addi r31, r31, KERNEL_START_ADDR@l	245	addi r31, r31, KERNEL_START_ADDR@l
245		246
246	mtspr srr0, r31	247	mtspr srr0, r31
247		248
248	mfmsr r31	249	mfmsr r31
249	ori r31, r31, (msr_ir \| msr_dr)@l	250	ori r31, r31, (msr_ir \| msr_dr)@l
250	mtspr srr1, r31	251	mtspr srr1, r31
251		252
252	rfi	253	rfi
253		254
254	.align PAGE_WIDTH	255	.align PAGE_WIDTH
255	.global trans	256	.global trans
256	trans:	257	trans:
257	.space (TRANS_SIZE * TRANS_ITEM_SIZE)	258	.space (TRANS_SIZE * TRANS_ITEM_SIZE)
258		259

Subversion Repositories HelenOS-historic

(root)/boot/trunk/arch/ppc32/loader/asm.S – Rev 1075 → 1131