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#
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#
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# Copyright (C) 2006 Martin Decky
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# Copyright (C) 2006 Martin Decky
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# All rights reserved.
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# All rights reserved.
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#
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#
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# Redistribution and use in source and binary forms, with or without
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# Redistribution and use in source and binary forms, with or without
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# modification, are permitted provided that the following conditions
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# modification, are permitted provided that the following conditions
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# are met:
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# are met:
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#
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#
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# - Redistributions of source code must retain the above copyright
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# - Redistributions of source code must retain the above copyright
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#   notice, this list of conditions and the following disclaimer.
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#   notice, this list of conditions and the following disclaimer.
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# - Redistributions in binary form must reproduce the above copyright
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# - Redistributions in binary form must reproduce the above copyright
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#   notice, this list of conditions and the following disclaimer in the
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#   notice, this list of conditions and the following disclaimer in the
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#   documentation and/or other materials provided with the distribution.
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#   documentation and/or other materials provided with the distribution.
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# - The name of the author may not be used to endorse or promote products
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# - The name of the author may not be used to endorse or promote products
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#   derived from this software without specific prior written permission.
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#   derived from this software without specific prior written permission.
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#
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#
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# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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#
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#
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#include "asm.h"
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#include "asm.h"
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#include "regname.h"
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#include "regname.h"
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.data
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.data
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flush_buffer:
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flush_buffer:
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	.space (L1_CACHE_LINES * L1_CACHE_BYTES)
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	.space (L1_CACHE_LINES * L1_CACHE_BYTES)
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.text
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.text
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.global halt
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.global halt
- 
 
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.global memcpy
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.global jump_to_kernel
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.global jump_to_kernel
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halt:
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halt:
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	b halt
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	b halt
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- 
 
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memcpy:
- 
 
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	srwi. r7, r5, 3
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	addi r6, r3, -4
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	addi r4, r4, -4
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	beq	2f
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- 
 
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	andi. r0, r6, 3
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	mtctr r7
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	bne 5f
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 55
- 
 
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	1:
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 57
- 
 
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	lwz r7, 4(r4)
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	lwzu r8, 8(r4)
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	stw r7, 4(r6)
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	stwu r8, 8(r6)
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	bdnz 1b
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- 
 
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	andi. r5, r5, 7
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- 
 
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	2:
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 67
- 
 
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	cmplwi 0, r5, 4
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	blt 3f
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- 
 
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	lwzu r0, 4(r4)
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	addi r5, r5, -4
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	stwu r0, 4(r6)
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- 
 
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	3:
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- 
 
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	cmpwi 0, r5, 0
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	beqlr
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	mtctr r5
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	addi r4, r4, 3
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	addi r6, r6, 3
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- 
 
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	4:
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- 
 
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	lbzu r0, 1(r4)
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	stbu r0, 1(r6)
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	bdnz 4b
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	blr
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- 
 
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	5:
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- 
 
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	subfic r0, r0, 4
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	mtctr r0
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- 
 
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	6:
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- 
 
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	lbz r7, 4(r4)
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	addi r4, r4, 1
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	stb r7, 4(r6)
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	addi r6, r6, 1
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	bdnz 6b
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	subf r5, r0, r5
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	rlwinm. r7, r5, 32-3, 3, 31
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	beq 2b
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	mtctr r7
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	b 1b
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- 
 
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jump_to_kernel:
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jump_to_kernel:
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	# r3 = memmap (pa)
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	# r3 = memmap (pa)
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	# r4 = trans (pa)
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	# r4 = trans (pa)
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	# r5 = kernel size
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	# r5 = kernel size
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	# r6 = real_mode (pa)
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	# r6 = real_mode (pa)
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115
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	mtspr srr0, r6
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	mtspr srr0, r6
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117
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	# jumps to real_mode
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	# jumps to real_mode
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119
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	mfmsr r31
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	mfmsr r31
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	lis r30, ~0@h
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	lis r30, ~0@h
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	ori r30, r30, ~(msr_ir | msr_dr)@l
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	ori r30, r30, ~(msr_ir | msr_dr)@l
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	and r31, r31, r30
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	and r31, r31, r30
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	mtspr srr1, r31
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	mtspr srr1, r31
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	rfi
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	rfi
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.section REALMODE
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.section REALMODE
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.align PAGE_WIDTH
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.align PAGE_WIDTH
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.global real_mode
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.global real_mode
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 130 
 
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real_mode:
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real_mode:
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132
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	# copy kernel to proper location
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	# copy kernel to proper location
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	#
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	#
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	# r4 = trans (pa)
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	# r4 = trans (pa)
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	# r5 = kernel size
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	# r5 = kernel size
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	li r31, PAGE_SIZE >> 2
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	li r31, PAGE_SIZE >> 2
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	li r30, 0
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	li r30, 0
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	page_copy:
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	page_copy:
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142
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		cmpwi r5, 0
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		cmpwi r5, 0
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		beq copy_end
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		beq copy_end
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		# copy page
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		# copy page
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		mtctr r31
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		mtctr r31
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		lwz r29, 0(r4)
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		lwz r29, 0(r4)
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		copy_loop:
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		copy_loop:
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			lwz r28, 0(r29)
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			lwz r28, 0(r29)
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			stw r28, 0(r30)
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			stw r28, 0(r30)
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			addi r29, r29, 4
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			addi r29, r29, 4
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			addi r30, r30, 4
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			addi r30, r30, 4
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			subi r5, r5, 4
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			subi r5, r5, 4
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			cmpwi r5, 0
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			cmpwi r5, 0
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			beq copy_end
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			beq copy_end
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			bdnz copy_loop
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			bdnz copy_loop
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		addi r4, r4, 4
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		addi r4, r4, 4
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		b page_copy
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		b page_copy
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167
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	copy_end:
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	copy_end:
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169
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	# invalidate segment registers
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	# invalidate segment registers
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108 
	li r31, 16
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	li r31, 16
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	mtctr r31
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	mtctr r31
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	li r31, 0
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	li r31, 0
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	li r30, 0
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	li r30, 0
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	seg_fill:
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	seg_fill:
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		mtsrin r30, r31
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		mtsrin r30, r31
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		addis r31, r31, 0x1000    # move to next SR
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		addis r31, r31, 0x1000    # move to next SR
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181
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		bdnz seg_fill
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		bdnz seg_fill
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183
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	# invalidate block address translation registers
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	# invalidate block address translation registers
121
185
122 
	mtspr ibat0u, r30
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	mtspr ibat0u, r30
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	mtspr ibat0l, r30
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	mtspr ibat0l, r30
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	mtspr ibat1u, r30
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	mtspr ibat1u, r30
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	mtspr ibat1l, r30
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	mtspr ibat1l, r30
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191
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	mtspr ibat2u, r30
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	mtspr ibat2u, r30
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	mtspr ibat2l, r30
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	mtspr ibat2l, r30
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194
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	mtspr ibat3u, r30
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	mtspr ibat3u, r30
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	mtspr ibat3l, r30
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	mtspr ibat3l, r30
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	mtspr dbat0u, r30
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	mtspr dbat0u, r30
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	mtspr dbat0l, r30
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	mtspr dbat0l, r30
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200
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	mtspr dbat1u, r30
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	mtspr dbat1u, r30
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	mtspr dbat1l, r30
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	mtspr dbat1l, r30
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203
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	mtspr dbat2u, r30
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	mtspr dbat2u, r30
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	mtspr dbat2l, r30
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	mtspr dbat2l, r30
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206
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	mtspr dbat3u, r30
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	mtspr dbat3u, r30
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	mtspr dbat3l, r30
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	mtspr dbat3l, r30
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209
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	# create identity mapping
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	# create identity mapping
147
211
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	# FIXME: map exactly the size of RAM
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	# FIXME: map exactly the size of RAM
149
213
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	lis r31, 0x8000
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	lis r31, 0x8000
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	ori r31, r31, 0x0ffe
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	ori r31, r31, 0x0ffe
152
216
153 
	lis r30, 0x0000
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	lis r30, 0x0000
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	ori r30, r30, 0x0002
 218 
	ori r30, r30, 0x0002
155
219
156 
	mtspr ibat0u, r31
 220 
	mtspr ibat0u, r31
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	mtspr ibat0l, r30
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	mtspr ibat0l, r30
158
222
159 
	mtspr dbat0u, r31
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	mtspr dbat0u, r31
160 
	mtspr dbat0l, r30
 224 
	mtspr dbat0l, r30
161
225
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	# FIXME: temporal framebuffer mapping
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	# FIXME: temporal framebuffer mapping
163
227
164 
	lis r31, 0xf000
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	lis r31, 0xf000
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	ori r31, r31, 0x0ffe
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	ori r31, r31, 0x0ffe
166
230
167 
	lis r30, 0x8400
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	lis r30, 0x8400
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	ori r30, r30, 0x0002
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	ori r30, r30, 0x0002
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233
170 
	mtspr dbat1u, r31
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	mtspr dbat1u, r31
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	mtspr dbat1l, r30
 235 
	mtspr dbat1l, r30
172
236
173 
	tlbia
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	tlbia
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238
175 
	# start the kernel
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	# start the kernel
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	#
 240 
	#
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	# r3 = memmap (pa)
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	# r3 = memmap (pa)
178
242
179 
	lis r31, KERNEL_START_ADDR@ha
 243 
	lis r31, KERNEL_START_ADDR@ha
180 
	addi r31, r31, KERNEL_START_ADDR@l
 244 
	addi r31, r31, KERNEL_START_ADDR@l
181
245
182 
	mtspr srr0, r31
 246 
	mtspr srr0, r31
183
247
184 
	mfmsr r31
 248 
	mfmsr r31
185 
	ori r31, r31, (msr_ir | msr_dr)@l
 249 
	ori r31, r31, (msr_ir | msr_dr)@l
186 
	mtspr srr1, r31
 250 
	mtspr srr1, r31
187
251
188 
	rfi
 252 
	rfi
189 
 
 253 
 
190 
.align PAGE_WIDTH
 254 
.align PAGE_WIDTH
191 
.global trans
 255 
.global trans
192 
trans:
 256 
trans:
193 
	.space (TRANS_SIZE * TRANS_ITEM_SIZE)
 257 
	.space (TRANS_SIZE * TRANS_ITEM_SIZE)
194 
 
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