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#ifndef __mips32_ATOMIC_H__
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#ifndef __mips32_ATOMIC_H__
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#define __mips32_ATOMIC_H__
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#define __mips32_ATOMIC_H__
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#include <arch/types.h>
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#include <arch/types.h>
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#define atomic_inc(x)   (a_add(x,1))
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#define atomic_inc(x)   ((void) atomic_add(x, 1))
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#define atomic_dec(x)   (a_sub(x,1))
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#define atomic_dec(x)   ((void) atomic_add(x, -1))
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#define atomic_inc_pre(x) (a_add(x,1)-1)
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#define atomic_inc_pre(x) (atomic_add(x, 1) - 1)
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#define atomic_dec_pre(x) (a_sub(x,1)+1)
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#define atomic_dec_pre(x) (atomic_add(x, -1) + 1)
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#define atomic_inc_post(x) (a_add(x,1))
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#define atomic_inc_post(x) atomic_add(x, 1)
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#define atomic_dec_post(x) (a_sub(x,1))
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#define atomic_dec_post(x) atomic_add(x, -1)
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typedef volatile __u32 atomic_t;
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typedef volatile __u32 atomic_t;
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/*
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 * Atomic addition
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/* Atomic addition of immediate value.
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 *
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 *
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 * This case is harder, and we have to use the special LL and SC operations
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 * to achieve atomicity. The instructions are similar to LW (load) and SW
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 * (store), except that the LL (load-linked) instruction loads the address
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 * of the variable to a special register and if another process writes to
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 * the same location, the SC (store-conditional) instruction fails.
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 * @param val Memory location to which will be the immediate value added.
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 Returns (*val)+i
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 */
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static inline atomic_t a_add(atomic_t *val, int i)
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 * @param i Signed immediate that will be added to *val.
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{
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    atomic_t tmp, tmp2;
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    asm volatile (
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        "   .set    push\n"
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        "   .set    noreorder\n"
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        "   nop\n"
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        "1:\n"
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        "   ll  %0, %1\n"
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        "   addu    %0, %0, %3\n"
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        "       move    %2, %0\n"
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        "   sc  %0, %1\n"
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        "   beq %0, 0x0, 1b\n"
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        "   move    %0, %2\n"
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        "   .set    pop\n"
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        : "=&r" (tmp), "=o" (*val), "=r" (tmp2)
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        : "r" (i)
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        );
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    return tmp;
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}
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/*
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 * Atomic subtraction
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 *
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 *
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 * Implemented in the same manner as a_add, except we substract the value.
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 Returns (*val)-i
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 * @return Value after addition.
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 */
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 */
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static inline atomic_t a_sub(atomic_t *val, int i)
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static inline atomic_t atomic_add(atomic_t *val, int i)
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{
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{
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    atomic_t tmp, tmp2;
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    atomic_t tmp, v;
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    asm volatile (
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    __asm__ volatile (
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        "   .set    push\n"
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        "   .set    noreorder\n"
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        "   nop\n"
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        "1:\n"
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        "1:\n"
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        "   ll  %0, %1\n"
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        "   ll %0, %1\n"
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        "   subu    %0, %0, %3\n"
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        "   addiu %0, %0, %3\n" /* same as addi, but never traps on overflow */
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        "       move    %2, %0\n"
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        "       move %2, %0\n"
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        "   sc  %0, %1\n"
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        "   sc %0, %1\n"
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        "   beq %0, 0x0, 1b\n"
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        "   beq %0, %4, 1b\n"   /* if the atomic operation failed, try again */
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        "       move    %0, %2\n"
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        /*  nop */      /* nop is inserted automatically by compiler */
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        "   .set    pop\n"
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        : "=&r" (tmp), "=o" (*val), "=r" (tmp2)
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        : "=r" (tmp), "=m" (*val), "=r" (v)
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        : "r" (i)
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        : "i" (i), "i" (0)
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        );
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        );
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    return tmp;
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    return v;
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}
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}
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#endif
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#endif