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| Line 27... | Line 27... | ||
| 27 | */ |
27 | */ |
| 28 | 28 | ||
| 29 | #ifndef __mips32_ATOMIC_H__ |
29 | #ifndef __mips32_ATOMIC_H__ |
| 30 | #define __mips32_ATOMIC_H__ |
30 | #define __mips32_ATOMIC_H__ |
| 31 | 31 | ||
| - | 32 | #include <arch/types.h> |
|
| - | 33 | ||
| 32 | #define atomic_inc(x) (a_add(x,1)) |
34 | #define atomic_inc(x) (a_add(x,1)) |
| 33 | #define atomic_dec(x) (a_sub(x,1)) |
35 | #define atomic_dec(x) (a_sub(x,1)) |
| 34 | 36 | ||
| - | 37 | typedef volatile __u32 atomic_t; |
|
| - | 38 | ||
| 35 | /* |
39 | /* |
| 36 | * Atomic addition |
40 | * Atomic addition |
| 37 | * |
41 | * |
| 38 | * This case is harder, and we have to use the special LL and SC operations |
42 | * This case is harder, and we have to use the special LL and SC operations |
| 39 | * to achieve atomicity. The instructions are similar to LW (load) and SW |
43 | * to achieve atomicity. The instructions are similar to LW (load) and SW |
| 40 | * (store), except that the LL (load-linked) instruction loads the address |
44 | * (store), except that the LL (load-linked) instruction loads the address |
| 41 | * of the variable to a special register and if another process writes to |
45 | * of the variable to a special register and if another process writes to |
| 42 | * the same location, the SC (store-conditional) instruction fails. |
46 | * the same location, the SC (store-conditional) instruction fails. |
| 43 | */ |
47 | */ |
| 44 | static inline int a_add( volatile int *val, int i) |
48 | static inline atomic_t a_add(atomic_t *val, int i) |
| 45 | { |
49 | { |
| 46 | int tmp, tmp2; |
50 | atomic_t tmp, tmp2; |
| 47 | 51 | ||
| 48 | asm volatile ( |
52 | asm volatile ( |
| 49 | " .set push\n" |
53 | " .set push\n" |
| 50 | " .set noreorder\n" |
54 | " .set noreorder\n" |
| 51 | " nop\n" |
55 | " nop\n" |
| Line 67... | Line 71... | ||
| 67 | /* |
71 | /* |
| 68 | * Atomic subtraction |
72 | * Atomic subtraction |
| 69 | * |
73 | * |
| 70 | * Implemented in the same manner as a_add, except we substract the value. |
74 | * Implemented in the same manner as a_add, except we substract the value. |
| 71 | */ |
75 | */ |
| 72 | static inline int a_sub( volatile int *val, int i) |
76 | static inline atomic_t a_sub(atomic_t *val, int i) |
| 73 | 77 | ||
| 74 | { |
78 | { |
| 75 | int tmp, tmp2; |
79 | atomic_t tmp, tmp2; |
| 76 | 80 | ||
| 77 | asm volatile ( |
81 | asm volatile ( |
| 78 | " .set push\n" |
82 | " .set push\n" |
| 79 | " .set noreorder\n" |
83 | " .set noreorder\n" |
| 80 | " nop\n" |
84 | " nop\n" |