WebSVN – HelenOS-historic – Diff – /SPARTAN/trunk/arch/mips/src/mips.c


/*
 * Copyright (C) 2003-2004 Jakub Jermar
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the distribution.
 * - The name of the author may not be used to endorse or promote products
 *   derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */
 
#include <arch.h>
#include <arch/cp0.h>
#include <arch/exception.h>
#include <arch/asm/regname.h>
#include <arch/asm.h>
#include <mm/vm.h>
#include <userspace.h>
#include <arch/console.h>
#include <memstr.h>
 
/* Size of the code jumping to the exception handler code
 * - J+NOP
 */
#define EXCEPTION_JUMP_SIZE    8
 
#define TLB_EXC ((char *) 0x80000000)
#define NORM_EXC ((char *) 0x80000180)
#define CACHE_EXC ((char *) 0x80000100)
 
#include <arch/debug.h>
 
void arch_pre_mm_init(void)
{
    /* Copy the exception vectors to the right places */
    memcpy(TLB_EXC, (char *)tlb_refill_entry, EXCEPTION_JUMP_SIZE);
    memcpy(NORM_EXC, (char *)exception_entry, EXCEPTION_JUMP_SIZE);
    memcpy(CACHE_EXC, (char *)cache_error_entry, EXCEPTION_JUMP_SIZE);
 
 
    /*
     * Switch to BEV normal level so that exception vectors point to the kernel.
     * Clear the error level.
     */
    cp0_status_write(cp0_status_read() & ~(cp0_status_bev_bootstrap_bit|cp0_status_erl_error_bit));
 
    /*
     * Unmask hardware clock interrupt.
     */
    cp0_status_write(cp0_status_read() | (1<<cp0_status_im7_shift));
 
    /*
     * Start hardware clock.
     */
    cp0_compare_write(cp0_compare_value + cp0_count_read());
 
    console_init();
}
 
void arch_post_mm_init(void)
{
}
 
void arch_late_init(void)
{
}
 
void userspace(void)
{
    /* EXL=1, UM=1, IE=1 */
    cp0_status_write(cp0_status_read() | (cp0_status_exl_exception_bit |
                          cp0_status_um_bit |
                          cp0_status_ie_enabled_bit));
   
    cp0_epc_write(UTEXT_ADDRESS);
    userspace_asm(USTACK_ADDRESS+PAGE_SIZE);
    while (1)
        ;
}
 
/* Stack pointer saved when entering user mode */
/* TODO: How do we do it on SMP system???? */
__address supervisor_sp;
 
void before_thread_runs_arch(void)
{
    supervisor_sp = (__address) &THREAD->kstack[THREAD_STACK_SIZE-SP_DELTA];
}
 
 
 

Rev 324	Rev 326
1	/*	1	/*
2	* Copyright (C) 2003-2004 Jakub Jermar	2	* Copyright (C) 2003-2004 Jakub Jermar
3	* All rights reserved.	3	* All rights reserved.
4	*	4	*
5	* Redistribution and use in source and binary forms, with or without	5	* Redistribution and use in source and binary forms, with or without
6	* modification, are permitted provided that the following conditions	6	* modification, are permitted provided that the following conditions
7	* are met:	7	* are met:
8	*	8	*
9	* - Redistributions of source code must retain the above copyright	9	* - Redistributions of source code must retain the above copyright
10	* notice, this list of conditions and the following disclaimer.	10	* notice, this list of conditions and the following disclaimer.
11	* - Redistributions in binary form must reproduce the above copyright	11	* - Redistributions in binary form must reproduce the above copyright
12	* notice, this list of conditions and the following disclaimer in the	12	* notice, this list of conditions and the following disclaimer in the
13	* documentation and/or other materials provided with the distribution.	13	* documentation and/or other materials provided with the distribution.
14	* - The name of the author may not be used to endorse or promote products	14	* - The name of the author may not be used to endorse or promote products
15	* derived from this software without specific prior written permission.	15	* derived from this software without specific prior written permission.
16	*	16	*
17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR	17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES	18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.	19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,	20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT	21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,	22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY	23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT	24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF	25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.	26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27	*/	27	*/
28		28
29	#include <arch.h>	29	#include <arch.h>
30	#include <arch/cp0.h>	30	#include <arch/cp0.h>
31	#include <arch/exception.h>	31	#include <arch/exception.h>
32	#include <arch/asm/regname.h>	32	#include <arch/asm/regname.h>
33	#include <arch/asm.h>	33	#include <arch/asm.h>
34	#include <mm/vm.h>	34	#include <mm/vm.h>
35	#include <userspace.h>	35	#include <userspace.h>
36	#include <arch/console.h>	36	#include <arch/console.h>
-		37	#include <memstr.h>
-		38
-		39	/* Size of the code jumping to the exception handler code
-		40	* - J+NOP
-		41	*/
-		42	#define EXCEPTION_JUMP_SIZE 8
-		43
-		44	#define TLB_EXC ((char *) 0x80000000)
-		45	#define NORM_EXC ((char *) 0x80000180)
-		46	#define CACHE_EXC ((char *) 0x80000100)
-		47
-		48	#include <arch/debug.h>
37		49
38	void arch_pre_mm_init(void)	50	void arch_pre_mm_init(void)
39	{	51	{
-		52	/* Copy the exception vectors to the right places */
-		53	memcpy(TLB_EXC, (char *)tlb_refill_entry, EXCEPTION_JUMP_SIZE);
-		54	memcpy(NORM_EXC, (char *)exception_entry, EXCEPTION_JUMP_SIZE);
-		55	memcpy(CACHE_EXC, (char *)cache_error_entry, EXCEPTION_JUMP_SIZE);
-		56
-		57
40	/*	58	/*
41	* Switch to BEV normal level so that exception vectors point to the kernel.	59	* Switch to BEV normal level so that exception vectors point to the kernel.
42	* Clear the error level.	60	* Clear the error level.
43	*/	61	*/
44	cp0_status_write(cp0_status_read() & ~(cp0_status_bev_bootstrap_bit\|cp0_status_erl_error_bit));	62	cp0_status_write(cp0_status_read() & ~(cp0_status_bev_bootstrap_bit\|cp0_status_erl_error_bit));
45		63
46	/*	64	/*
47	* Unmask hardware clock interrupt.	65	* Unmask hardware clock interrupt.
48	*/	66	*/
49	cp0_status_write(cp0_status_read() \| (1<<cp0_status_im7_shift));	67	cp0_status_write(cp0_status_read() \| (1<<cp0_status_im7_shift));
50		68
51	/*	69	/*
52	* Start hardware clock.	70	* Start hardware clock.
53	*/	71	*/
54	cp0_compare_write(cp0_compare_value + cp0_count_read());	72	cp0_compare_write(cp0_compare_value + cp0_count_read());
55		73
56	console_init();	74	console_init();
57	}	75	}
58		76
59	void arch_post_mm_init(void)	77	void arch_post_mm_init(void)
60	{	78	{
61	}	79	}
62		80
63	void arch_late_init(void)	81	void arch_late_init(void)
64	{	82	{
65	}	83	}
66		84
67	void userspace(void)	85	void userspace(void)
68	{	86	{
69	/* EXL=1, UM=1, IE=1 */	87	/* EXL=1, UM=1, IE=1 */
70	cp0_status_write(cp0_status_read() \| (cp0_status_exl_exception_bit \|	88	cp0_status_write(cp0_status_read() \| (cp0_status_exl_exception_bit \|
71	cp0_status_um_bit \|	89	cp0_status_um_bit \|
72	cp0_status_ie_enabled_bit));	90	cp0_status_ie_enabled_bit));
73		91
74	cp0_epc_write(UTEXT_ADDRESS);	92	cp0_epc_write(UTEXT_ADDRESS);
75	userspace_asm(USTACK_ADDRESS+PAGE_SIZE);	93	userspace_asm(USTACK_ADDRESS+PAGE_SIZE);
76	while (1)	94	while (1)
77	;	95	;
78	}	96	}
79		97
80	/* Stack pointer saved when entering user mode */	98	/* Stack pointer saved when entering user mode */
81	/* TODO: How do we do it on SMP system???? */	99	/* TODO: How do we do it on SMP system???? */
82	__address supervisor_sp;	100	__address supervisor_sp;
83		101
84	void before_thread_runs_arch(void)	102	void before_thread_runs_arch(void)
85	{	103	{
86	supervisor_sp = (__address) &THREAD->kstack[THREAD_STACK_SIZE-SP_DELTA];	104	supervisor_sp = (__address) &THREAD->kstack[THREAD_STACK_SIZE-SP_DELTA];
87	}	105	}
88		106
89		107
90		108

Subversion Repositories HelenOS-historic

(root)/SPARTAN/trunk/arch/mips/src/mips.c – Rev 324 → 326