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| 24 | # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| 25 | # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
| 26 | # THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | # THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| 27 | # |
27 | # |
| 28 | 28 | ||
| - | 29 | #include <arch/asm/regname.h> |
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| - | 30 | ||
| 29 | .text |
31 | .text |
| 30 | 32 | ||
| 31 | .macro cp0_read reg |
33 | .macro cp0_read reg |
| 32 | mfc0 $2,\reg |
34 | mfc0 $2,\reg |
| 33 | j $31 |
35 | j $31 |
| Line 113... | Line 115... | ||
| 113 | cp0_epc_write: cp0_write $14 |
115 | cp0_epc_write: cp0_write $14 |
| 114 | 116 | ||
| 115 | cp0_prid_read: cp0_read $15 |
117 | cp0_prid_read: cp0_read $15 |
| 116 | 118 | ||
| 117 | 119 | ||
| 118 | .global tlbp |
- | |
| 119 | tlbp: |
- | |
| 120 | tlbp |
- | |
| 121 | j $31 |
- | |
| 122 | nop |
- | |
| 123 | - | ||
| 124 | .global tlbr |
- | |
| 125 | tlbr: |
- | |
| 126 | tlbr |
- | |
| 127 | j $31 |
- | |
| 128 | nop |
- | |
| 129 | - | ||
| 130 | .global tlbwi |
- | |
| 131 | tlbwi: |
- | |
| 132 | tlbwi |
- | |
| 133 | j $31 |
- | |
| 134 | nop |
- | |
| 135 | - | ||
| 136 | .global tlbwr |
- | |
| 137 | tlbwr: |
- | |
| 138 | tlbwr |
- | |
| 139 | j $31 |
- | |
| 140 | nop |
- | |
| 141 | - | ||
| 142 | .global cpu_halt |
120 | .global cpu_halt |
| 143 | cpu_halt: |
121 | cpu_halt: |
| 144 | j cpu_halt |
122 | j cpu_halt |
| 145 | nop |
123 | nop |
| 146 | 124 | ||
| Line 153... | Line 131... | ||
| 153 | .global memcpy |
131 | .global memcpy |
| 154 | memcpy: |
132 | memcpy: |
| 155 | j _memcpy |
133 | j _memcpy |
| 156 | nop |
134 | nop |
| 157 | 135 | ||
| - | 136 | .macro fpu_gp_save reg ctx |
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| - | 137 | mfc1 $t0,$\reg |
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| - | 138 | sw $t0, \reg*4(\ctx) |
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| - | 139 | .endm |
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| - | 140 | ||
| - | 141 | .macro fpu_gp_restore reg ctx |
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| - | 142 | lw $t0, \reg*4(\ctx) |
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| - | 143 | mtc1 $t0,$\reg |
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| - | 144 | .endm |
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| - | 145 | ||
| - | 146 | .macro fpu_ct_save reg ctx |
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| - | 147 | cfc1 $t0,$1 |
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| - | 148 | sw $t0, (\reg+32)*4(\ctx) |
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| - | 149 | .endm |
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| - | 150 | ||
| - | 151 | .macro fpu_ct_restore reg ctx |
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| - | 152 | lw $t0, (\reg+32)*4(\ctx) |
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| - | 153 | ctc1 $t0,$\reg |
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| - | 154 | .endm |
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| - | 155 | ||
| - | 156 | ||
| - | 157 | .global fpu_context_save |
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| - | 158 | fpu_context_save: |
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| - | 159 | #ifdef HAVE_FPU |
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| - | 160 | fpu_gp_save 0,$a0 |
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| - | 161 | fpu_gp_save 1,$a0 |
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| - | 162 | fpu_gp_save 2,$a0 |
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| - | 163 | fpu_gp_save 3,$a0 |
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| - | 164 | fpu_gp_save 4,$a0 |
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| - | 165 | fpu_gp_save 5,$a0 |
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| - | 166 | fpu_gp_save 6,$a0 |
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| - | 167 | fpu_gp_save 7,$a0 |
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| - | 168 | fpu_gp_save 8,$a0 |
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| - | 169 | fpu_gp_save 9,$a0 |
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| - | 170 | fpu_gp_save 10,$a0 |
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| - | 171 | fpu_gp_save 11,$a0 |
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| - | 172 | fpu_gp_save 12,$a0 |
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| - | 173 | fpu_gp_save 13,$a0 |
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| - | 174 | fpu_gp_save 14,$a0 |
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| - | 175 | fpu_gp_save 15,$a0 |
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| - | 176 | fpu_gp_save 16,$a0 |
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| - | 177 | fpu_gp_save 17,$a0 |
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| - | 178 | fpu_gp_save 18,$a0 |
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| - | 179 | fpu_gp_save 19,$a0 |
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| - | 180 | fpu_gp_save 20,$a0 |
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| - | 181 | fpu_gp_save 21,$a0 |
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| - | 182 | fpu_gp_save 22,$a0 |
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| - | 183 | fpu_gp_save 23,$a0 |
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| - | 184 | fpu_gp_save 24,$a0 |
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| - | 185 | fpu_gp_save 25,$a0 |
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| - | 186 | fpu_gp_save 26,$a0 |
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| - | 187 | fpu_gp_save 27,$a0 |
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| - | 188 | fpu_gp_save 28,$a0 |
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| - | 189 | fpu_gp_save 29,$a0 |
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| - | 190 | fpu_gp_save 30,$a0 |
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| - | 191 | fpu_gp_save 31,$a0 |
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| - | 192 | ||
| - | 193 | fpu_ct_save 1,$a0 |
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| - | 194 | fpu_ct_save 2,$a0 |
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| - | 195 | fpu_ct_save 3,$a0 |
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| - | 196 | fpu_ct_save 4,$a0 |
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| - | 197 | fpu_ct_save 5,$a0 |
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| - | 198 | fpu_ct_save 6,$a0 |
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| - | 199 | fpu_ct_save 7,$a0 |
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| - | 200 | fpu_ct_save 8,$a0 |
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| - | 201 | fpu_ct_save 9,$a0 |
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| - | 202 | fpu_ct_save 10,$a0 |
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| - | 203 | fpu_ct_save 11,$a0 |
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| - | 204 | fpu_ct_save 12,$a0 |
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| - | 205 | fpu_ct_save 13,$a0 |
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| - | 206 | fpu_ct_save 14,$a0 |
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| - | 207 | fpu_ct_save 15,$a0 |
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| - | 208 | fpu_ct_save 16,$a0 |
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| - | 209 | fpu_ct_save 17,$a0 |
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| - | 210 | fpu_ct_save 18,$a0 |
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| - | 211 | fpu_ct_save 19,$a0 |
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| - | 212 | fpu_ct_save 20,$a0 |
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| - | 213 | fpu_ct_save 21,$a0 |
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| - | 214 | fpu_ct_save 22,$a0 |
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| - | 215 | fpu_ct_save 23,$a0 |
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| - | 216 | fpu_ct_save 24,$a0 |
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| - | 217 | fpu_ct_save 25,$a0 |
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| - | 218 | fpu_ct_save 26,$a0 |
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| - | 219 | fpu_ct_save 27,$a0 |
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| - | 220 | fpu_ct_save 28,$a0 |
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| - | 221 | fpu_ct_save 29,$a0 |
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| - | 222 | fpu_ct_save 30,$a0 |
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| - | 223 | fpu_ct_save 31,$a0 |
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| - | 224 | #endif |
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| - | 225 | j $ra |
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| - | 226 | nop |
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| - | 227 | ||
| - | 228 | .global fpu_context_restore |
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| - | 229 | fpu_context_restore: |
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| - | 230 | #ifdef HAVE_FPU |
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| - | 231 | fpu_gp_restore 0,$a0 |
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| - | 232 | fpu_gp_restore 1,$a0 |
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| - | 233 | fpu_gp_restore 2,$a0 |
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| - | 234 | fpu_gp_restore 3,$a0 |
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| - | 235 | fpu_gp_restore 4,$a0 |
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| - | 236 | fpu_gp_restore 5,$a0 |
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| - | 237 | fpu_gp_restore 6,$a0 |
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| - | 238 | fpu_gp_restore 7,$a0 |
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| - | 239 | fpu_gp_restore 8,$a0 |
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| - | 240 | fpu_gp_restore 9,$a0 |
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| - | 241 | fpu_gp_restore 10,$a0 |
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| - | 242 | fpu_gp_restore 11,$a0 |
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| - | 243 | fpu_gp_restore 12,$a0 |
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| - | 244 | fpu_gp_restore 13,$a0 |
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| - | 245 | fpu_gp_restore 14,$a0 |
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| - | 246 | fpu_gp_restore 15,$a0 |
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| - | 247 | fpu_gp_restore 16,$a0 |
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| - | 248 | fpu_gp_restore 17,$a0 |
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| - | 249 | fpu_gp_restore 18,$a0 |
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| - | 250 | fpu_gp_restore 19,$a0 |
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| - | 251 | fpu_gp_restore 20,$a0 |
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| - | 252 | fpu_gp_restore 21,$a0 |
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| - | 253 | fpu_gp_restore 22,$a0 |
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| - | 254 | fpu_gp_restore 23,$a0 |
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| - | 255 | fpu_gp_restore 24,$a0 |
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| - | 256 | fpu_gp_restore 25,$a0 |
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| - | 257 | fpu_gp_restore 26,$a0 |
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| - | 258 | fpu_gp_restore 27,$a0 |
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| - | 259 | fpu_gp_restore 28,$a0 |
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| - | 260 | fpu_gp_restore 29,$a0 |
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| - | 261 | fpu_gp_restore 30,$a0 |
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| - | 262 | fpu_gp_restore 31,$a0 |
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| - | 263 | ||
| - | 264 | fpu_ct_restore 1,$a0 |
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| - | 265 | fpu_ct_restore 2,$a0 |
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| - | 266 | fpu_ct_restore 3,$a0 |
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| - | 267 | fpu_ct_restore 4,$a0 |
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| - | 268 | fpu_ct_restore 5,$a0 |
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| - | 269 | fpu_ct_restore 6,$a0 |
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| - | 270 | fpu_ct_restore 7,$a0 |
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| - | 271 | fpu_ct_restore 8,$a0 |
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| - | 272 | fpu_ct_restore 9,$a0 |
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| - | 273 | fpu_ct_restore 10,$a0 |
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| - | 274 | fpu_ct_restore 11,$a0 |
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| - | 275 | fpu_ct_restore 12,$a0 |
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| - | 276 | fpu_ct_restore 13,$a0 |
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| - | 277 | fpu_ct_restore 14,$a0 |
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| - | 278 | fpu_ct_restore 15,$a0 |
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| - | 279 | fpu_ct_restore 16,$a0 |
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| - | 280 | fpu_ct_restore 17,$a0 |
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| - | 281 | fpu_ct_restore 18,$a0 |
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| - | 282 | fpu_ct_restore 19,$a0 |
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| - | 283 | fpu_ct_restore 20,$a0 |
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| - | 284 | fpu_ct_restore 21,$a0 |
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| - | 285 | fpu_ct_restore 22,$a0 |
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| - | 286 | fpu_ct_restore 23,$a0 |
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| - | 287 | fpu_ct_restore 24,$a0 |
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| - | 288 | fpu_ct_restore 25,$a0 |
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| - | 289 | fpu_ct_restore 26,$a0 |
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| - | 290 | fpu_ct_restore 27,$a0 |
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| - | 291 | fpu_ct_restore 28,$a0 |
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| - | 292 | fpu_ct_restore 29,$a0 |
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| - | 293 | fpu_ct_restore 30,$a0 |
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| - | 294 | fpu_ct_restore 31,$a0 |
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| - | 295 | #endif |
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| - | 296 | j $ra |
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| - | 297 | nop |
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| - | 298 | ||
| 158 | # THIS IS USERSPACE CODE |
299 | # THIS IS USERSPACE CODE |
| 159 | .global utext |
300 | .global utext |
| 160 | utext: |
301 | utext: |
| 161 | j $31 |
302 | j $31 |
| 162 | nop |
303 | nop |