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| 1 | #include <cpu.h> |
1 | #include <cpu.h> |
| 2 | #include <print.h> |
2 | #include <print.h> |
| 3 | #include <panic.h> |
3 | #include <panic.h> |
| 4 | #include <arch/types.h> |
4 | #include <arch/types.h> |
| 5 | 5 | ||
| 6 | extern int IVT; |
- | |
| 7 | - | ||
| 8 | - | ||
| 9 | - | ||
| 10 | - | ||
| 11 | void cpu_arch_init(void) |
6 | void cpu_arch_init(void) |
| 12 | { |
7 | { |
| 13 | - | ||
| 14 | - | ||
| 15 | - | ||
| 16 | int *p=&IVT; |
- | |
| 17 | volatile __u64 hlp,hlp2; |
- | |
| 18 | - | ||
| 19 | - | ||
| 20 | int psr = 0x2000; |
8 | int psr = 0x2000; |
| 21 | 9 | ||
| 22 | - | ||
| 23 | __asm__ volatile ( |
10 | __asm__ volatile ( |
| 24 | "mov cr2 = %0;;\n" |
- | |
| 25 | "{mov psr.l = %1;;}\n" |
11 | "{mov psr.l = %0 ;;}\n" |
| 26 | "{srlz.i;" |
12 | "{srlz.i;" |
| 27 | "srlz.d;;}" |
13 | "srlz.d ;;}" |
| 28 | : |
14 | : |
| 29 | : "r" (p), "r" (psr) |
15 | : "r" (psr) |
| 30 | ); |
16 | ); |
| 31 | 17 | ||
| 32 | - | ||
| 33 | - | ||
| 34 | /*Switch register bank of regs r16 .. r31 to 1 It is automaticly cleared on exception*/ |
18 | /* Switch to register bank 1. */ |
| 35 | __asm__ volatile |
19 | __asm__ volatile |
| 36 | ( |
20 | ( |
| 37 | "bsw.1;;\n" |
21 | "bsw.1;;\n" |
| 38 | ); |
22 | ); |
| 39 | 23 | ||
| 40 | - | ||
| 41 | } |
24 | } |
| 42 | 25 | ||
| 43 | 26 | ||