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        : "=r" (v)
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        : "=r" (v)
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    );
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    );
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    return v;
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    return v;
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}
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}
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/** Read CR0
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 *
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 * Return value in CR0
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 *
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 * @return Value read.
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 */
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static inline __u64 read_cr0(void)
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{
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    __u64 v;
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    __asm__ volatile ("movq %%cr0,%0" : "=r" (v));
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    return v;
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}
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/** Read CR2
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/** Read CR2
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 *
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 *
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 * Return value in CR2
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 * Return value in CR2
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 *
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 *
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 * @return Value read.
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 * @return Value read.
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 */
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 */
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static inline __u64 read_cr2(void)
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{
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    __u64 v;
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static inline __u64 read_cr2(void) { __u64 v; __asm__ volatile ("movq %%cr2,%0" : "=r" (v)); return v; }
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    __asm__ volatile ("movq %%cr2,%0" : "=r" (v));
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    return v;
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}
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/** Write CR3
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/** Write CR3
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 *
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 *
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 * Write value to CR3.
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 * Write value to CR3.
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 *
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 *
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 * @param v Value to be written.
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 * @param v Value to be written.
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 */
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 */
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static inline void write_cr3(__u64 v)
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{
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static inline void write_cr3(__u64 v) { __asm__ volatile ("movq %0,%%cr3\n" : : "r" (v)); }
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    __asm__ volatile ("movq %0,%%cr3\n" : : "r" (v));
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}
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/** Read CR3
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/** Read CR3
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 *
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 *
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 * Return value in CR3
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 * Return value in CR3
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 *
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 *
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 * @return Value read.
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 * @return Value read.
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 */
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 */
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static inline __u64 read_cr3(void)
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{
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    __u64 v;
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static inline __u64 read_cr3(void) { __u64 v; __asm__ volatile ("movq %%cr3,%0" : "=r" (v)); return v; }
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    __asm__ volatile ("movq %%cr3,%0" : "=r" (v));
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    return v;
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}
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/** Enable local APIC
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/** Enable local APIC
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 *
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 *
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 * Enable local APIC in MSR.
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 * Enable local APIC in MSR.