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      expected to point just after the end of the thread local data. The
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      expected to point just after the end of the thread local data. The
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      application sometimes need to get a real address of the thread local
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      application sometimes need to get a real address of the thread local
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      data in its address space but it is impossible to read the base of the
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      data in its address space but it is impossible to read the base of the
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      FS segmentation register. The solution is to add the self-reference
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      FS segmentation register. The solution is to add the self-reference
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      address to the end of thread local data, so that the application can
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      address to the end of thread local data, so that the application can
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      read the address as %gs:0. </para>
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      read the address as %gs:0.</para>
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      <figure float="1">
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      <figure float="1">
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        <title>IA32 &amp; AMD64</title>
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        <title>IA32 &amp; AMD64</title>
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        <mediaobject id="tldia32">
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        <mediaobject id="tldia32">
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            <imagedata fileref="images/tld_mips.svg" format="SVG" />
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            <imagedata fileref="images/tld_mips.svg" format="SVG" />
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          </imageobject>
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          </imageobject>
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        </mediaobject>
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        </mediaobject>
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      </figure>
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      </figure>
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    </section>
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    </section>
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    <section>
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      <title>Lazy FPU Context Switching</title>
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      <para>Implementing lazy FPU switching on MIPS architecture is
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      straightforward. When coprocessor CP1 is disabled, any FPU intruction
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      raises a Coprocessor Unusable exception. The generic lazy FPU context
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      switch is then called that takes care of the correct context
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      save/restore.</para>
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    </section>
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  </section>
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  </section>
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  <section>
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  <section>
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    <title>Power PC</title>
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    <title>Power PC</title>
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    <para>PowerPC allows kernel to enable mode, where data and intruction
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    memory reads are not translated through virtual memory mapping
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    (<emphasis>real mode</emphasis>). The real mode is automatically enabled
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    when an exception occurs. However, the kernel uses the same memory
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    structure as on other 32-bit platforms - physical memory is mapped into
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    the top 2GB, userspace memory is available in the bottom half of the
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    32-bit address space.</para>
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    <section>
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      <title>OpenFirmware Boot</title>
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      <para>The OpenFirmware loads an image of HelenOS operating system and
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      passes control to the HelenOS specific boot loader. The boot loader then
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      performs following tasks:</para>
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      <itemizedlist>
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        <listitem>
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          <para>Fetches information from OpenFirmware regarding memory
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          structure, device information etc.</para>
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        </listitem>
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        <listitem>
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          <para>Switches memory mapping to the real mode.</para>
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        </listitem>
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        <listitem>
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          <para>Copies the kernel to proper physical address.</para>
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        </listitem>
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        <listitem>
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          <para>Creates basic memory mapping and switches to the new kernel
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          mapping, in which the kernel can run.</para>
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        </listitem>
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        <listitem>
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          <para>Passes control to the kernel <function>main_bsp</function>
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          function.</para>
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        </listitem>
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      </itemizedlist>
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    <para></para>
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    </section>
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    <section>
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    <section>
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      <title>Thread Local Storage</title>
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      <title>Thread Local Storage</title>
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      <para>The Power PC thread local storage uses R2 register to hold an
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      <para>The Power PC thread local storage uses R2 register to hold an
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      data. Overally it is the same as on the MIPS architecture.</para>
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      data. Overally it is the same as on the MIPS architecture.</para>
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    </section>
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    </section>
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  </section>
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  </section>
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  <section>
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  <section>
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    <title>IA-64</title>
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    <title>IA64</title>
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    <para></para>
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    <para></para>
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    <figure float="1">
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    <section>
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      <title>IA64</title>
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      <title>Thread Local Storage</title>
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      <para>Although thread local storage is not officially supported in
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      statically linked binaries, GCC supports it without any major obstacles.
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      As a thread pointer is designated register r13, the thread local data
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      section starts at an address r13+16.</para>
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      <para><figure float="1">
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          <title>IA64</title>
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      <mediaobject id="tldia64">
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          <mediaobject id="tldia64">
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        <imageobject role="pdf">
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            <imageobject role="pdf">
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          <imagedata fileref="images/tld_ia64.pdf" format="PDF" />
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              <imagedata fileref="images/tld_ia64.pdf" format="PDF" />
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        </imageobject>
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            </imageobject>
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        <imageobject role="html">
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            <imageobject role="html">
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          <imagedata fileref="images/tld_ia64.png" format="PNG" />
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              <imagedata fileref="images/tld_ia64.png" format="PNG" />
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        </imageobject>
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            </imageobject>
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        <imageobject role="fop">
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            <imageobject role="fop">
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          <imagedata fileref="images/tld_ia64.svg" format="SVG" />
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              <imagedata fileref="images/tld_ia64.svg" format="SVG" />
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        </imageobject>
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            </imageobject>
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      </mediaobject>
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          </mediaobject>
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        </figure></para>
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    </figure>
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    </section>
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  </section>
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  </section>
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</appendix>
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</appendix>
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