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| 1 | ## General configuration directives |
1 | ## General configuration directives |
| 2 | 2 | ||
| 3 | # Architecture |
3 | # Architecture |
| 4 | @ "amd64" AMD64/Intel EM64T |
4 | @ "amd64" AMD64/Intel EM64T |
| 5 | @ "ia32" Intel IA-32 |
5 | @ "ia32" Intel IA-32 |
| - | 6 | @ "ia32xen" Intel IA-32 on Xen hypervisor |
|
| 6 | @ "ia64" Intel IA-64 |
7 | @ "ia64" Intel IA-64 |
| 7 | @ "mips32" MIPS 32-bit |
8 | @ "mips32" MIPS 32-bit |
| 8 | @ "ppc32" PowerPC 32-bit |
9 | @ "ppc32" PowerPC 32-bit |
| 9 | @ "ppc64" PowerPC 64-bit |
10 | @ "ppc64" PowerPC 64-bit |
| 10 | @ "sparc64" Sun UltraSPARC 64-bit |
11 | @ "sparc64" Sun UltraSPARC 64-bit |
| 11 | @ "xen32" Xen 32-bit |
- | |
| 12 | ! ARCH (choice) |
12 | ! ARCH (choice) |
| 13 | 13 | ||
| 14 | # Compiler |
14 | # Compiler |
| 15 | @ "cross" Cross-compiler |
15 | @ "cross" Cross-compiler |
| 16 | @ "native" Native |
16 | @ "native" Native |
| Line 20... | Line 20... | ||
| 20 | @ "pentium4" Pentium 4 |
20 | @ "pentium4" Pentium 4 |
| 21 | @ "pentium3" Pentium 3 |
21 | @ "pentium3" Pentium 3 |
| 22 | @ "athlon-xp" Athlon XP |
22 | @ "athlon-xp" Athlon XP |
| 23 | @ "athlon-mp" Athlon MP |
23 | @ "athlon-mp" Athlon MP |
| 24 | @ "prescott" Prescott |
24 | @ "prescott" Prescott |
| 25 | ! [ARCH=ia32|ARCH=xen32] MACHINE (choice) |
25 | ! [ARCH=ia32|ARCH=ia32xen] MACHINE (choice) |
| 26 | 26 | ||
| 27 | # CPU type |
27 | # CPU type |
| 28 | @ "opteron" Opteron |
28 | @ "opteron" Opteron |
| 29 | ! [ARCH=amd64] MACHINE (choice) |
29 | ! [ARCH=amd64] MACHINE (choice) |
| 30 | 30 | ||
| Line 69... | Line 69... | ||
| 69 | @ "16" |
69 | @ "16" |
| 70 | @ "24" |
70 | @ "24" |
| 71 | ! [(ARCH=ia32|ARCH=amd64)&CONFIG_FB=y] CONFIG_VESA_BPP (choice) |
71 | ! [(ARCH=ia32|ARCH=amd64)&CONFIG_FB=y] CONFIG_VESA_BPP (choice) |
| 72 | 72 | ||
| 73 | # Support for SMP |
73 | # Support for SMP |
| 74 | ! [ARCH=ia32|ARCH=amd64|ARCH=xen32|ARCH=sparc64] CONFIG_SMP (y/n) |
74 | ! [ARCH=ia32|ARCH=amd64|ARCH=ia32xen|ARCH=sparc64] CONFIG_SMP (y/n) |
| 75 | 75 | ||
| 76 | # Improved support for hyperthreading |
76 | # Improved support for hyperthreading |
| 77 | ! [(ARCH=ia32|ARCH=amd64|ARCH=xen32)&CONFIG_SMP=y] CONFIG_HT (y/n) |
77 | ! [(ARCH=ia32|ARCH=amd64|ARCH=ia32xen)&CONFIG_SMP=y] CONFIG_HT (y/n) |
| 78 | 78 | ||
| 79 | # Simics BIOS AP boot fix |
79 | # Simics BIOS AP boot fix |
| 80 | ! [(ARCH=ia32|ARCH=amd64)&CONFIG_SMP=y] CONFIG_SIMICS_FIX (y/n) |
80 | ! [(ARCH=ia32|ARCH=amd64)&CONFIG_SMP=y] CONFIG_SIMICS_FIX (y/n) |
| 81 | 81 | ||
| 82 | # Lazy FPU context switching |
82 | # Lazy FPU context switching |
| 83 | ! [(ARCH=mips32&MACHINE!=msim&MACHINE!=simics)|ARCH=amd64|ARCH=ia32|ARCH=ia64|ARCH=sparc64|ARCH=xen32] CONFIG_FPU_LAZY (y/n) |
83 | ! [(ARCH=mips32&MACHINE!=msim&MACHINE!=simics)|ARCH=amd64|ARCH=ia32|ARCH=ia64|ARCH=sparc64|ARCH=ia32xen] CONFIG_FPU_LAZY (y/n) |
| 84 | 84 | ||
| 85 | # Power off on halt |
85 | # Power off on halt |
| 86 | ! [ARCH=ppc32] CONFIG_POWEROFF (n/y) |
86 | ! [ARCH=ppc32] CONFIG_POWEROFF (n/y) |
| 87 | 87 | ||
| 88 | ## Debugging configuration directives |
88 | ## Debugging configuration directives |
| Line 92... | Line 92... | ||
| 92 | 92 | ||
| 93 | # Deadlock detection support for spinlocks |
93 | # Deadlock detection support for spinlocks |
| 94 | ! [CONFIG_DEBUG=y&CONFIG_SMP=y] CONFIG_DEBUG_SPINLOCK (y/n) |
94 | ! [CONFIG_DEBUG=y&CONFIG_SMP=y] CONFIG_DEBUG_SPINLOCK (y/n) |
| 95 | 95 | ||
| 96 | # Watchpoint on rewriting AS with zero |
96 | # Watchpoint on rewriting AS with zero |
| 97 | ! [CONFIG_DEBUG=y&(ARCH=amd64|ARCH=ia32|ARCH=xen32)] CONFIG_DEBUG_AS_WATCHPOINT (y/n) |
97 | ! [CONFIG_DEBUG=y&(ARCH=amd64|ARCH=ia32|ARCH=ia32xen)] CONFIG_DEBUG_AS_WATCHPOINT (y/n) |
| 98 | 98 | ||
| 99 | # Save all interrupt registers |
99 | # Save all interrupt registers |
| 100 | ! [CONFIG_DEBUG=y&(ARCH=amd64|ARCH=mips32|ARCH=ia32|ARCH=xen32)] CONFIG_DEBUG_ALLREGS (y/n) |
100 | ! [CONFIG_DEBUG=y&(ARCH=amd64|ARCH=mips32|ARCH=ia32|ARCH=ia32xen)] CONFIG_DEBUG_ALLREGS (y/n) |
| 101 | 101 | ||
| 102 | # Use VHPT |
102 | # Use VHPT |
| 103 | ! [ARCH=ia64] CONFIG_VHPT (n/y) |
103 | ! [ARCH=ia64] CONFIG_VHPT (n/y) |
| 104 | 104 | ||
| 105 | # Use TSB |
105 | # Use TSB |
| Line 122... | Line 122... | ||
| 122 | @ "synch/rwlock3" Read write test 3 |
122 | @ "synch/rwlock3" Read write test 3 |
| 123 | @ "synch/rwlock4" Read write test 4 |
123 | @ "synch/rwlock4" Read write test 4 |
| 124 | @ "synch/rwlock5" Read write test 5 |
124 | @ "synch/rwlock5" Read write test 5 |
| 125 | @ "synch/semaphore1" Semaphore test 1 |
125 | @ "synch/semaphore1" Semaphore test 1 |
| 126 | @ "synch/semaphore2" Sempahore test 2 |
126 | @ "synch/semaphore2" Sempahore test 2 |
| 127 | @ [ARCH=ia32|ARCH=amd64|ARCH=ia64|ARCH=xen32] "fpu/fpu1" Intel FPU test 1 |
127 | @ [ARCH=ia32|ARCH=amd64|ARCH=ia64|ARCH=ia32xen] "fpu/fpu1" Intel FPU test 1 |
| 128 | @ [ARCH=ia32|ARCH=amd64|ARCH=xen32] "fpu/sse1" Intel SSE test 1 |
128 | @ [ARCH=ia32|ARCH=amd64|ARCH=ia32xen] "fpu/sse1" Intel SSE test 1 |
| 129 | @ [ARCH=mips32&MACHINE!=msim&MACHINE!=simics] "fpu/mips1" MIPS FPU test 1 |
129 | @ [ARCH=mips32&MACHINE!=msim&MACHINE!=simics] "fpu/mips1" MIPS FPU test 1 |
| 130 | @ "print/print1" Printf test 1 |
130 | @ "print/print1" Printf test 1 |
| 131 | @ "thread/thread1" Thread test 1 |
131 | @ "thread/thread1" Thread test 1 |
| 132 | @ "mm/mapping1" Mapping test 1 |
132 | @ "mm/mapping1" Mapping test 1 |
| 133 | @ "mm/falloc1" Frame Allocation test 1 |
133 | @ "mm/falloc1" Frame Allocation test 1 |