WebSVN – HelenOS – Diff – /trunk/kernel/genarch/src/acpi/madt.c


/*
 * Copyright (c) 2005 Jakub Jermar
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the distribution.
 * - The name of the author may not be used to endorse or promote products
 *   derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */
 
/** @addtogroup genarch
 * @{
 */
/**
 * @file
 * @brief   Multiple APIC Description Table (MADT) parsing.
 */
 
#include <arch/types.h>
 
#include <genarch/acpi/acpi.h>
#include <genarch/acpi/madt.h>
#include <arch/smp/apic.h>
#include <arch/smp/smp.h>
#include <panic.h>
#include <debug.h>
#include <config.h>
#include <print.h>
#include <mm/slab.h>
#include <memstr.h>
#include <sort.h>
 
struct acpi_madt *acpi_madt = NULL;
 
#ifdef CONFIG_SMP
 
/** Standard ISA IRQ map; can be overriden by Interrupt Source Override entries of MADT. */
int isa_irq_map[] = { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 };
 
static void madt_l_apic_entry(struct madt_l_apic *la, uint32_t index);
static void madt_io_apic_entry(struct madt_io_apic *ioa, uint32_t index);
static void madt_intr_src_ovrd_entry(struct madt_intr_src_ovrd *override, uint32_t index);
static int madt_cmp(void * a, void * b);
 
struct madt_l_apic *madt_l_apic_entries = NULL;
struct madt_io_apic *madt_io_apic_entries = NULL;
 
index_t madt_l_apic_entry_index = 0;
index_t madt_io_apic_entry_index = 0;
count_t madt_l_apic_entry_cnt = 0;
count_t madt_io_apic_entry_cnt = 0;
count_t cpu_count = 0;
 
struct madt_apic_header * * madt_entries_index = NULL;
int madt_entries_index_cnt = 0;
 
char *entry[] = {
    "L_APIC",
    "IO_APIC",
    "INTR_SRC_OVRD",
    "NMI_SRC",
    "L_APIC_NMI",
    "L_APIC_ADDR_OVRD",
    "IO_SAPIC",
    "L_SAPIC",
    "PLATFORM_INTR_SRC"
};
 
/*
 * ACPI MADT Implementation of SMP configuration interface.
 */
static count_t madt_cpu_count(void);
static bool madt_cpu_enabled(index_t i);
static bool madt_cpu_bootstrap(index_t i);
static uint8_t madt_cpu_apic_id(index_t i);
static int madt_irq_to_pin(int irq);
 
struct smp_config_operations madt_config_operations = {
    .cpu_count = madt_cpu_count,
    .cpu_enabled = madt_cpu_enabled,
    .cpu_bootstrap = madt_cpu_bootstrap,
    .cpu_apic_id = madt_cpu_apic_id,
    .irq_to_pin = madt_irq_to_pin
};
 
count_t madt_cpu_count(void)
{
    return madt_l_apic_entry_cnt;
}
 
bool madt_cpu_enabled(index_t i)
{
    ASSERT(i < madt_l_apic_entry_cnt);
    return ((struct madt_l_apic *) madt_entries_index[madt_l_apic_entry_index + i])->flags & 0x1;
 
}
 
bool madt_cpu_bootstrap(index_t i)
{
    ASSERT(i < madt_l_apic_entry_cnt);
    return ((struct madt_l_apic *) madt_entries_index[madt_l_apic_entry_index + i])->apic_id == l_apic_id();
}
 
uint8_t madt_cpu_apic_id(index_t i)
{
    ASSERT(i < madt_l_apic_entry_cnt);
    return ((struct madt_l_apic *) madt_entries_index[madt_l_apic_entry_index + i])->apic_id;
}
 
int madt_irq_to_pin(int irq)
{
    ASSERT(irq < sizeof(isa_irq_map)/sizeof(int));
        return isa_irq_map[irq];
}
 
int madt_cmp(void * a, void * b)
{
    return
        (((struct madt_apic_header *) a)->type > ((struct madt_apic_header *) b)->type) ?
        1 :
        ((((struct madt_apic_header *) a)->type < ((struct madt_apic_header *) b)->type) ? -1 : 0);
}
   
void acpi_madt_parse(void)
{
    struct madt_apic_header *end = (struct madt_apic_header *) (((uint8_t *) acpi_madt) + acpi_madt->header.length);
    struct madt_apic_header *h;
   
        l_apic = (uint32_t *) (unative_t) acpi_madt->l_apic_address;
 
    /* calculate madt entries */
    for (h = &acpi_madt->apic_header[0]; h < end; h = (struct madt_apic_header *) (((uint8_t *) h) + h->length)) {
        madt_entries_index_cnt++;
    }
 
    /* create madt apic entries index array */
    madt_entries_index = (struct madt_apic_header * *) malloc(madt_entries_index_cnt * sizeof(struct madt_apic_header * *), FRAME_ATOMIC);
    if (!madt_entries_index)
        panic("Memory allocation error.");
 
    uint32_t index = 0;
 
    for (h = &acpi_madt->apic_header[0]; h < end; h = (struct madt_apic_header *) (((uint8_t *) h) + h->length)) {
        madt_entries_index[index++] = h;
    }
 
    /* Quicksort MADT index structure */
    qsort(madt_entries_index, madt_entries_index_cnt, sizeof(uintptr_t), &madt_cmp);
 
    /* Parse MADT entries */   
    for (index = 0; index < madt_entries_index_cnt - 1; index++) {
        h = madt_entries_index[index];
        switch (h->type) {
            case MADT_L_APIC:
                madt_l_apic_entry((struct madt_l_apic *) h, index);
                break;
            case MADT_IO_APIC:
                madt_io_apic_entry((struct madt_io_apic *) h, index);
                break;
            case MADT_INTR_SRC_OVRD:
                madt_intr_src_ovrd_entry((struct madt_intr_src_ovrd *) h, index);
                break;
            case MADT_NMI_SRC:
            case MADT_L_APIC_NMI:
            case MADT_L_APIC_ADDR_OVRD:
            case MADT_IO_SAPIC:
            case MADT_L_SAPIC:
            case MADT_PLATFORM_INTR_SRC:
                printf("MADT: skipping %s entry (type=%zd)\n", entry[h->type], h->type);
                break;
 
            default:
                if (h->type >= MADT_RESERVED_SKIP_BEGIN && h->type <= MADT_RESERVED_SKIP_END) {
                    printf("MADT: skipping reserved entry (type=%zd)\n", h->type);
                }
                if (h->type >= MADT_RESERVED_OEM_BEGIN) {
                    printf("MADT: skipping OEM entry (type=%zd)\n", h->type);
                }
                break;
        }
   
   
    }
   
 
    if (cpu_count)
        config.cpu_count = cpu_count;
}
 
 
void madt_l_apic_entry(struct madt_l_apic *la, uint32_t index)
{
    if (!madt_l_apic_entry_cnt++) {
        madt_l_apic_entry_index = index;
    }
       
    if (!(la->flags & 0x1)) {
        /* Processor is unusable, skip it. */
        return;
    }
   
    cpu_count++;   
    apic_id_mask |= 1<<la->apic_id;
}
 
void madt_io_apic_entry(struct madt_io_apic *ioa, uint32_t index)
{
    if (!madt_io_apic_entry_cnt++) {
        /* remember index of the first io apic entry */
        madt_io_apic_entry_index = index;
        io_apic = (uint32_t *) (unative_t) ioa->io_apic_address;
    } else {
        /* currently not supported */
        return;
    }
}
 
void madt_intr_src_ovrd_entry(struct madt_intr_src_ovrd *override, uint32_t index)
{
    ASSERT(override->source < sizeof(isa_irq_map)/sizeof(int));
    printf("MADT: ignoring %s entry: bus=%zd, source=%zd, global_int=%zd, flags=%#hx\n",
        entry[override->header.type], override->bus, override->source,
        override->global_int, override->flags);
}
 
#endif /* CONFIG_SMP */
 
/** @}
 */
 

Rev 2071	Rev 2089
1	/*	1	/*
2	* Copyright (c) 2005 Jakub Jermar	2	* Copyright (c) 2005 Jakub Jermar
3	* All rights reserved.	3	* All rights reserved.
4	*	4	*
5	* Redistribution and use in source and binary forms, with or without	5	* Redistribution and use in source and binary forms, with or without
6	* modification, are permitted provided that the following conditions	6	* modification, are permitted provided that the following conditions
7	* are met:	7	* are met:
8	*	8	*
9	* - Redistributions of source code must retain the above copyright	9	* - Redistributions of source code must retain the above copyright
10	* notice, this list of conditions and the following disclaimer.	10	* notice, this list of conditions and the following disclaimer.
11	* - Redistributions in binary form must reproduce the above copyright	11	* - Redistributions in binary form must reproduce the above copyright
12	* notice, this list of conditions and the following disclaimer in the	12	* notice, this list of conditions and the following disclaimer in the
13	* documentation and/or other materials provided with the distribution.	13	* documentation and/or other materials provided with the distribution.
14	* - The name of the author may not be used to endorse or promote products	14	* - The name of the author may not be used to endorse or promote products
15	* derived from this software without specific prior written permission.	15	* derived from this software without specific prior written permission.
16	*	16	*
17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR	17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES	18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.	19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,	20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT	21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,	22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY	23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT	24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF	25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.	26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27	*/	27	*/
28		28
29	/** @addtogroup genarch	29	/** @addtogroup genarch
30	* @{	30	* @{
31	*/	31	*/
32	/**	32	/**
33	* @file	33	* @file
34	* @brief Multiple APIC Description Table (MADT) parsing.	34	* @brief Multiple APIC Description Table (MADT) parsing.
35	*/	35	*/
36		36
37	#include <arch/types.h>	37	#include <arch/types.h>
38	#include <typedefs.h>	-
39	#include <genarch/acpi/acpi.h>	38	#include <genarch/acpi/acpi.h>
40	#include <genarch/acpi/madt.h>	39	#include <genarch/acpi/madt.h>
41	#include <arch/smp/apic.h>	40	#include <arch/smp/apic.h>
42	#include <arch/smp/smp.h>	41	#include <arch/smp/smp.h>
43	#include <panic.h>	42	#include <panic.h>
44	#include <debug.h>	43	#include <debug.h>
45	#include <config.h>	44	#include <config.h>
46	#include <print.h>	45	#include <print.h>
47	#include <mm/slab.h>	46	#include <mm/slab.h>
48	#include <memstr.h>	47	#include <memstr.h>
49	#include <sort.h>	48	#include <sort.h>
50		49
51	struct acpi_madt *acpi_madt = NULL;	50	struct acpi_madt *acpi_madt = NULL;
52		51
53	#ifdef CONFIG_SMP	52	#ifdef CONFIG_SMP
54		53
55	/** Standard ISA IRQ map; can be overriden by Interrupt Source Override entries of MADT. */	54	/** Standard ISA IRQ map; can be overriden by Interrupt Source Override entries of MADT. */
56	int isa_irq_map[] = { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 };	55	int isa_irq_map[] = { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 };
57		56
58	static void madt_l_apic_entry(struct madt_l_apic *la, uint32_t index);	57	static void madt_l_apic_entry(struct madt_l_apic *la, uint32_t index);
59	static void madt_io_apic_entry(struct madt_io_apic *ioa, uint32_t index);	58	static void madt_io_apic_entry(struct madt_io_apic *ioa, uint32_t index);
60	static void madt_intr_src_ovrd_entry(struct madt_intr_src_ovrd *override, uint32_t index);	59	static void madt_intr_src_ovrd_entry(struct madt_intr_src_ovrd *override, uint32_t index);
61	static int madt_cmp(void * a, void * b);	60	static int madt_cmp(void * a, void * b);
62		61
63	struct madt_l_apic *madt_l_apic_entries = NULL;	62	struct madt_l_apic *madt_l_apic_entries = NULL;
64	struct madt_io_apic *madt_io_apic_entries = NULL;	63	struct madt_io_apic *madt_io_apic_entries = NULL;
65		64
66	index_t madt_l_apic_entry_index = 0;	65	index_t madt_l_apic_entry_index = 0;
67	index_t madt_io_apic_entry_index = 0;	66	index_t madt_io_apic_entry_index = 0;
68	count_t madt_l_apic_entry_cnt = 0;	67	count_t madt_l_apic_entry_cnt = 0;
69	count_t madt_io_apic_entry_cnt = 0;	68	count_t madt_io_apic_entry_cnt = 0;
70	count_t cpu_count = 0;	69	count_t cpu_count = 0;
71		70
72	struct madt_apic_header * * madt_entries_index = NULL;	71	struct madt_apic_header * * madt_entries_index = NULL;
73	int madt_entries_index_cnt = 0;	72	int madt_entries_index_cnt = 0;
74		73
75	char *entry[] = {	74	char *entry[] = {
76	"L_APIC",	75	"L_APIC",
77	"IO_APIC",	76	"IO_APIC",
78	"INTR_SRC_OVRD",	77	"INTR_SRC_OVRD",
79	"NMI_SRC",	78	"NMI_SRC",
80	"L_APIC_NMI",	79	"L_APIC_NMI",
81	"L_APIC_ADDR_OVRD",	80	"L_APIC_ADDR_OVRD",
82	"IO_SAPIC",	81	"IO_SAPIC",
83	"L_SAPIC",	82	"L_SAPIC",
84	"PLATFORM_INTR_SRC"	83	"PLATFORM_INTR_SRC"
85	};	84	};
86		85
87	/*	86	/*
88	* ACPI MADT Implementation of SMP configuration interface.	87	* ACPI MADT Implementation of SMP configuration interface.
89	*/	88	*/
90	static count_t madt_cpu_count(void);	89	static count_t madt_cpu_count(void);
91	static bool madt_cpu_enabled(index_t i);	90	static bool madt_cpu_enabled(index_t i);
92	static bool madt_cpu_bootstrap(index_t i);	91	static bool madt_cpu_bootstrap(index_t i);
93	static uint8_t madt_cpu_apic_id(index_t i);	92	static uint8_t madt_cpu_apic_id(index_t i);
94	static int madt_irq_to_pin(int irq);	93	static int madt_irq_to_pin(int irq);
95		94
96	struct smp_config_operations madt_config_operations = {	95	struct smp_config_operations madt_config_operations = {
97	.cpu_count = madt_cpu_count,	96	.cpu_count = madt_cpu_count,
98	.cpu_enabled = madt_cpu_enabled,	97	.cpu_enabled = madt_cpu_enabled,
99	.cpu_bootstrap = madt_cpu_bootstrap,	98	.cpu_bootstrap = madt_cpu_bootstrap,
100	.cpu_apic_id = madt_cpu_apic_id,	99	.cpu_apic_id = madt_cpu_apic_id,
101	.irq_to_pin = madt_irq_to_pin	100	.irq_to_pin = madt_irq_to_pin
102	};	101	};
103		102
104	count_t madt_cpu_count(void)	103	count_t madt_cpu_count(void)
105	{	104	{
106	return madt_l_apic_entry_cnt;	105	return madt_l_apic_entry_cnt;
107	}	106	}
108		107
109	bool madt_cpu_enabled(index_t i)	108	bool madt_cpu_enabled(index_t i)
110	{	109	{
111	ASSERT(i < madt_l_apic_entry_cnt);	110	ASSERT(i < madt_l_apic_entry_cnt);
112	return ((struct madt_l_apic *) madt_entries_index[madt_l_apic_entry_index + i])->flags & 0x1;	111	return ((struct madt_l_apic *) madt_entries_index[madt_l_apic_entry_index + i])->flags & 0x1;
113		112
114	}	113	}
115		114
116	bool madt_cpu_bootstrap(index_t i)	115	bool madt_cpu_bootstrap(index_t i)
117	{	116	{
118	ASSERT(i < madt_l_apic_entry_cnt);	117	ASSERT(i < madt_l_apic_entry_cnt);
119	return ((struct madt_l_apic *) madt_entries_index[madt_l_apic_entry_index + i])->apic_id == l_apic_id();	118	return ((struct madt_l_apic *) madt_entries_index[madt_l_apic_entry_index + i])->apic_id == l_apic_id();
120	}	119	}
121		120
122	uint8_t madt_cpu_apic_id(index_t i)	121	uint8_t madt_cpu_apic_id(index_t i)
123	{	122	{
124	ASSERT(i < madt_l_apic_entry_cnt);	123	ASSERT(i < madt_l_apic_entry_cnt);
125	return ((struct madt_l_apic *) madt_entries_index[madt_l_apic_entry_index + i])->apic_id;	124	return ((struct madt_l_apic *) madt_entries_index[madt_l_apic_entry_index + i])->apic_id;
126	}	125	}
127		126
128	int madt_irq_to_pin(int irq)	127	int madt_irq_to_pin(int irq)
129	{	128	{
130	ASSERT(irq < sizeof(isa_irq_map)/sizeof(int));	129	ASSERT(irq < sizeof(isa_irq_map)/sizeof(int));
131	return isa_irq_map[irq];	130	return isa_irq_map[irq];
132	}	131	}
133		132
134	int madt_cmp(void * a, void * b)	133	int madt_cmp(void * a, void * b)
135	{	134	{
136	return	135	return
137	(((struct madt_apic_header ) a)->type > ((struct madt_apic_header ) b)->type) ?	136	(((struct madt_apic_header ) a)->type > ((struct madt_apic_header ) b)->type) ?
138	1 :	137	1 :
139	((((struct madt_apic_header ) a)->type < ((struct madt_apic_header ) b)->type) ? -1 : 0);	138	((((struct madt_apic_header ) a)->type < ((struct madt_apic_header ) b)->type) ? -1 : 0);
140	}	139	}
141		140
142	void acpi_madt_parse(void)	141	void acpi_madt_parse(void)
143	{	142	{
144	struct madt_apic_header end = (struct madt_apic_header ) (((uint8_t *) acpi_madt) + acpi_madt->header.length);	143	struct madt_apic_header end = (struct madt_apic_header ) (((uint8_t *) acpi_madt) + acpi_madt->header.length);
145	struct madt_apic_header *h;	144	struct madt_apic_header *h;
146		145
147	l_apic = (uint32_t *) (unative_t) acpi_madt->l_apic_address;	146	l_apic = (uint32_t *) (unative_t) acpi_madt->l_apic_address;
148		147
149	/* calculate madt entries */	148	/* calculate madt entries */
150	for (h = &acpi_madt->apic_header[0]; h < end; h = (struct madt_apic_header ) (((uint8_t ) h) + h->length)) {	149	for (h = &acpi_madt->apic_header[0]; h < end; h = (struct madt_apic_header ) (((uint8_t ) h) + h->length)) {
151	madt_entries_index_cnt++;	150	madt_entries_index_cnt++;
152	}	151	}
153		152
154	/* create madt apic entries index array */	153	/* create madt apic entries index array */
155	madt_entries_index = (struct madt_apic_header * ) malloc(madt_entries_index_cnt sizeof(struct madt_apic_header * *), FRAME_ATOMIC);	154	madt_entries_index = (struct madt_apic_header * ) malloc(madt_entries_index_cnt sizeof(struct madt_apic_header * *), FRAME_ATOMIC);
156	if (!madt_entries_index)	155	if (!madt_entries_index)
157	panic("Memory allocation error.");	156	panic("Memory allocation error.");
158		157
159	uint32_t index = 0;	158	uint32_t index = 0;
160		159
161	for (h = &acpi_madt->apic_header[0]; h < end; h = (struct madt_apic_header ) (((uint8_t ) h) + h->length)) {	160	for (h = &acpi_madt->apic_header[0]; h < end; h = (struct madt_apic_header ) (((uint8_t ) h) + h->length)) {
162	madt_entries_index[index++] = h;	161	madt_entries_index[index++] = h;
163	}	162	}
164		163
165	/* Quicksort MADT index structure */	164	/* Quicksort MADT index structure */
166	qsort(madt_entries_index, madt_entries_index_cnt, sizeof(uintptr_t), &madt_cmp);	165	qsort(madt_entries_index, madt_entries_index_cnt, sizeof(uintptr_t), &madt_cmp);
167		166
168	/* Parse MADT entries */	167	/* Parse MADT entries */
169	for (index = 0; index < madt_entries_index_cnt - 1; index++) {	168	for (index = 0; index < madt_entries_index_cnt - 1; index++) {
170	h = madt_entries_index[index];	169	h = madt_entries_index[index];
171	switch (h->type) {	170	switch (h->type) {
172	case MADT_L_APIC:	171	case MADT_L_APIC:
173	madt_l_apic_entry((struct madt_l_apic *) h, index);	172	madt_l_apic_entry((struct madt_l_apic *) h, index);
174	break;	173	break;
175	case MADT_IO_APIC:	174	case MADT_IO_APIC:
176	madt_io_apic_entry((struct madt_io_apic *) h, index);	175	madt_io_apic_entry((struct madt_io_apic *) h, index);
177	break;	176	break;
178	case MADT_INTR_SRC_OVRD:	177	case MADT_INTR_SRC_OVRD:
179	madt_intr_src_ovrd_entry((struct madt_intr_src_ovrd *) h, index);	178	madt_intr_src_ovrd_entry((struct madt_intr_src_ovrd *) h, index);
180	break;	179	break;
181	case MADT_NMI_SRC:	180	case MADT_NMI_SRC:
182	case MADT_L_APIC_NMI:	181	case MADT_L_APIC_NMI:
183	case MADT_L_APIC_ADDR_OVRD:	182	case MADT_L_APIC_ADDR_OVRD:
184	case MADT_IO_SAPIC:	183	case MADT_IO_SAPIC:
185	case MADT_L_SAPIC:	184	case MADT_L_SAPIC:
186	case MADT_PLATFORM_INTR_SRC:	185	case MADT_PLATFORM_INTR_SRC:
187	printf("MADT: skipping %s entry (type=%zd)\n", entry[h->type], h->type);	186	printf("MADT: skipping %s entry (type=%zd)\n", entry[h->type], h->type);
188	break;	187	break;
189		188
190	default:	189	default:
191	if (h->type >= MADT_RESERVED_SKIP_BEGIN && h->type <= MADT_RESERVED_SKIP_END) {	190	if (h->type >= MADT_RESERVED_SKIP_BEGIN && h->type <= MADT_RESERVED_SKIP_END) {
192	printf("MADT: skipping reserved entry (type=%zd)\n", h->type);	191	printf("MADT: skipping reserved entry (type=%zd)\n", h->type);
193	}	192	}
194	if (h->type >= MADT_RESERVED_OEM_BEGIN) {	193	if (h->type >= MADT_RESERVED_OEM_BEGIN) {
195	printf("MADT: skipping OEM entry (type=%zd)\n", h->type);	194	printf("MADT: skipping OEM entry (type=%zd)\n", h->type);
196	}	195	}
197	break;	196	break;
198	}	197	}
199		198
200		199
201	}	200	}
202		201
203		202
204	if (cpu_count)	203	if (cpu_count)
205	config.cpu_count = cpu_count;	204	config.cpu_count = cpu_count;
206	}	205	}
207		206
208		207
209	void madt_l_apic_entry(struct madt_l_apic *la, uint32_t index)	208	void madt_l_apic_entry(struct madt_l_apic *la, uint32_t index)
210	{	209	{
211	if (!madt_l_apic_entry_cnt++) {	210	if (!madt_l_apic_entry_cnt++) {
212	madt_l_apic_entry_index = index;	211	madt_l_apic_entry_index = index;
213	}	212	}
214		213
215	if (!(la->flags & 0x1)) {	214	if (!(la->flags & 0x1)) {
216	/* Processor is unusable, skip it. */	215	/* Processor is unusable, skip it. */
217	return;	216	return;
218	}	217	}
219		218
220	cpu_count++;	219	cpu_count++;
221	apic_id_mask \|= 1<<la->apic_id;	220	apic_id_mask \|= 1<<la->apic_id;
222	}	221	}
223		222
224	void madt_io_apic_entry(struct madt_io_apic *ioa, uint32_t index)	223	void madt_io_apic_entry(struct madt_io_apic *ioa, uint32_t index)
225	{	224	{
226	if (!madt_io_apic_entry_cnt++) {	225	if (!madt_io_apic_entry_cnt++) {
227	/* remember index of the first io apic entry */	226	/* remember index of the first io apic entry */
228	madt_io_apic_entry_index = index;	227	madt_io_apic_entry_index = index;
229	io_apic = (uint32_t *) (unative_t) ioa->io_apic_address;	228	io_apic = (uint32_t *) (unative_t) ioa->io_apic_address;
230	} else {	229	} else {
231	/* currently not supported */	230	/* currently not supported */
232	return;	231	return;
233	}	232	}
234	}	233	}
235		234
236	void madt_intr_src_ovrd_entry(struct madt_intr_src_ovrd *override, uint32_t index)	235	void madt_intr_src_ovrd_entry(struct madt_intr_src_ovrd *override, uint32_t index)
237	{	236	{
238	ASSERT(override->source < sizeof(isa_irq_map)/sizeof(int));	237	ASSERT(override->source < sizeof(isa_irq_map)/sizeof(int));
239	printf("MADT: ignoring %s entry: bus=%zd, source=%zd, global_int=%zd, flags=%#hx\n",	238	printf("MADT: ignoring %s entry: bus=%zd, source=%zd, global_int=%zd, flags=%#hx\n",
240	entry[override->header.type], override->bus, override->source,	239	entry[override->header.type], override->bus, override->source,
241	override->global_int, override->flags);	240	override->global_int, override->flags);
242	}	241	}
243		242
244	#endif /* CONFIG_SMP */	243	#endif /* CONFIG_SMP */
245		244
246	/** @}	245	/** @}
247	*/	246	*/
248		247

Subversion Repositories HelenOS

(root)/trunk/kernel/genarch/src/acpi/madt.c – Rev 2071 → 2089