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36 | #include <mm/frame.h> |
36 | #include <mm/frame.h> |
37 | #include <arch/mm/frame.h> |
37 | #include <arch/mm/frame.h> |
38 | #include <mm/as.h> |
38 | #include <mm/as.h> |
39 | #include <config.h> |
39 | #include <config.h> |
40 | #include <arch/boot/boot.h> |
40 | #include <arch/boot/boot.h> |
- | 41 | #include <arch/hypercall.h> |
|
41 | #include <panic.h> |
42 | #include <panic.h> |
42 | #include <debug.h> |
43 | #include <debug.h> |
43 | #include <align.h> |
44 | #include <align.h> |
44 | #include <macros.h> |
45 | #include <macros.h> |
45 | 46 | ||
46 | #include <print.h> |
- | |
47 | #include <console/cmd.h> |
47 | #include <console/cmd.h> |
48 | #include <console/kconsole.h> |
48 | #include <console/kconsole.h> |
49 | 49 | ||
50 | uintptr_t last_frame = 0; |
50 | uintptr_t last_frame = 0; |
51 | 51 | ||
- | 52 | #define L1_PT_SHIFT 10 |
|
- | 53 | #define L2_PT_SHIFT 0 |
|
- | 54 | ||
- | 55 | #define L1_OFFSET_MASK 0x3ff |
|
- | 56 | #define L2_OFFSET_MASK 0x3ff |
|
- | 57 | ||
- | 58 | #define PFN2PTL1_OFFSET(pfn) ((pfn >> L1_PT_SHIFT) & L1_OFFSET_MASK) |
|
- | 59 | #define PFN2PTL2_OFFSET(pfn) ((pfn >> L2_PT_SHIFT) & L2_OFFSET_MASK) |
|
- | 60 | ||
- | 61 | #define PAGE_MASK (~(PAGE_SIZE - 1)) |
|
- | 62 | ||
- | 63 | #define PTE2ADDR(pte) (pte & PAGE_MASK) |
|
- | 64 | ||
- | 65 | #define _PAGE_PRESENT 0x001UL |
|
- | 66 | #define _PAGE_RW 0x002UL |
|
- | 67 | #define _PAGE_USER 0x004UL |
|
- | 68 | #define _PAGE_PWT 0x008UL |
|
- | 69 | #define _PAGE_PCD 0x010UL |
|
- | 70 | #define _PAGE_ACCESSED 0x020UL |
|
- | 71 | #define _PAGE_DIRTY 0x040UL |
|
- | 72 | #define _PAGE_PAT 0x080UL |
|
- | 73 | #define _PAGE_PSE 0x080UL |
|
- | 74 | #define _PAGE_GLOBAL 0x100UL |
|
- | 75 | ||
- | 76 | #define L1_PROT (_PAGE_PRESENT | _PAGE_ACCESSED) |
|
- | 77 | #define L2_PROT (_PAGE_PRESENT | _PAGE_RW | _PAGE_ACCESSED) |
|
- | 78 | ||
52 | void frame_arch_init(void) |
79 | void frame_arch_init(void) |
53 | { |
80 | { |
54 | if (config.cpu_active == 1) { |
81 | if (config.cpu_active == 1) { |
- | 82 | /* The only memory zone starts just after page table */ |
|
55 | pfn_t start = ADDR2PFN(ALIGN_UP(KA2PA(start_info.pt_base), PAGE_SIZE)) + start_info.nr_pt_frames; |
83 | pfn_t start = ADDR2PFN(ALIGN_UP(KA2PA(start_info.pt_base), PAGE_SIZE)) + start_info.nr_pt_frames; |
56 | size_t size = start_info.nr_pages - start; |
84 | size_t size = start_info.nr_pages - start; |
57 | 85 | ||
- | 86 | /* Create identity mapping */ |
|
- | 87 | pfn_t phys; |
|
- | 88 | for (phys = start; phys < start + size; phys++) { |
|
- | 89 | mmu_update_t updates[1]; |
|
- | 90 | pfn_t virt = ADDR2PFN(PA2KA(PFN2ADDR(phys))); |
|
- | 91 | ||
- | 92 | size_t ptl1_offset = PFN2PTL1_OFFSET(virt); |
|
- | 93 | size_t ptl2_offset = PFN2PTL2_OFFSET(virt); |
|
- | 94 | ||
- | 95 | unsigned long *ptl2_base = (unsigned long *) PTE2ADDR(start_info.pt_base[ptl1_offset]); |
|
- | 96 | ||
- | 97 | if (ptl2_base == 0) { |
|
- | 98 | mmuext_op_t mmu_ext; |
|
- | 99 | ||
- | 100 | pfn_t virt2 = ADDR2PFN(PA2KA(PFN2ADDR(start))); |
|
- | 101 | ||
- | 102 | /* New L1 page table entry needed */ |
|
- | 103 | memsetb(PFN2ADDR(virt2), PAGE_SIZE, 0); |
|
- | 104 | ||
- | 105 | size_t ptl1_offset2 = PFN2PTL1_OFFSET(virt2); |
|
- | 106 | size_t ptl2_offset2 = PFN2PTL2_OFFSET(virt2); |
|
- | 107 | unsigned long *ptl2_base2 = (unsigned long *) PTE2ADDR(start_info.pt_base[ptl1_offset2]); |
|
- | 108 | ||
- | 109 | if (ptl2_base2 == 0) |
|
- | 110 | panic("Unable to find page table reference"); |
|
- | 111 | ||
- | 112 | updates[0].ptr = (uintptr_t) &ptl2_base2[ptl2_offset2]; |
|
- | 113 | updates[0].val = PFN2ADDR(start_info.mfn_list[start]) | L1_PROT; |
|
- | 114 | if (xen_mmu_update(updates, 1, NULL, DOMID_SELF) < 0) |
|
- | 115 | panic("Unable to map new page table"); |
|
- | 116 | ||
- | 117 | mmu_ext.cmd = MMUEXT_PIN_L1_TABLE; |
|
- | 118 | mmu_ext.arg1.mfn = start_info.mfn_list[start]; |
|
- | 119 | if (xen_mmuext_op(&mmu_ext, 1, NULL, DOMID_SELF) < 0) |
|
- | 120 | panic("Error pinning new page table"); |
|
- | 121 | ||
- | 122 | unsigned long *ptl0 = (unsigned long *) PFN2ADDR(start_info.mfn_list[ADDR2PFN(KA2PA(start_info.pt_base))]); |
|
- | 123 | ||
- | 124 | updates[0].ptr = (uintptr_t) &ptl0[ptl1_offset]; |
|
- | 125 | updates[0].val = PFN2ADDR(start_info.mfn_list[start]) | L2_PROT; |
|
- | 126 | if (xen_mmu_update(updates, 1, NULL, DOMID_SELF) < 0) |
|
- | 127 | panic("Unable to update PTE for page table"); |
|
- | 128 | ||
- | 129 | ptl2_base = (unsigned long *) PTE2ADDR(start_info.pt_base[ptl1_offset]); |
|
- | 130 | start++; |
|
- | 131 | size--; |
|
- | 132 | } |
|
- | 133 | ||
- | 134 | updates[0].ptr = (uintptr_t) &ptl2_base[ptl2_offset]; |
|
- | 135 | updates[0].val = PFN2ADDR(start_info.mfn_list[phys]) | L2_PROT; |
|
- | 136 | if (xen_mmu_update(updates, 1, NULL, DOMID_SELF) < 0) |
|
- | 137 | panic("Unable to update PTE"); |
|
- | 138 | } |
|
- | 139 | ||
58 | zone_create(start, size, start, 0); |
140 | zone_create(start, size, start, 0); |
59 | last_frame = start + size; |
141 | last_frame = start + size; |
60 | } |
142 | } |
61 | } |
143 | } |
62 | 144 |