WebSVN – HelenOS – Diff – /trunk/kernel/arch/xen32/src/asm.S


#
# Copyright (C) 2001-2004 Jakub Jermar
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# - Redistributions of source code must retain the above copyright
#   notice, this list of conditions and the following disclaimer.
# - Redistributions in binary form must reproduce the above copyright
#   notice, this list of conditions and the following disclaimer in the
#   documentation and/or other materials provided with the distribution.
# - The name of the author may not be used to endorse or promote products
#   derived from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
 
## very low and hardware-level functions
 
# Mask for interrupts 0 - 31 (bits 0 - 31) where 0 means that int has no error word
# and 1 means interrupt with error word
#define ERROR_WORD_INTERRUPT_LIST 0x00027D00
 
.text
 
.global xen_callback
.global xen_failsafe_callback
.global enable_l_apic_in_msr
.global interrupt_handlers
.global memcpy
.global memcpy_from_uspace
.global memcpy_from_uspace_failover_address
.global memcpy_to_uspace
.global memcpy_to_uspace_failover_address
 
 
xen_callback:
	iret
 
xen_failsafe_callback:
	iret
 
 
#define MEMCPY_DST	4
#define MEMCPY_SRC	8
#define MEMCPY_SIZE	12
 
/** Copy memory to/from userspace.
 *
 * This is almost conventional memcpy().
 * The difference is that there is a failover part
 * to where control is returned from a page fault
 * if the page fault occurs during copy_from_uspace()
 * or copy_to_uspace().
 *
 * @param MEMCPY_DST(%esp)	Destination address.
 * @param MEMCPY_SRC(%esp)	Source address.
 * @param MEMCPY_SIZE(%esp)	Size.
 *
 * @return MEMCPY_SRC(%esp) on success and 0 on failure.
 */
memcpy:
memcpy_from_uspace:
memcpy_to_uspace:
	movl %edi, %edx				/* save %edi */
	movl %esi, %eax				/* save %esi */
	
	movl MEMCPY_SIZE(%esp), %ecx
	shrl $2, %ecx				/* size / 4 */
	
	movl MEMCPY_DST(%esp), %edi
	movl MEMCPY_SRC(%esp), %esi
	
	rep movsl				/* copy as much as possible word by word */
 
	movl MEMCPY_SIZE(%esp), %ecx
	andl $3, %ecx				/* size % 4 */
	jz 0f
	
	rep movsb				/* copy the rest byte by byte */
 
0:
	movl %edx, %edi
	movl %eax, %esi
	movl MEMCPY_SRC(%esp), %eax		/* MEMCPY_SRC(%esp), success */
	ret
	
/*
 * We got here from as_page_fault() after the memory operations
 * above had caused a page fault.
 */
memcpy_from_uspace_failover_address:
memcpy_to_uspace_failover_address:
	movl %edx, %edi
	movl %eax, %esi
	xorl %eax, %eax				/* return 0, failure */
	ret
 
 
## Enable local APIC
#
# Enable local APIC in MSR.
#
enable_l_apic_in_msr:
	push %eax
 
	movl $0x1b, %ecx
	rdmsr
	orl $(1<<11),%eax
	orl $(0xfee00000),%eax
	wrmsr
 
	pop %eax
	ret
 
# Clear nested flag
# overwrites %ecx
.macro CLEAR_NT_FLAG
	pushfl
	pop %ecx
	and $0xffffbfff,%ecx
	push %ecx
	popfl
.endm	
 
## Declare interrupt handlers
#
# Declare interrupt handlers for n interrupt
# vectors starting at vector i.
#
# The handlers setup data segment registers
# and call exc_dispatch().
#
#define INTERRUPT_ALIGN 64
.macro handler i n
 
.ifeq \i-0x30     # Syscall handler
	push %ds
	push %es
	push %fs
	push %gs
 
	# Push arguments on stack
	push %edi
	push %esi
	push %edx
	push %ecx
	push %eax
	
	# we must fill the data segment registers
	movw $16,%ax
	movw %ax,%ds
	movw %ax,%es
	
	sti
	
	call syscall_handler   # syscall_handler(ax,cx,dx,si,di)
	cli
	addl $20, %esp         # clean-up of parameters
	
	pop %gs
	pop %fs
	pop %es
	pop %ds
	
	CLEAR_NT_FLAG
	iret
.else	
	/*
	 * This macro distinguishes between two versions of ia32 exceptions.
	 * One version has error word and the other does not have it.
	 * The latter version fakes the error word on the stack so that the
	 * handlers and istate_t can be the same for both types.
	 */
	.iflt \i-32
		.if (1 << \i) & ERROR_WORD_INTERRUPT_LIST
			/* 
			 * With error word, do nothing
			 */
                .else
                        /*
                         * Version without error word,
                         */
			subl $4, %esp
                .endif
        .else
                /*
                 * Version without error word,
                 */
		subl $4, %esp
	.endif
	
	push %ds
	push %es
	push %fs
	push %gs
 
#ifdef CONFIG_DEBUG_ALLREGS
	push %ebx
	push %ebp
	push %edi
	push %esi
#else
	sub $16, %esp
#endif
	push %edx
	push %ecx
	push %eax
	
	# we must fill the data segment registers
	movw $16,%ax
	movw %ax,%ds
	movw %ax,%es
 
	pushl %esp          # *istate
	pushl $(\i)         # intnum
	call exc_dispatch   # excdispatch(intnum, *istate)
	addl $8,%esp        # Clear arguments from stack
 
	CLEAR_NT_FLAG # Modifies %ecx
	
	pop %eax
	pop %ecx
	pop %edx
#ifdef CONFIG_DEBUG_ALLREGS
	pop %esi
	pop %edi
	pop %ebp
	pop %ebx
#else
	add $16, %esp
#endif	
	
	pop %gs
	pop %fs
	pop %es
	pop %ds
 
	addl $4,%esp	# Skip error word, no matter whether real or fake.
	iret
.endif
 
	.align INTERRUPT_ALIGN
	.if (\n-\i)-1
	handler "(\i+1)",\n
	.endif
.endm
 
# keep in sync with pm.h !!!
IDT_ITEMS=64
.align INTERRUPT_ALIGN
interrupt_handlers:
h_start:
	handler 0 IDT_ITEMS
h_end:
 
.data
.global interrupt_handler_size
 
interrupt_handler_size: .long (h_end-h_start)/IDT_ITEMS
 

Rev 1821	Rev 1829
1	#	1	#
2	# Copyright (C) 2001-2004 Jakub Jermar	2	# Copyright (C) 2001-2004 Jakub Jermar
3	# All rights reserved.	3	# All rights reserved.
4	#	4	#
5	# Redistribution and use in source and binary forms, with or without	5	# Redistribution and use in source and binary forms, with or without
6	# modification, are permitted provided that the following conditions	6	# modification, are permitted provided that the following conditions
7	# are met:	7	# are met:
8	#	8	#
9	# - Redistributions of source code must retain the above copyright	9	# - Redistributions of source code must retain the above copyright
10	# notice, this list of conditions and the following disclaimer.	10	# notice, this list of conditions and the following disclaimer.
11	# - Redistributions in binary form must reproduce the above copyright	11	# - Redistributions in binary form must reproduce the above copyright
12	# notice, this list of conditions and the following disclaimer in the	12	# notice, this list of conditions and the following disclaimer in the
13	# documentation and/or other materials provided with the distribution.	13	# documentation and/or other materials provided with the distribution.
14	# - The name of the author may not be used to endorse or promote products	14	# - The name of the author may not be used to endorse or promote products
15	# derived from this software without specific prior written permission.	15	# derived from this software without specific prior written permission.
16	#	16	#
17	# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR	17	# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18	# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES	18	# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19	# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.	19	# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20	# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,	20	# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21	# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT	21	# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22	# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,	22	# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23	# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY	23	# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24	# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT	24	# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25	# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF	25	# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26	# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.	26	# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27	#	27	#
28		28
29	## very low and hardware-level functions	29	## very low and hardware-level functions
30		30
31	# Mask for interrupts 0 - 31 (bits 0 - 31) where 0 means that int has no error word	31	# Mask for interrupts 0 - 31 (bits 0 - 31) where 0 means that int has no error word
32	# and 1 means interrupt with error word	32	# and 1 means interrupt with error word
33	#define ERROR_WORD_INTERRUPT_LIST 0x00027D00	33	#define ERROR_WORD_INTERRUPT_LIST 0x00027D00
34		34
35	.text	35	.text
36		36
-		37	.global xen_callback
-		38	.global xen_failsafe_callback
37	.global enable_l_apic_in_msr	39	.global enable_l_apic_in_msr
38	.global interrupt_handlers	40	.global interrupt_handlers
39	.global memcpy	41	.global memcpy
40	.global memcpy_from_uspace	42	.global memcpy_from_uspace
41	.global memcpy_from_uspace_failover_address	43	.global memcpy_from_uspace_failover_address
42	.global memcpy_to_uspace	44	.global memcpy_to_uspace
43	.global memcpy_to_uspace_failover_address	45	.global memcpy_to_uspace_failover_address
44		46
-		47
-		48	xen_callback:
-		49	iret
-		50
-		51	xen_failsafe_callback:
-		52	iret
-		53
45		54
46	#define MEMCPY_DST 4	55	#define MEMCPY_DST 4
47	#define MEMCPY_SRC 8	56	#define MEMCPY_SRC 8
48	#define MEMCPY_SIZE 12	57	#define MEMCPY_SIZE 12
49		58
50	/** Copy memory to/from userspace.	59	/** Copy memory to/from userspace.
51	*	60	*
52	* This is almost conventional memcpy().	61	* This is almost conventional memcpy().
53	* The difference is that there is a failover part	62	* The difference is that there is a failover part
54	* to where control is returned from a page fault	63	* to where control is returned from a page fault
55	* if the page fault occurs during copy_from_uspace()	64	* if the page fault occurs during copy_from_uspace()
56	* or copy_to_uspace().	65	* or copy_to_uspace().
57	*	66	*
58	* @param MEMCPY_DST(%esp) Destination address.	67	* @param MEMCPY_DST(%esp) Destination address.
59	* @param MEMCPY_SRC(%esp) Source address.	68	* @param MEMCPY_SRC(%esp) Source address.
60	* @param MEMCPY_SIZE(%esp) Size.	69	* @param MEMCPY_SIZE(%esp) Size.
61	*	70	*
62	* @return MEMCPY_SRC(%esp) on success and 0 on failure.	71	* @return MEMCPY_SRC(%esp) on success and 0 on failure.
63	*/	72	*/
64	memcpy:	73	memcpy:
65	memcpy_from_uspace:	74	memcpy_from_uspace:
66	memcpy_to_uspace:	75	memcpy_to_uspace:
67	movl %edi, %edx /* save %edi */	76	movl %edi, %edx /* save %edi */
68	movl %esi, %eax /* save %esi */	77	movl %esi, %eax /* save %esi */
69		78
70	movl MEMCPY_SIZE(%esp), %ecx	79	movl MEMCPY_SIZE(%esp), %ecx
71	shrl $2, %ecx /* size / 4 */	80	shrl $2, %ecx /* size / 4 */
72		81
73	movl MEMCPY_DST(%esp), %edi	82	movl MEMCPY_DST(%esp), %edi
74	movl MEMCPY_SRC(%esp), %esi	83	movl MEMCPY_SRC(%esp), %esi
75		84
76	rep movsl /* copy as much as possible word by word */	85	rep movsl /* copy as much as possible word by word */
77		86
78	movl MEMCPY_SIZE(%esp), %ecx	87	movl MEMCPY_SIZE(%esp), %ecx
79	andl $3, %ecx /* size % 4 */	88	andl $3, %ecx /* size % 4 */
80	jz 0f	89	jz 0f
81		90
82	rep movsb /* copy the rest byte by byte */	91	rep movsb /* copy the rest byte by byte */
83		92
84	0:	93	0:
85	movl %edx, %edi	94	movl %edx, %edi
86	movl %eax, %esi	95	movl %eax, %esi
87	movl MEMCPY_SRC(%esp), %eax /* MEMCPY_SRC(%esp), success */	96	movl MEMCPY_SRC(%esp), %eax /* MEMCPY_SRC(%esp), success */
88	ret	97	ret
89		98
90	/*	99	/*
91	* We got here from as_page_fault() after the memory operations	100	* We got here from as_page_fault() after the memory operations
92	* above had caused a page fault.	101	* above had caused a page fault.
93	*/	102	*/
94	memcpy_from_uspace_failover_address:	103	memcpy_from_uspace_failover_address:
95	memcpy_to_uspace_failover_address:	104	memcpy_to_uspace_failover_address:
96	movl %edx, %edi	105	movl %edx, %edi
97	movl %eax, %esi	106	movl %eax, %esi
98	xorl %eax, %eax /* return 0, failure */	107	xorl %eax, %eax /* return 0, failure */
99	ret	108	ret
100		109
101		110
102	## Enable local APIC	111	## Enable local APIC
103	#	112	#
104	# Enable local APIC in MSR.	113	# Enable local APIC in MSR.
105	#	114	#
106	enable_l_apic_in_msr:	115	enable_l_apic_in_msr:
107	push %eax	116	push %eax
108		117
109	movl $0x1b, %ecx	118	movl $0x1b, %ecx
110	rdmsr	119	rdmsr
111	orl $(1<<11),%eax	120	orl $(1<<11),%eax
112	orl $(0xfee00000),%eax	121	orl $(0xfee00000),%eax
113	wrmsr	122	wrmsr
114		123
115	pop %eax	124	pop %eax
116	ret	125	ret
117		126
118	# Clear nested flag	127	# Clear nested flag
119	# overwrites %ecx	128	# overwrites %ecx
120	.macro CLEAR_NT_FLAG	129	.macro CLEAR_NT_FLAG
121	pushfl	130	pushfl
122	pop %ecx	131	pop %ecx
123	and $0xffffbfff,%ecx	132	and $0xffffbfff,%ecx
124	push %ecx	133	push %ecx
125	popfl	134	popfl
126	.endm	135	.endm
127		136
128	## Declare interrupt handlers	137	## Declare interrupt handlers
129	#	138	#
130	# Declare interrupt handlers for n interrupt	139	# Declare interrupt handlers for n interrupt
131	# vectors starting at vector i.	140	# vectors starting at vector i.
132	#	141	#
133	# The handlers setup data segment registers	142	# The handlers setup data segment registers
134	# and call exc_dispatch().	143	# and call exc_dispatch().
135	#	144	#
136	#define INTERRUPT_ALIGN 64	145	#define INTERRUPT_ALIGN 64
137	.macro handler i n	146	.macro handler i n
138		147
139	.ifeq \i-0x30 # Syscall handler	148	.ifeq \i-0x30 # Syscall handler
140	push %ds	149	push %ds
141	push %es	150	push %es
142	push %fs	151	push %fs
143	push %gs	152	push %gs
144		153
145	# Push arguments on stack	154	# Push arguments on stack
146	push %edi	155	push %edi
147	push %esi	156	push %esi
148	push %edx	157	push %edx
149	push %ecx	158	push %ecx
150	push %eax	159	push %eax
151		160
152	# we must fill the data segment registers	161	# we must fill the data segment registers
153	movw $16,%ax	162	movw $16,%ax
154	movw %ax,%ds	163	movw %ax,%ds
155	movw %ax,%es	164	movw %ax,%es
156		165
157	sti	166	sti
158		167
159	call syscall_handler # syscall_handler(ax,cx,dx,si,di)	168	call syscall_handler # syscall_handler(ax,cx,dx,si,di)
160	cli	169	cli
161	addl $20, %esp # clean-up of parameters	170	addl $20, %esp # clean-up of parameters
162		171
163	pop %gs	172	pop %gs
164	pop %fs	173	pop %fs
165	pop %es	174	pop %es
166	pop %ds	175	pop %ds
167		176
168	CLEAR_NT_FLAG	177	CLEAR_NT_FLAG
169	iret	178	iret
170	.else	179	.else
171	/*	180	/*
172	* This macro distinguishes between two versions of ia32 exceptions.	181	* This macro distinguishes between two versions of ia32 exceptions.
173	* One version has error word and the other does not have it.	182	* One version has error word and the other does not have it.
174	* The latter version fakes the error word on the stack so that the	183	* The latter version fakes the error word on the stack so that the
175	* handlers and istate_t can be the same for both types.	184	* handlers and istate_t can be the same for both types.
176	*/	185	*/
177	.iflt \i-32	186	.iflt \i-32
178	.if (1 << \i) & ERROR_WORD_INTERRUPT_LIST	187	.if (1 << \i) & ERROR_WORD_INTERRUPT_LIST
179	/*	188	/*
180	* With error word, do nothing	189	* With error word, do nothing
181	*/	190	*/
182	.else	191	.else
183	/*	192	/*
184	* Version without error word,	193	* Version without error word,
185	*/	194	*/
186	subl $4, %esp	195	subl $4, %esp
187	.endif	196	.endif
188	.else	197	.else
189	/*	198	/*
190	* Version without error word,	199	* Version without error word,
191	*/	200	*/
192	subl $4, %esp	201	subl $4, %esp
193	.endif	202	.endif
194		203
195	push %ds	204	push %ds
196	push %es	205	push %es
197	push %fs	206	push %fs
198	push %gs	207	push %gs
199		208
200	#ifdef CONFIG_DEBUG_ALLREGS	209	#ifdef CONFIG_DEBUG_ALLREGS
201	push %ebx	210	push %ebx
202	push %ebp	211	push %ebp
203	push %edi	212	push %edi
204	push %esi	213	push %esi
205	#else	214	#else
206	sub $16, %esp	215	sub $16, %esp
207	#endif	216	#endif
208	push %edx	217	push %edx
209	push %ecx	218	push %ecx
210	push %eax	219	push %eax
211		220
212	# we must fill the data segment registers	221	# we must fill the data segment registers
213	movw $16,%ax	222	movw $16,%ax
214	movw %ax,%ds	223	movw %ax,%ds
215	movw %ax,%es	224	movw %ax,%es
216		225
217	pushl %esp # *istate	226	pushl %esp # *istate
218	pushl $(\i) # intnum	227	pushl $(\i) # intnum
219	call exc_dispatch # excdispatch(intnum, *istate)	228	call exc_dispatch # excdispatch(intnum, *istate)
220	addl $8,%esp # Clear arguments from stack	229	addl $8,%esp # Clear arguments from stack
221		230
222	CLEAR_NT_FLAG # Modifies %ecx	231	CLEAR_NT_FLAG # Modifies %ecx
223		232
224	pop %eax	233	pop %eax
225	pop %ecx	234	pop %ecx
226	pop %edx	235	pop %edx
227	#ifdef CONFIG_DEBUG_ALLREGS	236	#ifdef CONFIG_DEBUG_ALLREGS
228	pop %esi	237	pop %esi
229	pop %edi	238	pop %edi
230	pop %ebp	239	pop %ebp
231	pop %ebx	240	pop %ebx
232	#else	241	#else
233	add $16, %esp	242	add $16, %esp
234	#endif	243	#endif
235		244
236	pop %gs	245	pop %gs
237	pop %fs	246	pop %fs
238	pop %es	247	pop %es
239	pop %ds	248	pop %ds
240		249
241	addl $4,%esp # Skip error word, no matter whether real or fake.	250	addl $4,%esp # Skip error word, no matter whether real or fake.
242	iret	251	iret
243	.endif	252	.endif
244		253
245	.align INTERRUPT_ALIGN	254	.align INTERRUPT_ALIGN
246	.if (\n-\i)-1	255	.if (\n-\i)-1
247	handler "(\i+1)",\n	256	handler "(\i+1)",\n
248	.endif	257	.endif
249	.endm	258	.endm
250		259
251	# keep in sync with pm.h !!!	260	# keep in sync with pm.h !!!
252	IDT_ITEMS=64	261	IDT_ITEMS=64
253	.align INTERRUPT_ALIGN	262	.align INTERRUPT_ALIGN
254	interrupt_handlers:	263	interrupt_handlers:
255	h_start:	264	h_start:
256	handler 0 IDT_ITEMS	265	handler 0 IDT_ITEMS
257	h_end:	266	h_end:
258		267
259	.data	268	.data
260	.global interrupt_handler_size	269	.global interrupt_handler_size
261		270
262	interrupt_handler_size: .long (h_end-h_start)/IDT_ITEMS	271	interrupt_handler_size: .long (h_end-h_start)/IDT_ITEMS
263		272

Subversion Repositories HelenOS

(root)/trunk/kernel/arch/xen32/src/asm.S – Rev 1821 → 1829