WebSVN – HelenOS – Diff – /trunk/kernel/arch/xen32/include/mm/page.h


/*
 * Copyright (C) 2006 Martin Decky
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the distribution.
 * - The name of the author may not be used to endorse or promote products
 *   derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */
 
/** @addtogroup xen32mm
 * @{
 */
/** @file
 */
 
#ifndef KERN_xen32_PAGE_H_
#define KERN_xen32_PAGE_H_
 
#include <arch/mm/frame.h>
 
#define PAGE_WIDTH  FRAME_WIDTH
#define PAGE_SIZE   FRAME_SIZE
 
#ifdef KERNEL
 
#ifndef __ASM__
#   define KA2PA(x) (((uintptr_t) (x)) - 0x80000000)
#   define PA2KA(x) (((uintptr_t) (x)) + 0x80000000)
#else
#   define KA2PA(x) ((x) - 0x80000000)
#   define PA2KA(x) ((x) + 0x80000000)
#endif
 
/*
 * Implementation of generic 4-level page table interface.
 * IA-32 has 2-level page tables, so PTL1 and PTL2 are left out.
 */
#define PTL0_ENTRIES_ARCH   1024
#define PTL1_ENTRIES_ARCH   0
#define PTL2_ENTRIES_ARCH   0
#define PTL3_ENTRIES_ARCH   1024
 
#define PTL0_INDEX_ARCH(vaddr)  (((vaddr) >> 22) & 0x3ff)
#define PTL1_INDEX_ARCH(vaddr)  0
#define PTL2_INDEX_ARCH(vaddr)  0
#define PTL3_INDEX_ARCH(vaddr)  (((vaddr) >> 12) & 0x3ff)
 
#define GET_PTL1_ADDRESS_ARCH(ptl0, i)      ((pte_t *) MA2PA((((pte_t *) (ptl0))[(i)].frame_address) << 12))
#define GET_PTL2_ADDRESS_ARCH(ptl1, i)      (ptl1)
#define GET_PTL3_ADDRESS_ARCH(ptl2, i)      (ptl2)
#define GET_FRAME_ADDRESS_ARCH(ptl3, i)     ((uintptr_t) MA2PA((((pte_t *) (ptl3))[(i)].frame_address) << 12))
 
#define SET_PTL0_ADDRESS_ARCH(ptl0) { \
    mmuext_op_t mmu_ext; \
    \
    mmu_ext.cmd = MMUEXT_NEW_BASEPTR; \
    mmu_ext.mfn = ADDR2PFN(PA2MA(ptl0)); \
    xen_mmuext_op(&mmu_ext, 1, NULL, DOMID_SELF); \
}
 
#define SET_PTL1_ADDRESS_ARCH(ptl0, i, a) { \
    mmu_update_t update; \
    \
    update.ptr = PA2MA(KA2PA(&((pte_t *) (ptl0))[(i)])); \
    update.val = PA2MA(a) | 0x0003; \
    xen_mmu_update(&update, 1, NULL, DOMID_SELF); \
}
#define SET_PTL2_ADDRESS_ARCH(ptl1, i, a)
#define SET_PTL3_ADDRESS_ARCH(ptl2, i, a)
#define SET_FRAME_ADDRESS_ARCH(ptl3, i, a)  (((pte_t *) (ptl3))[(i)].frame_address = PA2MA(a) >> 12)
 
#define GET_PTL1_FLAGS_ARCH(ptl0, i)        get_pt_flags((pte_t *) (ptl0), (index_t)(i))
#define GET_PTL2_FLAGS_ARCH(ptl1, i)        PAGE_PRESENT
#define GET_PTL3_FLAGS_ARCH(ptl2, i)        PAGE_PRESENT
#define GET_FRAME_FLAGS_ARCH(ptl3, i)       get_pt_flags((pte_t *) (ptl3), (index_t)(i))
 
#define SET_PTL1_FLAGS_ARCH(ptl0, i, x)     set_pt_flags((pte_t *) (ptl0), (index_t)(i), (x))
#define SET_PTL2_FLAGS_ARCH(ptl1, i, x)
#define SET_PTL3_FLAGS_ARCH(ptl2, i, x)
#define SET_FRAME_FLAGS_ARCH(ptl3, i, x)        set_pt_flags((pte_t *) (ptl3), (index_t)(i), (x))
 
#define PTE_VALID_ARCH(p)           (*((uint32_t *) (p)) != 0)
#define PTE_PRESENT_ARCH(p)         ((p)->present != 0)
#define PTE_GET_FRAME_ARCH(p)           ((p)->frame_address << FRAME_WIDTH)
#define PTE_WRITABLE_ARCH(p)            ((p)->writeable != 0)
#define PTE_EXECUTABLE_ARCH(p)          1
 
#ifndef __ASM__
 
#include <mm/page.h>
#include <arch/types.h>
#include <arch/mm/frame.h>
#include <typedefs.h>
#include <arch/hypercall.h>
 
/* Page fault error codes. */
 
/** When bit on this position is 0, the page fault was caused by a not-present page. */
#define PFERR_CODE_P        (1 << 0)
 
/** When bit on this position is 1, the page fault was caused by a write. */
#define PFERR_CODE_RW       (1 << 1)
 
/** When bit on this position is 1, the page fault was caused in user mode. */
#define PFERR_CODE_US       (1 << 2)
 
/** When bit on this position is 1, a reserved bit was set in page directory. */
#define PFERR_CODE_RSVD     (1 << 3)
 
/** Page Table Entry. */
struct page_specifier {
    unsigned present : 1;
    unsigned writeable : 1;
    unsigned uaccessible : 1;
    unsigned page_write_through : 1;
    unsigned page_cache_disable : 1;
    unsigned accessed : 1;
    unsigned dirty : 1;
    unsigned pat : 1;
    unsigned global : 1;
    unsigned soft_valid : 1;    /**< Valid content even if the present bit is not set. */
    unsigned avl : 2;
    unsigned frame_address : 20;
} __attribute__ ((packed));
 
typedef struct {
    uint64_t ptr;      /**< Machine address of PTE */
    union {            /**< New contents of PTE */
        uint64_t val;
        pte_t pte;
    };
} mmu_update_t;
 
typedef struct {
    unsigned int cmd;
    union {
        unsigned long mfn;
        unsigned long linear_addr;
    };
    union {
        unsigned int nr_ents;
        void *vcpumask;
    };
} mmuext_op_t;
 
static inline int xen_update_va_mapping(const void *va, const pte_t pte, const unsigned int flags)
{
    return hypercall4(XEN_UPDATE_VA_MAPPING, va, pte, 0, flags);
}
 
static inline int xen_mmu_update(const mmu_update_t *req, const unsigned int count, unsigned int *success_count, domid_t domid)
{
    return hypercall4(XEN_MMU_UPDATE, req, count, success_count, domid);
}
 
static inline int xen_mmuext_op(const mmuext_op_t *op, const unsigned int count, unsigned int *success_count, domid_t domid)
{
    return hypercall4(XEN_MMUEXT_OP, op, count, success_count, domid);
}
 
static inline int get_pt_flags(pte_t *pt, index_t i)
{
    pte_t *p = &pt[i];
   
    return (
        (!p->page_cache_disable)<<PAGE_CACHEABLE_SHIFT |
        (!p->present)<<PAGE_PRESENT_SHIFT |
        p->uaccessible<<PAGE_USER_SHIFT |
        1<<PAGE_READ_SHIFT |
        p->writeable<<PAGE_WRITE_SHIFT |
        1<<PAGE_EXEC_SHIFT |
        p->global<<PAGE_GLOBAL_SHIFT
    );
}
 
static inline void set_pt_flags(pte_t *pt, index_t i, int flags)
{
    pte_t *p = &pt[i];
   
    p->page_cache_disable = !(flags & PAGE_CACHEABLE);
    p->present = !(flags & PAGE_NOT_PRESENT);
    p->uaccessible = (flags & PAGE_USER) != 0;
    p->writeable = (flags & PAGE_WRITE) != 0;
    p->global = (flags & PAGE_GLOBAL) != 0;
   
    /*
     * Ensure that there is at least one bit set even if the present bit is cleared.
     */
    p->soft_valid = true;
}
 
extern void page_arch_init(void);
extern void page_fault(int n, istate_t *istate);
 
#endif /* __ASM__ */
 
#endif /* KERNEL */
 
#endif
 
/** @}
 */
 

Subversion Repositories HelenOS

(root)/trunk/kernel/arch/xen32/include/mm/page.h – Rev 1840 → 1888

Rev 1840		Rev 1888
1	/*	1	/*
2	* Copyright (C) 2006 Martin Decky	2	* Copyright (C) 2006 Martin Decky
3	* All rights reserved.	3	* All rights reserved.
4	*	4	*
5	* Redistribution and use in source and binary forms, with or without	5	* Redistribution and use in source and binary forms, with or without
6	* modification, are permitted provided that the following conditions	6	* modification, are permitted provided that the following conditions
7	* are met:	7	* are met:
8	*	8	*
9	* - Redistributions of source code must retain the above copyright	9	* - Redistributions of source code must retain the above copyright
10	* notice, this list of conditions and the following disclaimer.	10	* notice, this list of conditions and the following disclaimer.
11	* - Redistributions in binary form must reproduce the above copyright	11	* - Redistributions in binary form must reproduce the above copyright
12	* notice, this list of conditions and the following disclaimer in the	12	* notice, this list of conditions and the following disclaimer in the
13	* documentation and/or other materials provided with the distribution.	13	* documentation and/or other materials provided with the distribution.
14	* - The name of the author may not be used to endorse or promote products	14	* - The name of the author may not be used to endorse or promote products
15	* derived from this software without specific prior written permission.	15	* derived from this software without specific prior written permission.
16	*	16	*
17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR	17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES	18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.	19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,	20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT	21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,	22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY	23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT	24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF	25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.	26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27	*/	27	*/
28		28
29	/** @addtogroup xen32mm	29	/** @addtogroup xen32mm
30	* @{	30	* @{
31	*/	31	*/
32	/** @file	32	/** @file
33	*/	33	*/
34		34
35	#ifndef __xen32_PAGE_H__	35	#ifndef KERN_xen32_PAGE_H_
36	#define __xen32_PAGE_H__	36	#define KERN_xen32_PAGE_H_
37		37
38	#include <arch/mm/frame.h>	38	#include <arch/mm/frame.h>
39		39
40	#define PAGE_WIDTH FRAME_WIDTH	40	#define PAGE_WIDTH FRAME_WIDTH
41	#define PAGE_SIZE FRAME_SIZE	41	#define PAGE_SIZE FRAME_SIZE
42		42
43	#ifdef KERNEL	43	#ifdef KERNEL
44		44
45	#ifndef __ASM__	45	#ifndef __ASM__
46	# define KA2PA(x) (((uintptr_t) (x)) - 0x80000000)	46	# define KA2PA(x) (((uintptr_t) (x)) - 0x80000000)
47	# define PA2KA(x) (((uintptr_t) (x)) + 0x80000000)	47	# define PA2KA(x) (((uintptr_t) (x)) + 0x80000000)
48	#else	48	#else
49	# define KA2PA(x) ((x) - 0x80000000)	49	# define KA2PA(x) ((x) - 0x80000000)
50	# define PA2KA(x) ((x) + 0x80000000)	50	# define PA2KA(x) ((x) + 0x80000000)
51	#endif	51	#endif
52		52
53	/*	53	/*
54	* Implementation of generic 4-level page table interface.	54	* Implementation of generic 4-level page table interface.
55	* IA-32 has 2-level page tables, so PTL1 and PTL2 are left out.	55	* IA-32 has 2-level page tables, so PTL1 and PTL2 are left out.
56	*/	56	*/
57	#define PTL0_ENTRIES_ARCH 1024	57	#define PTL0_ENTRIES_ARCH 1024
58	#define PTL1_ENTRIES_ARCH 0	58	#define PTL1_ENTRIES_ARCH 0
59	#define PTL2_ENTRIES_ARCH 0	59	#define PTL2_ENTRIES_ARCH 0
60	#define PTL3_ENTRIES_ARCH 1024	60	#define PTL3_ENTRIES_ARCH 1024
61		61
62	#define PTL0_INDEX_ARCH(vaddr) (((vaddr) >> 22) & 0x3ff)	62	#define PTL0_INDEX_ARCH(vaddr) (((vaddr) >> 22) & 0x3ff)
63	#define PTL1_INDEX_ARCH(vaddr) 0	63	#define PTL1_INDEX_ARCH(vaddr) 0
64	#define PTL2_INDEX_ARCH(vaddr) 0	64	#define PTL2_INDEX_ARCH(vaddr) 0
65	#define PTL3_INDEX_ARCH(vaddr) (((vaddr) >> 12) & 0x3ff)	65	#define PTL3_INDEX_ARCH(vaddr) (((vaddr) >> 12) & 0x3ff)
66		66
67	#define GET_PTL1_ADDRESS_ARCH(ptl0, i) ((pte_t ) MA2PA((((pte_t ) (ptl0))[(i)].frame_address) << 12))	67	#define GET_PTL1_ADDRESS_ARCH(ptl0, i) ((pte_t ) MA2PA((((pte_t ) (ptl0))[(i)].frame_address) << 12))
68	#define GET_PTL2_ADDRESS_ARCH(ptl1, i) (ptl1)	68	#define GET_PTL2_ADDRESS_ARCH(ptl1, i) (ptl1)
69	#define GET_PTL3_ADDRESS_ARCH(ptl2, i) (ptl2)	69	#define GET_PTL3_ADDRESS_ARCH(ptl2, i) (ptl2)
70	#define GET_FRAME_ADDRESS_ARCH(ptl3, i) ((uintptr_t) MA2PA((((pte_t *) (ptl3))[(i)].frame_address) << 12))	70	#define GET_FRAME_ADDRESS_ARCH(ptl3, i) ((uintptr_t) MA2PA((((pte_t *) (ptl3))[(i)].frame_address) << 12))
71		71
72	#define SET_PTL0_ADDRESS_ARCH(ptl0) { \	72	#define SET_PTL0_ADDRESS_ARCH(ptl0) { \
73	mmuext_op_t mmu_ext; \	73	mmuext_op_t mmu_ext; \
74	\	74	\
75	mmu_ext.cmd = MMUEXT_NEW_BASEPTR; \	75	mmu_ext.cmd = MMUEXT_NEW_BASEPTR; \
76	mmu_ext.mfn = ADDR2PFN(PA2MA(ptl0)); \	76	mmu_ext.mfn = ADDR2PFN(PA2MA(ptl0)); \
77	xen_mmuext_op(&mmu_ext, 1, NULL, DOMID_SELF); \	77	xen_mmuext_op(&mmu_ext, 1, NULL, DOMID_SELF); \
78	}	78	}
79		79
80	#define SET_PTL1_ADDRESS_ARCH(ptl0, i, a) { \	80	#define SET_PTL1_ADDRESS_ARCH(ptl0, i, a) { \
81	mmu_update_t update; \	81	mmu_update_t update; \
82	\	82	\
83	update.ptr = PA2MA(KA2PA(&((pte_t *) (ptl0))[(i)])); \	83	update.ptr = PA2MA(KA2PA(&((pte_t *) (ptl0))[(i)])); \
84	update.val = PA2MA(a) \| 0x0003; \	84	update.val = PA2MA(a) \| 0x0003; \
85	xen_mmu_update(&update, 1, NULL, DOMID_SELF); \	85	xen_mmu_update(&update, 1, NULL, DOMID_SELF); \
86	}	86	}
87	#define SET_PTL2_ADDRESS_ARCH(ptl1, i, a)	87	#define SET_PTL2_ADDRESS_ARCH(ptl1, i, a)
88	#define SET_PTL3_ADDRESS_ARCH(ptl2, i, a)	88	#define SET_PTL3_ADDRESS_ARCH(ptl2, i, a)
89	#define SET_FRAME_ADDRESS_ARCH(ptl3, i, a) (((pte_t *) (ptl3))[(i)].frame_address = PA2MA(a) >> 12)	89	#define SET_FRAME_ADDRESS_ARCH(ptl3, i, a) (((pte_t *) (ptl3))[(i)].frame_address = PA2MA(a) >> 12)
90		90
91	#define GET_PTL1_FLAGS_ARCH(ptl0, i) get_pt_flags((pte_t *) (ptl0), (index_t)(i))	91	#define GET_PTL1_FLAGS_ARCH(ptl0, i) get_pt_flags((pte_t *) (ptl0), (index_t)(i))
92	#define GET_PTL2_FLAGS_ARCH(ptl1, i) PAGE_PRESENT	92	#define GET_PTL2_FLAGS_ARCH(ptl1, i) PAGE_PRESENT
93	#define GET_PTL3_FLAGS_ARCH(ptl2, i) PAGE_PRESENT	93	#define GET_PTL3_FLAGS_ARCH(ptl2, i) PAGE_PRESENT
94	#define GET_FRAME_FLAGS_ARCH(ptl3, i) get_pt_flags((pte_t *) (ptl3), (index_t)(i))	94	#define GET_FRAME_FLAGS_ARCH(ptl3, i) get_pt_flags((pte_t *) (ptl3), (index_t)(i))
95		95
96	#define SET_PTL1_FLAGS_ARCH(ptl0, i, x) set_pt_flags((pte_t *) (ptl0), (index_t)(i), (x))	96	#define SET_PTL1_FLAGS_ARCH(ptl0, i, x) set_pt_flags((pte_t *) (ptl0), (index_t)(i), (x))
97	#define SET_PTL2_FLAGS_ARCH(ptl1, i, x)	97	#define SET_PTL2_FLAGS_ARCH(ptl1, i, x)
98	#define SET_PTL3_FLAGS_ARCH(ptl2, i, x)	98	#define SET_PTL3_FLAGS_ARCH(ptl2, i, x)
99	#define SET_FRAME_FLAGS_ARCH(ptl3, i, x) set_pt_flags((pte_t *) (ptl3), (index_t)(i), (x))	99	#define SET_FRAME_FLAGS_ARCH(ptl3, i, x) set_pt_flags((pte_t *) (ptl3), (index_t)(i), (x))
100		100
101	#define PTE_VALID_ARCH(p) (((uint32_t ) (p)) != 0)	101	#define PTE_VALID_ARCH(p) (((uint32_t ) (p)) != 0)
102	#define PTE_PRESENT_ARCH(p) ((p)->present != 0)	102	#define PTE_PRESENT_ARCH(p) ((p)->present != 0)
103	#define PTE_GET_FRAME_ARCH(p) ((p)->frame_address << FRAME_WIDTH)	103	#define PTE_GET_FRAME_ARCH(p) ((p)->frame_address << FRAME_WIDTH)
104	#define PTE_WRITABLE_ARCH(p) ((p)->writeable != 0)	104	#define PTE_WRITABLE_ARCH(p) ((p)->writeable != 0)
105	#define PTE_EXECUTABLE_ARCH(p) 1	105	#define PTE_EXECUTABLE_ARCH(p) 1
106		106
107	#ifndef __ASM__	107	#ifndef __ASM__
108		108
109	#include <mm/page.h>	109	#include <mm/page.h>
110	#include <arch/types.h>	110	#include <arch/types.h>
111	#include <arch/mm/frame.h>	111	#include <arch/mm/frame.h>
112	#include <typedefs.h>	112	#include <typedefs.h>
113	#include <arch/hypercall.h>	113	#include <arch/hypercall.h>
114		114
115	/* Page fault error codes. */	115	/* Page fault error codes. */
116		116
117	/** When bit on this position is 0, the page fault was caused by a not-present page. */	117	/** When bit on this position is 0, the page fault was caused by a not-present page. */
118	#define PFERR_CODE_P (1 << 0)	118	#define PFERR_CODE_P (1 << 0)
119		119
120	/** When bit on this position is 1, the page fault was caused by a write. */	120	/** When bit on this position is 1, the page fault was caused by a write. */
121	#define PFERR_CODE_RW (1 << 1)	121	#define PFERR_CODE_RW (1 << 1)
122		122
123	/** When bit on this position is 1, the page fault was caused in user mode. */	123	/** When bit on this position is 1, the page fault was caused in user mode. */
124	#define PFERR_CODE_US (1 << 2)	124	#define PFERR_CODE_US (1 << 2)
125		125
126	/** When bit on this position is 1, a reserved bit was set in page directory. */	126	/** When bit on this position is 1, a reserved bit was set in page directory. */
127	#define PFERR_CODE_RSVD (1 << 3)	127	#define PFERR_CODE_RSVD (1 << 3)
128		128
129	/** Page Table Entry. */	129	/** Page Table Entry. */
130	struct page_specifier {	130	struct page_specifier {
131	unsigned present : 1;	131	unsigned present : 1;
132	unsigned writeable : 1;	132	unsigned writeable : 1;
133	unsigned uaccessible : 1;	133	unsigned uaccessible : 1;
134	unsigned page_write_through : 1;	134	unsigned page_write_through : 1;
135	unsigned page_cache_disable : 1;	135	unsigned page_cache_disable : 1;
136	unsigned accessed : 1;	136	unsigned accessed : 1;
137	unsigned dirty : 1;	137	unsigned dirty : 1;
138	unsigned pat : 1;	138	unsigned pat : 1;
139	unsigned global : 1;	139	unsigned global : 1;
140	unsigned soft_valid : 1; /*< Valid content even if the present bit is not set. /	140	unsigned soft_valid : 1; /*< Valid content even if the present bit is not set. /
141	unsigned avl : 2;	141	unsigned avl : 2;
142	unsigned frame_address : 20;	142	unsigned frame_address : 20;
143	} __attribute__ ((packed));	143	} __attribute__ ((packed));
144		144
145	typedef struct {	145	typedef struct {
146	uint64_t ptr; /*< Machine address of PTE /	146	uint64_t ptr; /*< Machine address of PTE /
147	union { /*< New contents of PTE /	147	union { /*< New contents of PTE /
148	uint64_t val;	148	uint64_t val;
149	pte_t pte;	149	pte_t pte;
150	};	150	};
151	} mmu_update_t;	151	} mmu_update_t;
152		152
153	typedef struct {	153	typedef struct {
154	unsigned int cmd;	154	unsigned int cmd;
155	union {	155	union {
156	unsigned long mfn;	156	unsigned long mfn;
157	unsigned long linear_addr;	157	unsigned long linear_addr;
158	};	158	};
159	union {	159	union {
160	unsigned int nr_ents;	160	unsigned int nr_ents;
161	void *vcpumask;	161	void *vcpumask;
162	};	162	};
163	} mmuext_op_t;	163	} mmuext_op_t;
164		164
165	static inline int xen_update_va_mapping(const void *va, const pte_t pte, const unsigned int flags)	165	static inline int xen_update_va_mapping(const void *va, const pte_t pte, const unsigned int flags)
166	{	166	{
167	return hypercall4(XEN_UPDATE_VA_MAPPING, va, pte, 0, flags);	167	return hypercall4(XEN_UPDATE_VA_MAPPING, va, pte, 0, flags);
168	}	168	}
169		169
170	static inline int xen_mmu_update(const mmu_update_t req, const unsigned int count, unsigned int success_count, domid_t domid)	170	static inline int xen_mmu_update(const mmu_update_t req, const unsigned int count, unsigned int success_count, domid_t domid)
171	{	171	{
172	return hypercall4(XEN_MMU_UPDATE, req, count, success_count, domid);	172	return hypercall4(XEN_MMU_UPDATE, req, count, success_count, domid);
173	}	173	}
174		174
175	static inline int xen_mmuext_op(const mmuext_op_t op, const unsigned int count, unsigned int success_count, domid_t domid)	175	static inline int xen_mmuext_op(const mmuext_op_t op, const unsigned int count, unsigned int success_count, domid_t domid)
176	{	176	{
177	return hypercall4(XEN_MMUEXT_OP, op, count, success_count, domid);	177	return hypercall4(XEN_MMUEXT_OP, op, count, success_count, domid);
178	}	178	}
179		179
180	static inline int get_pt_flags(pte_t *pt, index_t i)	180	static inline int get_pt_flags(pte_t *pt, index_t i)
181	{	181	{
182	pte_t *p = &pt[i];	182	pte_t *p = &pt[i];
183		183
184	return (	184	return (
185	(!p->page_cache_disable)<<PAGE_CACHEABLE_SHIFT \|	185	(!p->page_cache_disable)<<PAGE_CACHEABLE_SHIFT \|
186	(!p->present)<<PAGE_PRESENT_SHIFT \|	186	(!p->present)<<PAGE_PRESENT_SHIFT \|
187	p->uaccessible<<PAGE_USER_SHIFT \|	187	p->uaccessible<<PAGE_USER_SHIFT \|
188	1<<PAGE_READ_SHIFT \|	188	1<<PAGE_READ_SHIFT \|
189	p->writeable<<PAGE_WRITE_SHIFT \|	189	p->writeable<<PAGE_WRITE_SHIFT \|
190	1<<PAGE_EXEC_SHIFT \|	190	1<<PAGE_EXEC_SHIFT \|
191	p->global<<PAGE_GLOBAL_SHIFT	191	p->global<<PAGE_GLOBAL_SHIFT
192	);	192	);
193	}	193	}
194		194
195	static inline void set_pt_flags(pte_t *pt, index_t i, int flags)	195	static inline void set_pt_flags(pte_t *pt, index_t i, int flags)
196	{	196	{
197	pte_t *p = &pt[i];	197	pte_t *p = &pt[i];
198		198
199	p->page_cache_disable = !(flags & PAGE_CACHEABLE);	199	p->page_cache_disable = !(flags & PAGE_CACHEABLE);
200	p->present = !(flags & PAGE_NOT_PRESENT);	200	p->present = !(flags & PAGE_NOT_PRESENT);
201	p->uaccessible = (flags & PAGE_USER) != 0;	201	p->uaccessible = (flags & PAGE_USER) != 0;
202	p->writeable = (flags & PAGE_WRITE) != 0;	202	p->writeable = (flags & PAGE_WRITE) != 0;
203	p->global = (flags & PAGE_GLOBAL) != 0;	203	p->global = (flags & PAGE_GLOBAL) != 0;
204		204
205	/*	205	/*
206	* Ensure that there is at least one bit set even if the present bit is cleared.	206	* Ensure that there is at least one bit set even if the present bit is cleared.
207	*/	207	*/
208	p->soft_valid = true;	208	p->soft_valid = true;
209	}	209	}
210		210
211	extern void page_arch_init(void);	211	extern void page_arch_init(void);
212	extern void page_fault(int n, istate_t *istate);	212	extern void page_fault(int n, istate_t *istate);
213		213
214	#endif /* __ASM__ */	214	#endif /* __ASM__ */
215		215
216	#endif /* KERNEL */	216	#endif /* KERNEL */
217		217
218	#endif	218	#endif
219		219
220	/** @}	220	/** @}
221	*/	221	*/
222		222