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/*
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/*
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 * Copyright (C) 2006 Martin Decky
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 * Copyright (C) 2006 Martin Decky
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 * All rights reserved.
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 * All rights reserved.
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 *
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 *
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 * Redistribution and use in source and binary forms, with or without
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 * Redistribution and use in source and binary forms, with or without
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 * modification, are permitted provided that the following conditions
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 * modification, are permitted provided that the following conditions
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 * are met:
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 * are met:
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 *
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 *
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 * - Redistributions of source code must retain the above copyright
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 * - Redistributions of source code must retain the above copyright
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 *   notice, this list of conditions and the following disclaimer.
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 *   notice, this list of conditions and the following disclaimer.
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 * - Redistributions in binary form must reproduce the above copyright
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 * - Redistributions in binary form must reproduce the above copyright
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 *   notice, this list of conditions and the following disclaimer in the
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 *   notice, this list of conditions and the following disclaimer in the
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 *   documentation and/or other materials provided with the distribution.
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 *   documentation and/or other materials provided with the distribution.
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 * - The name of the author may not be used to endorse or promote products
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 * - The name of the author may not be used to endorse or promote products
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 *   derived from this software without specific prior written permission.
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 *   derived from this software without specific prior written permission.
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 *
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 *
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 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
25
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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 */
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 */
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#ifndef __xen32_HYPERCALL_H__
29
#ifndef __xen32_HYPERCALL_H__
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#define __xen32_HYPERCALL_H__
30
#define __xen32_HYPERCALL_H__
31
 
31
 
32
#include <arch/types.h>
32
#include <arch/types.h>
33
#include <macros.h>
33
#include <macros.h>
34
 
34
 
35
 
35
 
36
typedef uint16_t domid_t;
36
typedef uint16_t domid_t;
37
 
37
 
38
 
38
 
-
 
39
typedef struct {
-
 
40
    uint8_t vector;     /**< Exception vector */
-
 
41
    uint8_t flags;      /**< 0-3: privilege level; 4: clear event enable */
-
 
42
    uint16_t cs;        /**< Code selector */
-
 
43
    uintptr_t address;  /**< Code offset */
-
 
44
} trap_info_t;
-
 
45
 
-
 
46
 
-
 
47
#define XEN_SET_TRAP_TABLE      0
39
#define XEN_MMU_UPDATE          1
48
#define XEN_MMU_UPDATE          1
-
 
49
#define XEN_SET_CALLBACKS       4
40
#define XEN_UPDATE_VA_MAPPING   14
50
#define XEN_UPDATE_VA_MAPPING   14
41
#define XEN_CONSOLE_IO          18
51
#define XEN_CONSOLE_IO          18
42
#define XEN_VM_ASSIST           21
52
#define XEN_VM_ASSIST           21
43
#define XEN_MMUEXT_OP           26
53
#define XEN_MMUEXT_OP           26
44
 
54
 
45
 
55
 
46
/*
56
/*
47
 * Commands for XEN_CONSOLE_IO
57
 * Commands for XEN_CONSOLE_IO
48
 */
58
 */
49
#define CONSOLE_IO_WRITE    0
59
#define CONSOLE_IO_WRITE    0
50
#define CONSOLE_IO_READ     1
60
#define CONSOLE_IO_READ     1
51
 
61
 
52
 
62
 
53
#define MMUEXT_PIN_L1_TABLE      0
63
#define MMUEXT_PIN_L1_TABLE      0
54
#define MMUEXT_PIN_L2_TABLE      1
64
#define MMUEXT_PIN_L2_TABLE      1
55
#define MMUEXT_PIN_L3_TABLE      2
65
#define MMUEXT_PIN_L3_TABLE      2
56
#define MMUEXT_PIN_L4_TABLE      3
66
#define MMUEXT_PIN_L4_TABLE      3
57
#define MMUEXT_UNPIN_TABLE       4
67
#define MMUEXT_UNPIN_TABLE       4
58
#define MMUEXT_NEW_BASEPTR       5
68
#define MMUEXT_NEW_BASEPTR       5
59
#define MMUEXT_TLB_FLUSH_LOCAL   6
69
#define MMUEXT_TLB_FLUSH_LOCAL   6
60
#define MMUEXT_INVLPG_LOCAL      7
70
#define MMUEXT_INVLPG_LOCAL      7
61
#define MMUEXT_TLB_FLUSH_MULTI   8
71
#define MMUEXT_TLB_FLUSH_MULTI   8
62
#define MMUEXT_INVLPG_MULTI      9
72
#define MMUEXT_INVLPG_MULTI      9
63
#define MMUEXT_TLB_FLUSH_ALL    10
73
#define MMUEXT_TLB_FLUSH_ALL    10
64
#define MMUEXT_INVLPG_ALL       11
74
#define MMUEXT_INVLPG_ALL       11
65
#define MMUEXT_FLUSH_CACHE      12
75
#define MMUEXT_FLUSH_CACHE      12
66
#define MMUEXT_SET_LDT          13
76
#define MMUEXT_SET_LDT          13
67
#define MMUEXT_NEW_USER_BASEPTR 15
77
#define MMUEXT_NEW_USER_BASEPTR 15
68
 
78
 
69
 
79
 
70
#define UVMF_NONE               0        /**< No flushing at all */
80
#define UVMF_NONE               0        /**< No flushing at all */
71
#define UVMF_TLB_FLUSH          1        /**< Flush entire TLB(s) */
81
#define UVMF_TLB_FLUSH          1        /**< Flush entire TLB(s) */
72
#define UVMF_INVLPG             2        /**< Flush only one entry */
82
#define UVMF_INVLPG             2        /**< Flush only one entry */
73
#define UVMF_FLUSHTYPE_MASK     3
83
#define UVMF_FLUSHTYPE_MASK     3
74
#define UVMF_MULTI              0        /**< Flush subset of TLBs */
84
#define UVMF_MULTI              0        /**< Flush subset of TLBs */
75
#define UVMF_LOCAL              0        /**< Flush local TLB */
85
#define UVMF_LOCAL              0        /**< Flush local TLB */
76
#define UVMF_ALL                (1 << 2) /**< Flush all TLBs */
86
#define UVMF_ALL                (1 << 2) /**< Flush all TLBs */
77
 
87
 
78
 
88
 
79
/*
89
/*
80
 * Commands to XEN_VM_ASSIST
90
 * Commands to XEN_VM_ASSIST
81
 */
91
 */
82
#define VMASST_CMD_ENABLE               0
92
#define VMASST_CMD_ENABLE               0
83
#define VMASST_CMD_DISABLE              1
93
#define VMASST_CMD_DISABLE              1
84
#define VMASST_TYPE_4GB_SEGMENTS        0
94
#define VMASST_TYPE_4GB_SEGMENTS        0
85
#define VMASST_TYPE_4GB_SEGMENTS_NOTIFY 1
95
#define VMASST_TYPE_4GB_SEGMENTS_NOTIFY 1
86
#define VMASST_TYPE_WRITABLE_PAGETABLES 2
96
#define VMASST_TYPE_WRITABLE_PAGETABLES 2
87
 
97
 
88
 
98
 
89
#define DOMID_SELF (0x7FF0U)
99
#define DOMID_SELF (0x7FF0U)
90
#define DOMID_IO   (0x7FF1U)
100
#define DOMID_IO   (0x7FF1U)
91
 
101
 
92
 
102
 
93
#define hypercall0(id)  \
103
#define hypercall0(id)  \
94
    ({  \
104
    ({  \
95
        unative_t ret;  \
105
        unative_t ret;  \
96
        asm volatile (  \
106
        asm volatile (  \
97
            "call hypercall_page + (" STRING(id) " * 32)\n" \
107
            "call hypercall_page + (" STRING(id) " * 32)\n" \
98
            : "=a" (ret)    \
108
            : "=a" (ret)    \
99
            :   \
109
            :   \
100
            : "memory"  \
110
            : "memory"  \
101
        );  \
111
        );  \
102
        ret;    \
112
        ret;    \
103
    })
113
    })
104
 
114
 
105
#define hypercall1(id, p1)  \
115
#define hypercall1(id, p1)  \
106
    ({  \
116
    ({  \
107
        unative_t ret, __ign1;  \
117
        unative_t ret, __ign1;  \
108
        asm volatile (  \
118
        asm volatile (  \
109
            "call hypercall_page + (" STRING(id) " * 32)\n" \
119
            "call hypercall_page + (" STRING(id) " * 32)\n" \
110
            : "=a" (ret), \
120
            : "=a" (ret), \
111
              "=b" (__ign1) \
121
              "=b" (__ign1) \
112
            : "1" (p1)  \
122
            : "1" (p1)  \
113
            : "memory"  \
123
            : "memory"  \
114
        );  \
124
        );  \
115
        ret;    \
125
        ret;    \
116
    })
126
    })
117
 
127
 
118
#define hypercall2(id, p1, p2)  \
128
#define hypercall2(id, p1, p2)  \
119
    ({  \
129
    ({  \
120
        unative_t ret, __ign1, __ign2;  \
130
        unative_t ret, __ign1, __ign2;  \
121
        asm volatile (  \
131
        asm volatile (  \
122
            "call hypercall_page + (" STRING(id) " * 32)\n" \
132
            "call hypercall_page + (" STRING(id) " * 32)\n" \
123
            : "=a" (ret), \
133
            : "=a" (ret), \
124
              "=b" (__ign1),    \
134
              "=b" (__ign1),    \
125
              "=c" (__ign2) \
135
              "=c" (__ign2) \
126
            : "1" (p1), \
136
            : "1" (p1), \
127
              "2" (p2)  \
137
              "2" (p2)  \
128
            : "memory"  \
138
            : "memory"  \
129
        );  \
139
        );  \
130
        ret;    \
140
        ret;    \
131
    })
141
    })
132
 
142
 
133
#define hypercall3(id, p1, p2, p3)  \
143
#define hypercall3(id, p1, p2, p3)  \
134
    ({  \
144
    ({  \
135
        unative_t ret, __ign1, __ign2, __ign3;  \
145
        unative_t ret, __ign1, __ign2, __ign3;  \
136
        asm volatile (  \
146
        asm volatile (  \
137
            "call hypercall_page + (" STRING(id) " * 32)\n" \
147
            "call hypercall_page + (" STRING(id) " * 32)\n" \
138
            : "=a" (ret), \
148
            : "=a" (ret), \
139
              "=b" (__ign1),    \
149
              "=b" (__ign1),    \
140
              "=c" (__ign2),    \
150
              "=c" (__ign2),    \
141
              "=d" (__ign3) \
151
              "=d" (__ign3) \
142
            : "1" (p1), \
152
            : "1" (p1), \
143
              "2" (p2), \
153
              "2" (p2), \
144
              "3" (p3)  \
154
              "3" (p3)  \
145
            : "memory"  \
155
            : "memory"  \
146
        );  \
156
        );  \
147
        ret;    \
157
        ret;    \
148
    })
158
    })
149
 
159
 
150
#define hypercall4(id, p1, p2, p3, p4)  \
160
#define hypercall4(id, p1, p2, p3, p4)  \
151
    ({  \
161
    ({  \
152
        unative_t ret, __ign1, __ign2, __ign3, __ign4;  \
162
        unative_t ret, __ign1, __ign2, __ign3, __ign4;  \
153
        asm volatile (  \
163
        asm volatile (  \
154
            "call hypercall_page + (" STRING(id) " * 32)\n" \
164
            "call hypercall_page + (" STRING(id) " * 32)\n" \
155
            : "=a" (ret), \
165
            : "=a" (ret), \
156
              "=b" (__ign1),    \
166
              "=b" (__ign1),    \
157
              "=c" (__ign2),    \
167
              "=c" (__ign2),    \
158
              "=d" (__ign3),    \
168
              "=d" (__ign3),    \
159
              "=S" (__ign4) \
169
              "=S" (__ign4) \
160
            : "1" (p1), \
170
            : "1" (p1), \
161
              "2" (p2), \
171
              "2" (p2), \
162
              "3" (p3), \
172
              "3" (p3), \
163
              "4" (p4)  \
173
              "4" (p4)  \
164
            : "memory"  \
174
            : "memory"  \
165
        );  \
175
        );  \
166
        ret;    \
176
        ret;    \
167
    })
177
    })
168
 
178
 
169
#define hypercall5(id, p1, p2, p3, p4, p5)  \
179
#define hypercall5(id, p1, p2, p3, p4, p5)  \
170
    ({  \
180
    ({  \
171
        unative_t ret, __ign1, __ign2, __ign3, __ign4, __ign5;  \
181
        unative_t ret, __ign1, __ign2, __ign3, __ign4, __ign5;  \
172
        asm volatile (  \
182
        asm volatile (  \
173
            "call hypercall_page + (" STRING(id) " * 32)\n" \
183
            "call hypercall_page + (" STRING(id) " * 32)\n" \
174
            : "=a" (ret), \
184
            : "=a" (ret), \
175
              "=b" (__ign1),    \
185
              "=b" (__ign1),    \
176
              "=c" (__ign2),    \
186
              "=c" (__ign2),    \
177
              "=d" (__ign3),    \
187
              "=d" (__ign3),    \
178
              "=S" (__ign4),    \
188
              "=S" (__ign4),    \
179
              "=D" (__ign5) \
189
              "=D" (__ign5) \
180
            : "1" (p1), \
190
            : "1" (p1), \
181
              "2" (p2), \
191
              "2" (p2), \
182
              "3" (p3), \
192
              "3" (p3), \
183
              "4" (p4), \
193
              "4" (p4), \
184
              "5" (p5)  \
194
              "5" (p5)  \
185
            : "memory"  \
195
            : "memory"  \
186
        );  \
196
        );  \
187
        ret;    \
197
        ret;    \
188
    })
198
    })
189
 
199
 
190
 
200
 
191
static inline int xen_console_io(const unsigned int cmd, const unsigned int count, const char *str)
201
static inline int xen_console_io(const unsigned int cmd, const unsigned int count, const char *str)
192
{
202
{
193
    return hypercall3(XEN_CONSOLE_IO, cmd, count, str);
203
    return hypercall3(XEN_CONSOLE_IO, cmd, count, str);
194
}
204
}
195
 
205
 
196
static inline int xen_vm_assist(const unsigned int cmd, const unsigned int type)
206
static inline int xen_vm_assist(const unsigned int cmd, const unsigned int type)
197
{
207
{
198
    return hypercall2(XEN_VM_ASSIST, cmd, type);
208
    return hypercall2(XEN_VM_ASSIST, cmd, type);
199
}
209
}
-
 
210
 
-
 
211
static inline int xen_set_callbacks(const unsigned int event_selector, const void *event_address, const unsigned int failsafe_selector, void *failsafe_address)
-
 
212
{
-
 
213
    return hypercall4(XEN_SET_CALLBACKS, event_selector, event_address, failsafe_selector, failsafe_address);
-
 
214
}
-
 
215
 
-
 
216
static inline int xen_set_trap_table(const trap_info_t *table)
-
 
217
{
-
 
218
    return hypercall1(XEN_SET_TRAP_TABLE, table);
-
 
219
}
200
 
220
 
201
#endif
221
#endif
202
 
222