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/*
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/*
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 * Copyright (C) 2006 Martin Decky
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 * Copyright (C) 2006 Martin Decky
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 * All rights reserved.
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 * All rights reserved.
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 *
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 *
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 * Redistribution and use in source and binary forms, with or without
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 * Redistribution and use in source and binary forms, with or without
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 * modification, are permitted provided that the following conditions
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 * modification, are permitted provided that the following conditions
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 * are met:
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 * are met:
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 *
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 *
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 * - Redistributions of source code must retain the above copyright
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 * - Redistributions of source code must retain the above copyright
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 *   notice, this list of conditions and the following disclaimer.
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 *   notice, this list of conditions and the following disclaimer.
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 * - Redistributions in binary form must reproduce the above copyright
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 * - Redistributions in binary form must reproduce the above copyright
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 *   notice, this list of conditions and the following disclaimer in the
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 *   notice, this list of conditions and the following disclaimer in the
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 *   documentation and/or other materials provided with the distribution.
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 *   documentation and/or other materials provided with the distribution.
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 * - The name of the author may not be used to endorse or promote products
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 * - The name of the author may not be used to endorse or promote products
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 *   derived from this software without specific prior written permission.
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 *   derived from this software without specific prior written permission.
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 *
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 *
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 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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 */
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 */
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#ifndef __xen32_HYPERCALL_H__
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#ifndef __xen32_HYPERCALL_H__
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#define __xen32_HYPERCALL_H__
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#define __xen32_HYPERCALL_H__
31
 
31
 
32
#include <arch/types.h>
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#include <arch/types.h>
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#include <macros.h>
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#include <macros.h>
34
 
34
 
35
 
35
 
36
typedef uint16_t domid_t;
36
typedef uint16_t domid_t;
37
 
37
 
38
typedef struct {
-
 
39
    uint64_t ptr;  /**< Machine address of PTE */
-
 
40
    uint64_t val;  /**< New contents of PTE */
-
 
41
} mmu_update_t;
-
 
42
 
38
 
43
typedef struct {
-
 
44
    unsigned int cmd;
-
 
45
    union {
-
 
46
        unsigned long mfn;
39
#define XEN_MMU_UPDATE          1
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        unsigned long linear_addr;
40
#define XEN_UPDATE_VA_MAPPING   14
48
    } arg1;
-
 
49
    union {
-
 
50
        unsigned int nr_ents;
-
 
51
        void *vcpumask;
-
 
52
    } arg2;
-
 
53
} mmuext_op_t;
-
 
54
 
-
 
55
 
-
 
56
#define XEN_MMU_UPDATE  1
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#define XEN_CONSOLE_IO          18
57
#define XEN_CONSOLE_IO  18
42
#define XEN_VM_ASSIST           21
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#define XEN_MMUEXT_OP   26
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#define XEN_MMUEXT_OP           26
59
 
44
 
60
 
45
 
61
/*
46
/*
62
 * Commands for XEN_CONSOLE_IO
47
 * Commands for XEN_CONSOLE_IO
63
 */
48
 */
64
#define CONSOLE_IO_WRITE    0
49
#define CONSOLE_IO_WRITE    0
65
#define CONSOLE_IO_READ     1
50
#define CONSOLE_IO_READ     1
66
 
51
 
67
 
52
 
68
#define MMUEXT_PIN_L1_TABLE      0
53
#define MMUEXT_PIN_L1_TABLE      0
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#define MMUEXT_PIN_L2_TABLE      1
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#define MMUEXT_PIN_L2_TABLE      1
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#define MMUEXT_PIN_L3_TABLE      2
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#define MMUEXT_PIN_L3_TABLE      2
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#define MMUEXT_PIN_L4_TABLE      3
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#define MMUEXT_PIN_L4_TABLE      3
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#define MMUEXT_UNPIN_TABLE       4
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#define MMUEXT_UNPIN_TABLE       4
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#define MMUEXT_NEW_BASEPTR       5
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#define MMUEXT_NEW_BASEPTR       5
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#define MMUEXT_TLB_FLUSH_LOCAL   6
59
#define MMUEXT_TLB_FLUSH_LOCAL   6
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#define MMUEXT_INVLPG_LOCAL      7
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#define MMUEXT_INVLPG_LOCAL      7
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#define MMUEXT_TLB_FLUSH_MULTI   8
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#define MMUEXT_TLB_FLUSH_MULTI   8
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#define MMUEXT_INVLPG_MULTI      9
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#define MMUEXT_INVLPG_MULTI      9
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#define MMUEXT_TLB_FLUSH_ALL    10
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#define MMUEXT_TLB_FLUSH_ALL    10
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#define MMUEXT_INVLPG_ALL       11
64
#define MMUEXT_INVLPG_ALL       11
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#define MMUEXT_FLUSH_CACHE      12
65
#define MMUEXT_FLUSH_CACHE      12
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#define MMUEXT_SET_LDT          13
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#define MMUEXT_SET_LDT          13
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#define MMUEXT_NEW_USER_BASEPTR 15
67
#define MMUEXT_NEW_USER_BASEPTR 15
83
 
68
 
84
 
69
 
-
 
70
#define UVMF_NONE               0        /**< No flushing at all */
-
 
71
#define UVMF_TLB_FLUSH          1        /**< Flush entire TLB(s) */
-
 
72
#define UVMF_INVLPG             2        /**< Flush only one entry */
-
 
73
#define UVMF_FLUSHTYPE_MASK     3
-
 
74
#define UVMF_MULTI              0        /**< Flush subset of TLBs */
-
 
75
#define UVMF_LOCAL              0        /**< Flush local TLB */
-
 
76
#define UVMF_ALL                (1 << 2) /**< Flush all TLBs */
-
 
77
 
-
 
78
 
-
 
79
/*
-
 
80
 * Commands to XEN_VM_ASSIST
-
 
81
 */
-
 
82
#define VMASST_CMD_ENABLE               0
-
 
83
#define VMASST_CMD_DISABLE              1
-
 
84
#define VMASST_TYPE_4GB_SEGMENTS        0
-
 
85
#define VMASST_TYPE_4GB_SEGMENTS_NOTIFY 1
-
 
86
#define VMASST_TYPE_WRITABLE_PAGETABLES 2
-
 
87
 
-
 
88
 
85
#define DOMID_SELF (0x7FF0U)
89
#define DOMID_SELF (0x7FF0U)
86
#define DOMID_IO   (0x7FF1U)
90
#define DOMID_IO   (0x7FF1U)
87
 
91
 
88
 
92
 
89
#define hypercall0(id)  \
93
#define hypercall0(id)  \
90
    ({  \
94
    ({  \
91
        unative_t ret;  \
95
        unative_t ret;  \
92
        asm volatile (  \
96
        asm volatile (  \
93
            "call hypercall_page + (" STRING(id) " * 32)\n" \
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            "call hypercall_page + (" STRING(id) " * 32)\n" \
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            : "=a" (ret)    \
98
            : "=a" (ret)    \
95
            :   \
99
            :   \
96
            : "memory"  \
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            : "memory"  \
97
        );  \
101
        );  \
98
        ret;    \
102
        ret;    \
99
    })
103
    })
100
 
104
 
101
#define hypercall1(id, p1)  \
105
#define hypercall1(id, p1)  \
102
    ({  \
106
    ({  \
103
        unative_t ret, __ign1;  \
107
        unative_t ret, __ign1;  \
104
        asm volatile (  \
108
        asm volatile (  \
105
            "call hypercall_page + (" STRING(id) " * 32)\n" \
109
            "call hypercall_page + (" STRING(id) " * 32)\n" \
106
            : "=a" (ret), \
110
            : "=a" (ret), \
107
              "=b" (__ign1) \
111
              "=b" (__ign1) \
108
            : "1" (p1)  \
112
            : "1" (p1)  \
109
            : "memory"  \
113
            : "memory"  \
110
        );  \
114
        );  \
111
        ret;    \
115
        ret;    \
112
    })
116
    })
113
 
117
 
114
#define hypercall2(id, p1, p2)  \
118
#define hypercall2(id, p1, p2)  \
115
    ({  \
119
    ({  \
116
        unative_t ret, __ign1, __ign2;  \
120
        unative_t ret, __ign1, __ign2;  \
117
        asm volatile (  \
121
        asm volatile (  \
118
            "call hypercall_page + (" STRING(id) " * 32)\n" \
122
            "call hypercall_page + (" STRING(id) " * 32)\n" \
119
            : "=a" (ret), \
123
            : "=a" (ret), \
120
              "=b" (__ign1),    \
124
              "=b" (__ign1),    \
121
              "=c" (__ign2) \
125
              "=c" (__ign2) \
122
            : "1" (p1), \
126
            : "1" (p1), \
123
              "2" (p2)  \
127
              "2" (p2)  \
124
            : "memory"  \
128
            : "memory"  \
125
        );  \
129
        );  \
126
        ret;    \
130
        ret;    \
127
    })
131
    })
128
 
132
 
129
#define hypercall3(id, p1, p2, p3)  \
133
#define hypercall3(id, p1, p2, p3)  \
130
    ({  \
134
    ({  \
131
        unative_t ret, __ign1, __ign2, __ign3;  \
135
        unative_t ret, __ign1, __ign2, __ign3;  \
132
        asm volatile (  \
136
        asm volatile (  \
133
            "call hypercall_page + (" STRING(id) " * 32)\n" \
137
            "call hypercall_page + (" STRING(id) " * 32)\n" \
134
            : "=a" (ret), \
138
            : "=a" (ret), \
135
              "=b" (__ign1),    \
139
              "=b" (__ign1),    \
136
              "=c" (__ign2),    \
140
              "=c" (__ign2),    \
137
              "=d" (__ign3) \
141
              "=d" (__ign3) \
138
            : "1" (p1), \
142
            : "1" (p1), \
139
              "2" (p2), \
143
              "2" (p2), \
140
              "3" (p3)  \
144
              "3" (p3)  \
141
            : "memory"  \
145
            : "memory"  \
142
        );  \
146
        );  \
143
        ret;    \
147
        ret;    \
144
    })
148
    })
145
 
149
 
146
#define hypercall4(id, p1, p2, p3, p4)  \
150
#define hypercall4(id, p1, p2, p3, p4)  \
147
    ({  \
151
    ({  \
148
        unative_t ret, __ign1, __ign2, __ign3, __ign4;  \
152
        unative_t ret, __ign1, __ign2, __ign3, __ign4;  \
149
        asm volatile (  \
153
        asm volatile (  \
150
            "call hypercall_page + (" STRING(id) " * 32)\n" \
154
            "call hypercall_page + (" STRING(id) " * 32)\n" \
151
            : "=a" (ret), \
155
            : "=a" (ret), \
152
              "=b" (__ign1),    \
156
              "=b" (__ign1),    \
153
              "=c" (__ign2),    \
157
              "=c" (__ign2),    \
154
              "=d" (__ign3),    \
158
              "=d" (__ign3),    \
155
              "=S" (__ign4) \
159
              "=S" (__ign4) \
156
            : "1" (p1), \
160
            : "1" (p1), \
157
              "2" (p2), \
161
              "2" (p2), \
158
              "3" (p3), \
162
              "3" (p3), \
159
              "4" (p4)  \
163
              "4" (p4)  \
160
            : "memory"  \
164
            : "memory"  \
161
        );  \
165
        );  \
162
        ret;    \
166
        ret;    \
163
    })
167
    })
164
 
168
 
165
#define hypercall5(id, p1, p2, p3, p4, p5)  \
169
#define hypercall5(id, p1, p2, p3, p4, p5)  \
166
    ({  \
170
    ({  \
167
        unative_t ret, __ign1, __ign2, __ign3, __ign4, __ign5;  \
171
        unative_t ret, __ign1, __ign2, __ign3, __ign4, __ign5;  \
168
        asm volatile (  \
172
        asm volatile (  \
169
            "call hypercall_page + (" STRING(id) " * 32)\n" \
173
            "call hypercall_page + (" STRING(id) " * 32)\n" \
170
            : "=a" (ret), \
174
            : "=a" (ret), \
171
              "=b" (__ign1),    \
175
              "=b" (__ign1),    \
172
              "=c" (__ign2),    \
176
              "=c" (__ign2),    \
173
              "=d" (__ign3),    \
177
              "=d" (__ign3),    \
174
              "=S" (__ign4),    \
178
              "=S" (__ign4),    \
175
              "=D" (__ign5) \
179
              "=D" (__ign5) \
176
            : "1" (p1), \
180
            : "1" (p1), \
177
              "2" (p2), \
181
              "2" (p2), \
178
              "3" (p3), \
182
              "3" (p3), \
179
              "4" (p4), \
183
              "4" (p4), \
180
              "5" (p5)  \
184
              "5" (p5)  \
181
            : "memory"  \
185
            : "memory"  \
182
        );  \
186
        );  \
183
        ret;    \
187
        ret;    \
184
    })
188
    })
185
 
189
 
186
 
190
 
187
static inline int xen_console_io(const unsigned int cmd, const unsigned int count, const char *str)
191
static inline int xen_console_io(const unsigned int cmd, const unsigned int count, const char *str)
188
{
192
{
189
    return hypercall3(XEN_CONSOLE_IO, cmd, count, str);
193
    return hypercall3(XEN_CONSOLE_IO, cmd, count, str);
190
}
194
}
191
 
195
 
192
static inline int xen_mmu_update(const mmu_update_t *req, const unsigned int count, unsigned int *success_count, domid_t domid)
-
 
193
{
-
 
194
    return hypercall4(XEN_MMU_UPDATE, req, count, success_count, domid);
-
 
195
}
-
 
196
 
-
 
197
static inline int xen_mmuext_op(const mmuext_op_t *op, const unsigned int count, unsigned int *success_count, domid_t domid)
196
static inline int xen_vm_assist(const unsigned int cmd, const unsigned int type)
198
{
197
{
199
    return hypercall4(XEN_MMUEXT_OP, op, count, success_count, domid);
198
    return hypercall2(XEN_VM_ASSIST, cmd, type);
200
}
199
}
201
 
200
 
202
#endif
201
#endif
203
 
202