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Line 74... Line 74...
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	 * Copy the bootinfo structure passed from the boot loader
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	 * Copy the bootinfo structure passed from the boot loader
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	 * to the kernel bootinfo structure.
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	 * to the kernel bootinfo structure.
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	 */
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	 */
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	mov %o1, %o2
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	mov %o1, %o2
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	mov %o0, %o1
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	mov %o0, %o1
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	set bootinfo, %o0
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	sethi %hi(bootinfo), %o0
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	call memcpy
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	call memcpy
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	nop
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	or %o0, %lo(bootinfo), %o0
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	/*
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	/*
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	 * Switch to kernel trap table.
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	 * Switch to kernel trap table.
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	 */
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	 */
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	set trap_table, %g1
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	sethi %hi(trap_table), %g1
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	wrpr %g1, 0, %tba
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	wrpr %g1, %lo(trap_table), %tba
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	/* 
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	/* 
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	 * Take over the DMMU by installing global locked
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	 * Take over the DMMU by installing global locked
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	 * TTE entry identically mapping the first 4M
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	 * TTE entry identically mapping the first 4M
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	 * of memory.
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	 * of memory.
Line 118... Line 118...
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#define SET_TLB_DATA(r1, r2, imm) \
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#define SET_TLB_DATA(r1, r2, imm) \
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	set TTE_L | TTE_CP | TTE_P | TTE_W | LMA | imm, %r1; \
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	set TTE_L | TTE_CP | TTE_P | TTE_W | LMA | imm, %r1; \
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	set PAGESIZE_4M, %r2; \
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	set PAGESIZE_4M, %r2; \
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	sllx %r2, TTE_SIZE_SHIFT, %r2; \
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	sllx %r2, TTE_SIZE_SHIFT, %r2; \
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	or %r1, %r2, %r1; \
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	or %r1, %r2, %r1; \
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	set 1, %r2; \
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	mov 1, %r2; \
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	sllx %r2, TTE_V_SHIFT, %r2; \
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	sllx %r2, TTE_V_SHIFT, %r2; \
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	or %r1, %r2, %r1;
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	or %r1, %r2, %r1;
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	! write DTLB data and install the kernel mapping
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	! write DTLB data and install the kernel mapping
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	SET_TLB_DATA(g1, g2, 0)			! use non-global mapping
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	SET_TLB_DATA(g1, g2, 0)			! use non-global mapping
Line 170... Line 170...
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170
	
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	set kernel_image_start, %g5
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	set kernel_image_start, %g5
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	! write ITLB tag of context 1
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	! write ITLB tag of context 1
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	SET_TLB_TAG(g1, MEM_CONTEXT_TEMP)
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	SET_TLB_TAG(g1, MEM_CONTEXT_TEMP)
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	set VA_DMMU_TAG_ACCESS, %g2
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	mov VA_DMMU_TAG_ACCESS, %g2
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	stxa %g1, [%g2] ASI_IMMU
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	stxa %g1, [%g2] ASI_IMMU
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	flush %g5
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	flush %g5
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	! write ITLB data and install the temporary mapping in context 1
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	! write ITLB data and install the temporary mapping in context 1
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	SET_TLB_DATA(g1, g2, 0)			! use non-global mapping
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	SET_TLB_DATA(g1, g2, 0)			! use non-global mapping
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	stxa %g1, [%g0] ASI_ITLB_DATA_IN_REG		
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	stxa %g1, [%g0] ASI_ITLB_DATA_IN_REG		
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	flush %g5
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	flush %g5
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	! switch to context 1
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	! switch to context 1
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	set MEM_CONTEXT_TEMP, %g1
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	mov MEM_CONTEXT_TEMP, %g1
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	stxa %g1, [VA_PRIMARY_CONTEXT_REG] %asi	! ASI_DMMU is correct here !!!
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	stxa %g1, [VA_PRIMARY_CONTEXT_REG] %asi	! ASI_DMMU is correct here !!!
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	flush %g5
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	flush %g5
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	! demap context 0
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	! demap context 0
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	SET_TLB_DEMAP_CMD(g1, TLB_DEMAP_NUCLEUS)
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	SET_TLB_DEMAP_CMD(g1, TLB_DEMAP_NUCLEUS)
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	stxa %g0, [%g1] ASI_IMMU_DEMAP			
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	stxa %g0, [%g1] ASI_IMMU_DEMAP			
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	flush %g5
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	flush %g5
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	! write ITLB tag of context 0
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	! write ITLB tag of context 0
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	SET_TLB_TAG(g1, MEM_CONTEXT_KERNEL)
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	SET_TLB_TAG(g1, MEM_CONTEXT_KERNEL)
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	set VA_DMMU_TAG_ACCESS, %g2
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	mov VA_DMMU_TAG_ACCESS, %g2
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	stxa %g1, [%g2] ASI_IMMU
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	stxa %g1, [%g2] ASI_IMMU
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	flush %g5
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	flush %g5
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	! write ITLB data and install the permanent kernel mapping in context 0
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	! write ITLB data and install the permanent kernel mapping in context 0
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	SET_TLB_DATA(g1, g2, 0)			! use non-global mapping
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	SET_TLB_DATA(g1, g2, 0)			! use non-global mapping
Line 208... Line 208...
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	! ensure nucleus mapping
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	! ensure nucleus mapping
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	wrpr %g0, 1, %tl
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	wrpr %g0, 1, %tl
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	! set context 1 in the primary context register
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	! set context 1 in the primary context register
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	set MEM_CONTEXT_TEMP, %g1
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	mov MEM_CONTEXT_TEMP, %g1
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	stxa %g1, [VA_PRIMARY_CONTEXT_REG] %asi	! ASI_DMMU is correct here !!!
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	stxa %g1, [VA_PRIMARY_CONTEXT_REG] %asi	! ASI_DMMU is correct here !!!
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	flush %g5
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	flush %g5
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	! demap context 1
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	! demap context 1
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	SET_TLB_DEMAP_CMD(g1, TLB_DEMAP_PRIMARY)
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	SET_TLB_DEMAP_CMD(g1, TLB_DEMAP_PRIMARY)