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/** @addtogroup sparc64mm  
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/** @addtogroup sparc64mm  
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 * @{
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 * @{
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 */
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 */
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/**
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/**
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 * @file
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 * @file
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 * @brief   D-cache shootdown algorithm.
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 */
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 */
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#include <arch/mm/cache.h>
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#include <arch/mm/cache.h>
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- 
 
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#ifdef CONFIG_SMP
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#ifdef CONFIG_VIRT_IDX_DCACHE
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#include <smp/ipi.h>
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#include <arch/interrupt.h>
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#include <synch/spinlock.h>
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#include <arch.h>
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#include <debug.h>
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/**
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 * This spinlock is used by the processors to synchronize during the D-cache
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 * shootdown.
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 */
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SPINLOCK_INITIALIZE(dcachelock);
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/** Initialize the D-cache shootdown sequence.
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 *
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 * Start the shootdown sequence by sending out an IPI and wait until all
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 * processors spin on the dcachelock spinlock.
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 *
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 * @param type  Scope of the D-cache shootdown.
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 * @param color Color to be invalidated; applicable only for DCACHE_INVL_COLOR
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 *      and DCACHE_INVL_FRAME invalidation types.
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 * @param frame Frame to be invalidated; applicable only for DCACHE_INVL_FRAME
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 *      invalidation types.
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 */
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void dcache_shootdown_start(dcache_invalidate_type_t type, int color,
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    uintptr_t frame)
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{
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    int i;
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    CPU->arch.dcache_active = 0;
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    spinlock_lock(&dcachelock);
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    for (i = 0; i < config.cpu_count; i++) {
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        cpu_t *cpu;
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        if (i == CPU->id)
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            continue;
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        cpu = &cpus[i];
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        spinlock_lock(&cpu->lock);
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        if (cpu->arch.dcache_message_count ==
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            DCACHE_MSG_QUEUE_LEN) {
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            /*
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             * The queue is full, flush the cache entirely.
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             */
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            cpu->arch.dcache_message_count = 1;
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            cpu->arch.dcache_messages[0].type = DCACHE_INVL_ALL;
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            cpu->arch.dcache_messages[0].color = 0; /* ignored */
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            cpu->arch.dcache_messages[0].frame = 0; /* ignored */
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        } else {
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            index_t idx = cpu->arch.dcache_message_count++;
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            cpu->arch.dcache_messages[idx].type = type;
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            cpu->arch.dcache_messages[idx].color = color;
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            cpu->arch.dcache_messages[idx].frame = frame;
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        }
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        spinlock_unlock(&cpu->lock);
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    }
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    ipi_broadcast(IPI_DCACHE_SHOOTDOWN);   
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busy_wait:
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    for (i = 0; i < config.cpu_count; i++)
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        if (cpus[i].arch.dcache_active)
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            goto busy_wait;
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}
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/** Finish the D-cache shootdown sequence. */
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void dcache_shootdown_finalize(void)
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{
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    spinlock_unlock(&dcachelock);
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    CPU->arch.dcache_active = 1;
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}
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/** Process the D-cache shootdown IPI. */
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void dcache_shootdown_ipi_recv(void)
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{
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    int i;
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    ASSERT(CPU);
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    CPU->arch.dcache_active = 0;
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    spinlock_lock(&dcachelock);
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    spinlock_unlock(&dcachelock);
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    spinlock_lock(&CPU->lock);
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    ASSERT(CPU->arch.dcache_message_count < DCACHE_MSG_QUEUE_LEN);
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    for (i = 0; i < CPU->arch.dcache_message_count; i++) {
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        switch (CPU->arch.dcache_messages[i].type) {
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        case DCACHE_INVL_ALL:
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            dcache_flush();
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            goto flushed;
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            break;
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        case DCACHE_INVL_COLOR:
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            dcache_flush_color(CPU->arch.dcache_messages[i].color);
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            break;
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        case DCACHE_INVL_FRAME:
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            dcache_flush_frame(CPU->arch.dcache_messages[i].color,
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                CPU->arch.dcache_messages[i].frame);
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            break;
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        default:
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            panic("unknown type (%d)\n",
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                CPU->arch.dcache_messages[i].type);
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        }
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    }
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flushed:
- 
 
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    CPU->arch.dcache_message_count = 0;
- 
 
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    spinlock_unlock(&CPU->lock);
- 
 
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- 
 
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    CPU->arch.dcache_active = 1;
- 
 
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}
- 
 
 151 
 
- 
 
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#endif /* CONFIG_VIRT_IDX_DCACHE */
- 
 
 153 
#endif /* CONFIG_SMP */
- 
 
 154 
 
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/** @}
 155 
/** @}
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 */
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 */
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