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    wrpr %g0, PSTATE_PRIV_BIT | PSTATE_AG_BIT, %pstate
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    wrpr %g0, PSTATE_PRIV_BIT | PSTATE_AG_BIT, %pstate
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    PREEMPTIBLE_HANDLER fast_instruction_access_mmu_miss
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    PREEMPTIBLE_HANDLER fast_instruction_access_mmu_miss
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.endm
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.endm
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.macro FAST_DATA_ACCESS_MMU_MISS_HANDLER
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.macro FAST_DATA_ACCESS_MMU_MISS_HANDLER tl
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    /*
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    /*
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     * First, try to refill TLB from TSB.
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     * First, try to refill TLB from TSB.
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     */
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     */
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    ! TODO
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    ! TODO
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     * one of these two traps caused this trap, we just lower the trap
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     * one of these two traps caused this trap, we just lower the trap
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     * level and service the DTLB miss. In the end, we restart
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     * level and service the DTLB miss. In the end, we restart
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     * the offending SAVE or RESTORE.
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     * the offending SAVE or RESTORE.
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     */
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     */
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0:
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0:
-
 
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.if (\tl > 0)
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    HANDLE_MMU_TRAPS_FROM_SPILL_OR_FILL
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    wrpr %g0, 1, %tl
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.endif
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    wrpr %g0, PSTATE_PRIV_BIT | PSTATE_AG_BIT, %pstate
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    wrpr %g0, PSTATE_PRIV_BIT | PSTATE_AG_BIT, %pstate
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    PREEMPTIBLE_HANDLER fast_data_access_mmu_miss
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    PREEMPTIBLE_HANDLER fast_data_access_mmu_miss
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.endm
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.endm
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.macro FAST_DATA_ACCESS_PROTECTION_HANDLER
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.macro FAST_DATA_ACCESS_PROTECTION_HANDLER tl
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    /*
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    /*
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     * First, try to refill TLB from TSB.
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     * First, try to refill TLB from TSB.
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     */
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     */
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    ! TODO
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    ! TODO
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    /*
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    /*
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     * The same special case as in FAST_DATA_ACCESS_MMU_MISS_HANDLER.
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     * The same special case as in FAST_DATA_ACCESS_MMU_MISS_HANDLER.
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     */
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     */
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.if (\tl > 0)
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    HANDLE_MMU_TRAPS_FROM_SPILL_OR_FILL
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    wrpr %g0, 1, %tl
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.endif
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    wrpr %g0, PSTATE_PRIV_BIT | PSTATE_AG_BIT, %pstate
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    wrpr %g0, PSTATE_PRIV_BIT | PSTATE_AG_BIT, %pstate
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    PREEMPTIBLE_HANDLER fast_data_access_protection
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    PREEMPTIBLE_HANDLER fast_data_access_protection
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.endm
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.endm
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.macro MEM_ADDRESS_NOT_ALIGNED_HANDLER
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    ba mem_address_not_aligned_handler
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    nop
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.endm
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/*
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 * Macro used to lower TL when a MMU trap is caused by
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 * the userspace register window spill or fill handler.
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 */
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.macro HANDLE_MMU_TRAPS_FROM_SPILL_OR_FILL
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    rdpr %tl, %g1
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    sub %g1, 1, %g2
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    brz %g2, 0f         ! if TL was 1, skip
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    nop
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    wrpr %g2, 0, %tl        ! TL--
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    rdpr %tt, %g3
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    cmp %g3, TT_SPILL_1_NORMAL
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    be 0f               ! trap from spill_1_normal?
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    cmp %g3, TT_FILL_1_NORMAL
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    bne,a 0f            ! trap from fill_1_normal? (negated condition)
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    wrpr %g1, 0, %tl        ! TL++
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0:
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.endm
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#endif /* __ASM__ */
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#endif /* __ASM__ */
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#endif
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#endif
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/** @}
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/** @}