WebSVN – HelenOS – Diff – /trunk/kernel/arch/ppc64/include/atomic.h


/*
 * Copyright (c) 2005 Martin Decky
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the distribution.
 * - The name of the author may not be used to endorse or promote products
 *   derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */
 
/** @addtogroup ppc64  
 * @{
 */
/** @file
 */
 
#ifndef KERN_ppc64_ATOMIC_H_
#define KERN_ppc64_ATOMIC_H_
 
static inline void atomic_inc(atomic_t *val)
{
    long tmp;
 
    asm volatile (
        "1:\n"
        "lwarx %0, 0, %2\n"
        "addic %0, %0, 1\n"
        "stwcx. %0, 0, %2\n"
        "bne- 1b"
        : "=&r" (tmp), "=m" (val->count)
        : "r" (&val->count), "m" (val->count)
        : "cc"
    );
}
 
static inline void atomic_dec(atomic_t *val)
{
    long tmp;
 
    asm volatile (
        "1:\n"
        "lwarx %0, 0, %2\n"
        "addic %0, %0, -1\n"
        "stwcx. %0, 0, %2\n"
        "bne- 1b"
        : "=&r" (tmp), "=m" (val->count)
        : "r" (&val->count), "m" (val->count)
        : "cc"
    );
}
 
static inline long atomic_postinc(atomic_t *val)
{
    atomic_inc(val);
    return val->count - 1;
}
 
static inline long atomic_postdec(atomic_t *val)
{
    atomic_dec(val);
    return val->count + 1;
}
 
static inline long atomic_preinc(atomic_t *val)
{
    atomic_inc(val);
    return val->count;
}
 
static inline long atomic_predec(atomic_t *val)
{
    atomic_dec(val);
    return val->count;
}
 
#endif
 
/** @}
 */
 

Rev 1888	Rev 2071
1	/*	1	/*
2	* Copyright (C) 2005 Martin Decky	2	* Copyright (c) 2005 Martin Decky
3	* All rights reserved.	3	* All rights reserved.
4	*	4	*
5	* Redistribution and use in source and binary forms, with or without	5	* Redistribution and use in source and binary forms, with or without
6	* modification, are permitted provided that the following conditions	6	* modification, are permitted provided that the following conditions
7	* are met:	7	* are met:
8	*	8	*
9	* - Redistributions of source code must retain the above copyright	9	* - Redistributions of source code must retain the above copyright
10	* notice, this list of conditions and the following disclaimer.	10	* notice, this list of conditions and the following disclaimer.
11	* - Redistributions in binary form must reproduce the above copyright	11	* - Redistributions in binary form must reproduce the above copyright
12	* notice, this list of conditions and the following disclaimer in the	12	* notice, this list of conditions and the following disclaimer in the
13	* documentation and/or other materials provided with the distribution.	13	* documentation and/or other materials provided with the distribution.
14	* - The name of the author may not be used to endorse or promote products	14	* - The name of the author may not be used to endorse or promote products
15	* derived from this software without specific prior written permission.	15	* derived from this software without specific prior written permission.
16	*	16	*
17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR	17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES	18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.	19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,	20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT	21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,	22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY	23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT	24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF	25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.	26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27	*/	27	*/
28		28
29	/** @addtogroup ppc64	29	/** @addtogroup ppc64
30	* @{	30	* @{
31	*/	31	*/
32	/** @file	32	/** @file
33	*/	33	*/
34		34
35	#ifndef KERN_ppc64_ATOMIC_H_	35	#ifndef KERN_ppc64_ATOMIC_H_
36	#define KERN_ppc64_ATOMIC_H_	36	#define KERN_ppc64_ATOMIC_H_
37		37
38	static inline void atomic_inc(atomic_t *val)	38	static inline void atomic_inc(atomic_t *val)
39	{	39	{
40	long tmp;	40	long tmp;
41		41
42	asm volatile (	42	asm volatile (
43	"1:\n"	43	"1:\n"
44	"lwarx %0, 0, %2\n"	44	"lwarx %0, 0, %2\n"
45	"addic %0, %0, 1\n"	45	"addic %0, %0, 1\n"
46	"stwcx. %0, 0, %2\n"	46	"stwcx. %0, 0, %2\n"
47	"bne- 1b"	47	"bne- 1b"
48	: "=&r" (tmp), "=m" (val->count)	48	: "=&r" (tmp), "=m" (val->count)
49	: "r" (&val->count), "m" (val->count)	49	: "r" (&val->count), "m" (val->count)
50	: "cc"	50	: "cc"
51	);	51	);
52	}	52	}
53		53
54	static inline void atomic_dec(atomic_t *val)	54	static inline void atomic_dec(atomic_t *val)
55	{	55	{
56	long tmp;	56	long tmp;
57		57
58	asm volatile (	58	asm volatile (
59	"1:\n"	59	"1:\n"
60	"lwarx %0, 0, %2\n"	60	"lwarx %0, 0, %2\n"
61	"addic %0, %0, -1\n"	61	"addic %0, %0, -1\n"
62	"stwcx. %0, 0, %2\n"	62	"stwcx. %0, 0, %2\n"
63	"bne- 1b"	63	"bne- 1b"
64	: "=&r" (tmp), "=m" (val->count)	64	: "=&r" (tmp), "=m" (val->count)
65	: "r" (&val->count), "m" (val->count)	65	: "r" (&val->count), "m" (val->count)
66	: "cc"	66	: "cc"
67	);	67	);
68	}	68	}
69		69
70	static inline long atomic_postinc(atomic_t *val)	70	static inline long atomic_postinc(atomic_t *val)
71	{	71	{
72	atomic_inc(val);	72	atomic_inc(val);
73	return val->count - 1;	73	return val->count - 1;
74	}	74	}
75		75
76	static inline long atomic_postdec(atomic_t *val)	76	static inline long atomic_postdec(atomic_t *val)
77	{	77	{
78	atomic_dec(val);	78	atomic_dec(val);
79	return val->count + 1;	79	return val->count + 1;
80	}	80	}
81		81
82	static inline long atomic_preinc(atomic_t *val)	82	static inline long atomic_preinc(atomic_t *val)
83	{	83	{
84	atomic_inc(val);	84	atomic_inc(val);
85	return val->count;	85	return val->count;
86	}	86	}
87		87
88	static inline long atomic_predec(atomic_t *val)	88	static inline long atomic_predec(atomic_t *val)
89	{	89	{
90	atomic_dec(val);	90	atomic_dec(val);
91	return val->count;	91	return val->count;
92	}	92	}
93		93
94	#endif	94	#endif
95		95
96	/** @}	96	/** @}
97	*/	97	*/
98		98

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(root)/trunk/kernel/arch/ppc64/include/atomic.h – Rev 1888 → 2071