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1
/*
1
/*
2
 * Copyright (c) 2003-2004 Jakub Jermar
2
 * Copyright (c) 2003-2004 Jakub Jermar
3
 * All rights reserved.
3
 * All rights reserved.
4
 *
4
 *
5
 * Redistribution and use in source and binary forms, with or without
5
 * Redistribution and use in source and binary forms, with or without
6
 * modification, are permitted provided that the following conditions
6
 * modification, are permitted provided that the following conditions
7
 * are met:
7
 * are met:
8
 *
8
 *
9
 * - Redistributions of source code must retain the above copyright
9
 * - Redistributions of source code must retain the above copyright
10
 *   notice, this list of conditions and the following disclaimer.
10
 *   notice, this list of conditions and the following disclaimer.
11
 * - Redistributions in binary form must reproduce the above copyright
11
 * - Redistributions in binary form must reproduce the above copyright
12
 *   notice, this list of conditions and the following disclaimer in the
12
 *   notice, this list of conditions and the following disclaimer in the
13
 *   documentation and/or other materials provided with the distribution.
13
 *   documentation and/or other materials provided with the distribution.
14
 * - The name of the author may not be used to endorse or promote products
14
 * - The name of the author may not be used to endorse or promote products
15
 *   derived from this software without specific prior written permission.
15
 *   derived from this software without specific prior written permission.
16
 *
16
 *
17
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
21
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
22
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
23
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
24
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
25
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27
 */
27
 */
28
 
28
 
29
/** @addtogroup mips32mm   
29
/** @addtogroup mips32mm   
30
 * @{
30
 * @{
31
 */
31
 */
32
/** @file
32
/** @file
33
 */
33
 */
34
 
34
 
35
#include <arch/mm/tlb.h>
35
#include <arch/mm/tlb.h>
36
#include <mm/asid.h>
36
#include <mm/asid.h>
37
#include <mm/tlb.h>
37
#include <mm/tlb.h>
38
#include <mm/page.h>
38
#include <mm/page.h>
39
#include <mm/as.h>
39
#include <mm/as.h>
40
#include <arch/cp0.h>
40
#include <arch/cp0.h>
41
#include <panic.h>
41
#include <panic.h>
42
#include <arch.h>
42
#include <arch.h>
43
#include <symtab.h>
43
#include <symtab.h>
44
#include <synch/spinlock.h>
44
#include <synch/spinlock.h>
45
#include <print.h>
45
#include <print.h>
46
#include <debug.h>
46
#include <debug.h>
47
#include <align.h>
47
#include <align.h>
48
#include <interrupt.h>
48
#include <interrupt.h>
49
 
49
 
50
static void tlb_refill_fail(istate_t *);
50
static void tlb_refill_fail(istate_t *);
51
static void tlb_invalid_fail(istate_t *);
51
static void tlb_invalid_fail(istate_t *);
52
static void tlb_modified_fail(istate_t *);
52
static void tlb_modified_fail(istate_t *);
53
 
53
 
54
static pte_t *find_mapping_and_check(uintptr_t, int, istate_t *, int *);
54
static pte_t *find_mapping_and_check(uintptr_t, int, istate_t *, int *);
55
 
55
 
56
/** Initialize TLB.
56
/** Initialize TLB.
57
 *
57
 *
58
 * Invalidate all entries and mark wired entries.
58
 * Invalidate all entries and mark wired entries.
59
 */
59
 */
60
void tlb_arch_init(void)
60
void tlb_arch_init(void)
61
{
61
{
62
    int i;
62
    int i;
63
 
63
 
64
    cp0_pagemask_write(TLB_PAGE_MASK_16K);
64
    cp0_pagemask_write(TLB_PAGE_MASK_16K);
65
    cp0_entry_hi_write(0);
65
    cp0_entry_hi_write(0);
66
    cp0_entry_lo0_write(0);
66
    cp0_entry_lo0_write(0);
67
    cp0_entry_lo1_write(0);
67
    cp0_entry_lo1_write(0);
68
 
68
 
69
    /* Clear and initialize TLB. */
69
    /* Clear and initialize TLB. */
70
   
70
   
71
    for (i = 0; i < TLB_ENTRY_COUNT; i++) {
71
    for (i = 0; i < TLB_ENTRY_COUNT; i++) {
72
        cp0_index_write(i);
72
        cp0_index_write(i);
73
        tlbwi();
73
        tlbwi();
74
    }
74
    }
75
       
75
       
76
    /*
76
    /*
77
     * The kernel is going to make use of some wired
77
     * The kernel is going to make use of some wired
78
     * entries (e.g. mapping kernel stacks in kseg3).
78
     * entries (e.g. mapping kernel stacks in kseg3).
79
     */
79
     */
80
    cp0_wired_write(TLB_WIRED);
80
    cp0_wired_write(TLB_WIRED);
81
}
81
}
82
 
82
 
83
/** Process TLB Refill Exception.
83
/** Process TLB Refill Exception.
84
 *
84
 *
85
 * @param istate    Interrupted register context.
85
 * @param istate    Interrupted register context.
86
 */
86
 */
87
void tlb_refill(istate_t *istate)
87
void tlb_refill(istate_t *istate)
88
{
88
{
89
    entry_lo_t lo;
89
    entry_lo_t lo;
90
    entry_hi_t hi;
90
    entry_hi_t hi;
91
    asid_t asid;
91
    asid_t asid;
92
    uintptr_t badvaddr;
92
    uintptr_t badvaddr;
93
    pte_t *pte;
93
    pte_t *pte;
94
    int pfrc;
94
    int pfrc;
95
 
95
 
96
    badvaddr = cp0_badvaddr_read();
96
    badvaddr = cp0_badvaddr_read();
97
 
97
 
98
    spinlock_lock(&AS->lock);
98
    spinlock_lock(&AS->lock);
99
    asid = AS->asid;
99
    asid = AS->asid;
100
    spinlock_unlock(&AS->lock);
100
    spinlock_unlock(&AS->lock);
101
 
101
 
102
    page_table_lock(AS, true);
102
    page_table_lock(AS, true);
103
 
103
 
104
    pte = find_mapping_and_check(badvaddr, PF_ACCESS_READ, istate, &pfrc);
104
    pte = find_mapping_and_check(badvaddr, PF_ACCESS_READ, istate, &pfrc);
105
    if (!pte) {
105
    if (!pte) {
106
        switch (pfrc) {
106
        switch (pfrc) {
107
        case AS_PF_FAULT:
107
        case AS_PF_FAULT:
108
            goto fail;
108
            goto fail;
109
            break;
109
            break;
110
        case AS_PF_DEFER:
110
        case AS_PF_DEFER:
111
            /*
111
            /*
112
             * The page fault came during copy_from_uspace()
112
             * The page fault came during copy_from_uspace()
113
             * or copy_to_uspace().
113
             * or copy_to_uspace().
114
             */
114
             */
115
            page_table_unlock(AS, true);
115
            page_table_unlock(AS, true);
116
            return;
116
            return;
117
        default:
117
        default:
118
            panic("unexpected pfrc (%d)\n", pfrc);
118
            panic("Unexpected pfrc (%d).", pfrc);
119
        }
119
        }
120
    }
120
    }
121
 
121
 
122
    /*
122
    /*
123
     * Record access to PTE.
123
     * Record access to PTE.
124
     */
124
     */
125
    pte->a = 1;
125
    pte->a = 1;
126
 
126
 
127
    tlb_prepare_entry_hi(&hi, asid, badvaddr);
127
    tlb_prepare_entry_hi(&hi, asid, badvaddr);
128
    tlb_prepare_entry_lo(&lo, pte->g, pte->p, pte->d, pte->cacheable,
128
    tlb_prepare_entry_lo(&lo, pte->g, pte->p, pte->d, pte->cacheable,
129
        pte->pfn);
129
        pte->pfn);
130
 
130
 
131
    /*
131
    /*
132
     * New entry is to be inserted into TLB
132
     * New entry is to be inserted into TLB
133
     */
133
     */
134
    cp0_entry_hi_write(hi.value);
134
    cp0_entry_hi_write(hi.value);
135
    if ((badvaddr / PAGE_SIZE) % 2 == 0) {
135
    if ((badvaddr / PAGE_SIZE) % 2 == 0) {
136
        cp0_entry_lo0_write(lo.value);
136
        cp0_entry_lo0_write(lo.value);
137
        cp0_entry_lo1_write(0);
137
        cp0_entry_lo1_write(0);
138
    }
138
    }
139
    else {
139
    else {
140
        cp0_entry_lo0_write(0);
140
        cp0_entry_lo0_write(0);
141
        cp0_entry_lo1_write(lo.value);
141
        cp0_entry_lo1_write(lo.value);
142
    }
142
    }
143
    cp0_pagemask_write(TLB_PAGE_MASK_16K);
143
    cp0_pagemask_write(TLB_PAGE_MASK_16K);
144
    tlbwr();
144
    tlbwr();
145
 
145
 
146
    page_table_unlock(AS, true);
146
    page_table_unlock(AS, true);
147
    return;
147
    return;
148
   
148
   
149
fail:
149
fail:
150
    page_table_unlock(AS, true);
150
    page_table_unlock(AS, true);
151
    tlb_refill_fail(istate);
151
    tlb_refill_fail(istate);
152
}
152
}
153
 
153
 
154
/** Process TLB Invalid Exception.
154
/** Process TLB Invalid Exception.
155
 *
155
 *
156
 * @param istate    Interrupted register context.
156
 * @param istate    Interrupted register context.
157
 */
157
 */
158
void tlb_invalid(istate_t *istate)
158
void tlb_invalid(istate_t *istate)
159
{
159
{
160
    tlb_index_t index;
160
    tlb_index_t index;
161
    uintptr_t badvaddr;
161
    uintptr_t badvaddr;
162
    entry_lo_t lo;
162
    entry_lo_t lo;
163
    entry_hi_t hi;
163
    entry_hi_t hi;
164
    pte_t *pte;
164
    pte_t *pte;
165
    int pfrc;
165
    int pfrc;
166
 
166
 
167
    badvaddr = cp0_badvaddr_read();
167
    badvaddr = cp0_badvaddr_read();
168
 
168
 
169
    /*
169
    /*
170
     * Locate the faulting entry in TLB.
170
     * Locate the faulting entry in TLB.
171
     */
171
     */
172
    hi.value = cp0_entry_hi_read();
172
    hi.value = cp0_entry_hi_read();
173
    tlb_prepare_entry_hi(&hi, hi.asid, badvaddr);
173
    tlb_prepare_entry_hi(&hi, hi.asid, badvaddr);
174
    cp0_entry_hi_write(hi.value);
174
    cp0_entry_hi_write(hi.value);
175
    tlbp();
175
    tlbp();
176
    index.value = cp0_index_read();
176
    index.value = cp0_index_read();
177
 
177
 
178
    page_table_lock(AS, true); 
178
    page_table_lock(AS, true); 
179
   
179
   
180
    /*
180
    /*
181
     * Fail if the entry is not in TLB.
181
     * Fail if the entry is not in TLB.
182
     */
182
     */
183
    if (index.p) {
183
    if (index.p) {
184
        printf("TLB entry not found.\n");
184
        printf("TLB entry not found.\n");
185
        goto fail;
185
        goto fail;
186
    }
186
    }
187
 
187
 
188
    pte = find_mapping_and_check(badvaddr, PF_ACCESS_READ, istate, &pfrc);
188
    pte = find_mapping_and_check(badvaddr, PF_ACCESS_READ, istate, &pfrc);
189
    if (!pte) {
189
    if (!pte) {
190
        switch (pfrc) {
190
        switch (pfrc) {
191
        case AS_PF_FAULT:
191
        case AS_PF_FAULT:
192
            goto fail;
192
            goto fail;
193
            break;
193
            break;
194
        case AS_PF_DEFER:
194
        case AS_PF_DEFER:
195
            /*
195
            /*
196
             * The page fault came during copy_from_uspace()
196
             * The page fault came during copy_from_uspace()
197
             * or copy_to_uspace().
197
             * or copy_to_uspace().
198
             */
198
             */
199
            page_table_unlock(AS, true);             
199
            page_table_unlock(AS, true);             
200
            return;
200
            return;
201
        default:
201
        default:
202
            panic("unexpected pfrc (%d)\n", pfrc);
202
            panic("Unexpected pfrc (%d).", pfrc);
203
        }
203
        }
204
    }
204
    }
205
 
205
 
206
    /*
206
    /*
207
     * Read the faulting TLB entry.
207
     * Read the faulting TLB entry.
208
     */
208
     */
209
    tlbr();
209
    tlbr();
210
 
210
 
211
    /*
211
    /*
212
     * Record access to PTE.
212
     * Record access to PTE.
213
     */
213
     */
214
    pte->a = 1;
214
    pte->a = 1;
215
 
215
 
216
    tlb_prepare_entry_lo(&lo, pte->g, pte->p, pte->d, pte->cacheable,
216
    tlb_prepare_entry_lo(&lo, pte->g, pte->p, pte->d, pte->cacheable,
217
        pte->pfn);
217
        pte->pfn);
218
 
218
 
219
    /*
219
    /*
220
     * The entry is to be updated in TLB.
220
     * The entry is to be updated in TLB.
221
     */
221
     */
222
    if ((badvaddr / PAGE_SIZE) % 2 == 0)
222
    if ((badvaddr / PAGE_SIZE) % 2 == 0)
223
        cp0_entry_lo0_write(lo.value);
223
        cp0_entry_lo0_write(lo.value);
224
    else
224
    else
225
        cp0_entry_lo1_write(lo.value);
225
        cp0_entry_lo1_write(lo.value);
226
    cp0_pagemask_write(TLB_PAGE_MASK_16K);
226
    cp0_pagemask_write(TLB_PAGE_MASK_16K);
227
    tlbwi();
227
    tlbwi();
228
 
228
 
229
    page_table_unlock(AS, true);
229
    page_table_unlock(AS, true);
230
    return;
230
    return;
231
   
231
   
232
fail:
232
fail:
233
    page_table_unlock(AS, true);
233
    page_table_unlock(AS, true);
234
    tlb_invalid_fail(istate);
234
    tlb_invalid_fail(istate);
235
}
235
}
236
 
236
 
237
/** Process TLB Modified Exception.
237
/** Process TLB Modified Exception.
238
 *
238
 *
239
 * @param istate    Interrupted register context.
239
 * @param istate    Interrupted register context.
240
 */
240
 */
241
void tlb_modified(istate_t *istate)
241
void tlb_modified(istate_t *istate)
242
{
242
{
243
    tlb_index_t index;
243
    tlb_index_t index;
244
    uintptr_t badvaddr;
244
    uintptr_t badvaddr;
245
    entry_lo_t lo;
245
    entry_lo_t lo;
246
    entry_hi_t hi;
246
    entry_hi_t hi;
247
    pte_t *pte;
247
    pte_t *pte;
248
    int pfrc;
248
    int pfrc;
249
 
249
 
250
    badvaddr = cp0_badvaddr_read();
250
    badvaddr = cp0_badvaddr_read();
251
 
251
 
252
    /*
252
    /*
253
     * Locate the faulting entry in TLB.
253
     * Locate the faulting entry in TLB.
254
     */
254
     */
255
    hi.value = cp0_entry_hi_read();
255
    hi.value = cp0_entry_hi_read();
256
    tlb_prepare_entry_hi(&hi, hi.asid, badvaddr);
256
    tlb_prepare_entry_hi(&hi, hi.asid, badvaddr);
257
    cp0_entry_hi_write(hi.value);
257
    cp0_entry_hi_write(hi.value);
258
    tlbp();
258
    tlbp();
259
    index.value = cp0_index_read();
259
    index.value = cp0_index_read();
260
 
260
 
261
    page_table_lock(AS, true); 
261
    page_table_lock(AS, true); 
262
   
262
   
263
    /*
263
    /*
264
     * Fail if the entry is not in TLB.
264
     * Fail if the entry is not in TLB.
265
     */
265
     */
266
    if (index.p) {
266
    if (index.p) {
267
        printf("TLB entry not found.\n");
267
        printf("TLB entry not found.\n");
268
        goto fail;
268
        goto fail;
269
    }
269
    }
270
 
270
 
271
    pte = find_mapping_and_check(badvaddr, PF_ACCESS_WRITE, istate, &pfrc);
271
    pte = find_mapping_and_check(badvaddr, PF_ACCESS_WRITE, istate, &pfrc);
272
    if (!pte) {
272
    if (!pte) {
273
        switch (pfrc) {
273
        switch (pfrc) {
274
        case AS_PF_FAULT:
274
        case AS_PF_FAULT:
275
            goto fail;
275
            goto fail;
276
            break;
276
            break;
277
        case AS_PF_DEFER:
277
        case AS_PF_DEFER:
278
            /*
278
            /*
279
             * The page fault came during copy_from_uspace()
279
             * The page fault came during copy_from_uspace()
280
             * or copy_to_uspace().
280
             * or copy_to_uspace().
281
             */
281
             */
282
            page_table_unlock(AS, true);             
282
            page_table_unlock(AS, true);             
283
            return;
283
            return;
284
        default:
284
        default:
285
            panic("unexpected pfrc (%d)\n", pfrc);
285
            panic("Unexpected pfrc (%d).", pfrc);
286
        }
286
        }
287
    }
287
    }
288
 
288
 
289
    /*
289
    /*
290
     * Read the faulting TLB entry.
290
     * Read the faulting TLB entry.
291
     */
291
     */
292
    tlbr();
292
    tlbr();
293
 
293
 
294
    /*
294
    /*
295
     * Record access and write to PTE.
295
     * Record access and write to PTE.
296
     */
296
     */
297
    pte->a = 1;
297
    pte->a = 1;
298
    pte->d = 1;
298
    pte->d = 1;
299
 
299
 
300
    tlb_prepare_entry_lo(&lo, pte->g, pte->p, pte->w, pte->cacheable,
300
    tlb_prepare_entry_lo(&lo, pte->g, pte->p, pte->w, pte->cacheable,
301
        pte->pfn);
301
        pte->pfn);
302
 
302
 
303
    /*
303
    /*
304
     * The entry is to be updated in TLB.
304
     * The entry is to be updated in TLB.
305
     */
305
     */
306
    if ((badvaddr / PAGE_SIZE) % 2 == 0)
306
    if ((badvaddr / PAGE_SIZE) % 2 == 0)
307
        cp0_entry_lo0_write(lo.value);
307
        cp0_entry_lo0_write(lo.value);
308
    else
308
    else
309
        cp0_entry_lo1_write(lo.value);
309
        cp0_entry_lo1_write(lo.value);
310
    cp0_pagemask_write(TLB_PAGE_MASK_16K);
310
    cp0_pagemask_write(TLB_PAGE_MASK_16K);
311
    tlbwi();
311
    tlbwi();
312
 
312
 
313
    page_table_unlock(AS, true);
313
    page_table_unlock(AS, true);
314
    return;
314
    return;
315
   
315
   
316
fail:
316
fail:
317
    page_table_unlock(AS, true);
317
    page_table_unlock(AS, true);
318
    tlb_modified_fail(istate);
318
    tlb_modified_fail(istate);
319
}
319
}
320
 
320
 
321
void tlb_refill_fail(istate_t *istate)
321
void tlb_refill_fail(istate_t *istate)
322
{
322
{
323
    char *symbol = "";
323
    char *symbol = "";
324
    char *sym2 = "";
324
    char *sym2 = "";
325
 
325
 
326
    char *s = get_symtab_entry(istate->epc);
326
    char *s = get_symtab_entry(istate->epc);
327
    if (s)
327
    if (s)
328
        symbol = s;
328
        symbol = s;
329
    s = get_symtab_entry(istate->ra);
329
    s = get_symtab_entry(istate->ra);
330
    if (s)
330
    if (s)
331
        sym2 = s;
331
        sym2 = s;
332
 
332
 
333
    fault_if_from_uspace(istate, "TLB Refill Exception on %p",
333
    fault_if_from_uspace(istate, "TLB Refill Exception on %p.",
334
        cp0_badvaddr_read());
334
        cp0_badvaddr_read());
335
    panic("%x: TLB Refill Exception at %x(%s<-%s).\n", cp0_badvaddr_read(),
335
    panic("%x: TLB Refill Exception at %x(%s<-%s).", cp0_badvaddr_read(),
336
        istate->epc, symbol, sym2);
336
        istate->epc, symbol, sym2);
337
}
337
}
338
 
338
 
339
 
339
 
340
void tlb_invalid_fail(istate_t *istate)
340
void tlb_invalid_fail(istate_t *istate)
341
{
341
{
342
    char *symbol = "";
342
    char *symbol = "";
343
 
343
 
344
    char *s = get_symtab_entry(istate->epc);
344
    char *s = get_symtab_entry(istate->epc);
345
    if (s)
345
    if (s)
346
        symbol = s;
346
        symbol = s;
347
    fault_if_from_uspace(istate, "TLB Invalid Exception on %p",
347
    fault_if_from_uspace(istate, "TLB Invalid Exception on %p.",
348
        cp0_badvaddr_read());
348
        cp0_badvaddr_read());
349
    panic("%x: TLB Invalid Exception at %x(%s).\n", cp0_badvaddr_read(),
349
    panic("%x: TLB Invalid Exception at %x(%s).", cp0_badvaddr_read(),
350
        istate->epc, symbol);
350
        istate->epc, symbol);
351
}
351
}
352
 
352
 
353
void tlb_modified_fail(istate_t *istate)
353
void tlb_modified_fail(istate_t *istate)
354
{
354
{
355
    char *symbol = "";
355
    char *symbol = "";
356
 
356
 
357
    char *s = get_symtab_entry(istate->epc);
357
    char *s = get_symtab_entry(istate->epc);
358
    if (s)
358
    if (s)
359
        symbol = s;
359
        symbol = s;
360
    fault_if_from_uspace(istate, "TLB Modified Exception on %p",
360
    fault_if_from_uspace(istate, "TLB Modified Exception on %p.",
361
        cp0_badvaddr_read());
361
        cp0_badvaddr_read());
362
    panic("%x: TLB Modified Exception at %x(%s).\n", cp0_badvaddr_read(),
362
    panic("%x: TLB Modified Exception at %x(%s).", cp0_badvaddr_read(),
363
        istate->epc, symbol);
363
        istate->epc, symbol);
364
}
364
}
365
 
365
 
366
/** Try to find PTE for faulting address.
366
/** Try to find PTE for faulting address.
367
 *
367
 *
368
 * The AS->lock must be held on entry to this function.
368
 * The AS->lock must be held on entry to this function.
369
 *
369
 *
370
 * @param badvaddr  Faulting virtual address.
370
 * @param badvaddr  Faulting virtual address.
371
 * @param access    Access mode that caused the fault.
371
 * @param access    Access mode that caused the fault.
372
 * @param istate    Pointer to interrupted state.
372
 * @param istate    Pointer to interrupted state.
373
 * @param pfrc      Pointer to variable where as_page_fault() return code
373
 * @param pfrc      Pointer to variable where as_page_fault() return code
374
 *          will be stored.
374
 *          will be stored.
375
 *
375
 *
376
 * @return      PTE on success, NULL otherwise.
376
 * @return      PTE on success, NULL otherwise.
377
 */
377
 */
378
pte_t *
378
pte_t *
379
find_mapping_and_check(uintptr_t badvaddr, int access, istate_t *istate,
379
find_mapping_and_check(uintptr_t badvaddr, int access, istate_t *istate,
380
    int *pfrc)
380
    int *pfrc)
381
{
381
{
382
    entry_hi_t hi;
382
    entry_hi_t hi;
383
    pte_t *pte;
383
    pte_t *pte;
384
 
384
 
385
    hi.value = cp0_entry_hi_read();
385
    hi.value = cp0_entry_hi_read();
386
 
386
 
387
    /*
387
    /*
388
     * Handler cannot succeed if the ASIDs don't match.
388
     * Handler cannot succeed if the ASIDs don't match.
389
     */
389
     */
390
    if (hi.asid != AS->asid) {
390
    if (hi.asid != AS->asid) {
391
        printf("EntryHi.asid=%d, AS->asid=%d\n", hi.asid, AS->asid);
391
        printf("EntryHi.asid=%d, AS->asid=%d\n", hi.asid, AS->asid);
392
        return NULL;
392
        return NULL;
393
    }
393
    }
394
 
394
 
395
    /*
395
    /*
396
     * Check if the mapping exists in page tables.
396
     * Check if the mapping exists in page tables.
397
     */
397
     */
398
    pte = page_mapping_find(AS, badvaddr);
398
    pte = page_mapping_find(AS, badvaddr);
399
    if (pte && pte->p && (pte->w || access != PF_ACCESS_WRITE)) {
399
    if (pte && pte->p && (pte->w || access != PF_ACCESS_WRITE)) {
400
        /*
400
        /*
401
         * Mapping found in page tables.
401
         * Mapping found in page tables.
402
         * Immediately succeed.
402
         * Immediately succeed.
403
         */
403
         */
404
        return pte;
404
        return pte;
405
    } else {
405
    } else {
406
        int rc;
406
        int rc;
407
       
407
       
408
        /*
408
        /*
409
         * Mapping not found in page tables.
409
         * Mapping not found in page tables.
410
         * Resort to higher-level page fault handler.
410
         * Resort to higher-level page fault handler.
411
         */
411
         */
412
        page_table_unlock(AS, true);
412
        page_table_unlock(AS, true);
413
        switch (rc = as_page_fault(badvaddr, access, istate)) {
413
        switch (rc = as_page_fault(badvaddr, access, istate)) {
414
        case AS_PF_OK:
414
        case AS_PF_OK:
415
            /*
415
            /*
416
             * The higher-level page fault handler succeeded,
416
             * The higher-level page fault handler succeeded,
417
             * The mapping ought to be in place.
417
             * The mapping ought to be in place.
418
             */
418
             */
419
            page_table_lock(AS, true);
419
            page_table_lock(AS, true);
420
            pte = page_mapping_find(AS, badvaddr);
420
            pte = page_mapping_find(AS, badvaddr);
421
            ASSERT(pte && pte->p);
421
            ASSERT(pte && pte->p);
422
            ASSERT(pte->w || access != PF_ACCESS_WRITE);
422
            ASSERT(pte->w || access != PF_ACCESS_WRITE);
423
            return pte;
423
            return pte;
424
            break;
424
            break;
425
        case AS_PF_DEFER:
425
        case AS_PF_DEFER:
426
            page_table_lock(AS, true);
426
            page_table_lock(AS, true);
427
            *pfrc = AS_PF_DEFER;
427
            *pfrc = AS_PF_DEFER;
428
            return NULL;
428
            return NULL;
429
            break;
429
            break;
430
        case AS_PF_FAULT:
430
        case AS_PF_FAULT:
431
            page_table_lock(AS, true);
431
            page_table_lock(AS, true);
432
            *pfrc = AS_PF_FAULT;
432
            *pfrc = AS_PF_FAULT;
433
            return NULL;
433
            return NULL;
434
            break;
434
            break;
435
        default:
435
        default:
436
            panic("unexpected rc (%d)\n", rc);
436
            panic("Unexpected rc (%d).", rc);
437
        }
437
        }
438
       
438
       
439
    }
439
    }
440
}
440
}
441
 
441
 
442
void
442
void
443
tlb_prepare_entry_lo(entry_lo_t *lo, bool g, bool v, bool d, bool cacheable,
443
tlb_prepare_entry_lo(entry_lo_t *lo, bool g, bool v, bool d, bool cacheable,
444
    uintptr_t pfn)
444
    uintptr_t pfn)
445
{
445
{
446
    lo->value = 0;
446
    lo->value = 0;
447
    lo->g = g;
447
    lo->g = g;
448
    lo->v = v;
448
    lo->v = v;
449
    lo->d = d;
449
    lo->d = d;
450
    lo->c = cacheable ? PAGE_CACHEABLE_EXC_WRITE : PAGE_UNCACHED;
450
    lo->c = cacheable ? PAGE_CACHEABLE_EXC_WRITE : PAGE_UNCACHED;
451
    lo->pfn = pfn;
451
    lo->pfn = pfn;
452
}
452
}
453
 
453
 
454
void tlb_prepare_entry_hi(entry_hi_t *hi, asid_t asid, uintptr_t addr)
454
void tlb_prepare_entry_hi(entry_hi_t *hi, asid_t asid, uintptr_t addr)
455
{
455
{
456
    hi->value = ALIGN_DOWN(addr, PAGE_SIZE * 2);
456
    hi->value = ALIGN_DOWN(addr, PAGE_SIZE * 2);
457
    hi->asid = asid;
457
    hi->asid = asid;
458
}
458
}
459
 
459
 
460
/** Print contents of TLB. */
460
/** Print contents of TLB. */
461
void tlb_print(void)
461
void tlb_print(void)
462
{
462
{
463
    page_mask_t mask;
463
    page_mask_t mask;
464
    entry_lo_t lo0, lo1;
464
    entry_lo_t lo0, lo1;
465
    entry_hi_t hi, hi_save;
465
    entry_hi_t hi, hi_save;
466
    unsigned int i;
466
    unsigned int i;
467
 
467
 
468
    hi_save.value = cp0_entry_hi_read();
468
    hi_save.value = cp0_entry_hi_read();
469
   
469
   
470
    printf("#  ASID VPN2   MASK G V D C PFN\n");
470
    printf("#  ASID VPN2   MASK G V D C PFN\n");
471
    printf("-- ---- ------ ---- - - - - ------\n");
471
    printf("-- ---- ------ ---- - - - - ------\n");
472
   
472
   
473
    for (i = 0; i < TLB_ENTRY_COUNT; i++) {
473
    for (i = 0; i < TLB_ENTRY_COUNT; i++) {
474
        cp0_index_write(i);
474
        cp0_index_write(i);
475
        tlbr();
475
        tlbr();
476
       
476
       
477
        mask.value = cp0_pagemask_read();
477
        mask.value = cp0_pagemask_read();
478
        hi.value = cp0_entry_hi_read();
478
        hi.value = cp0_entry_hi_read();
479
        lo0.value = cp0_entry_lo0_read();
479
        lo0.value = cp0_entry_lo0_read();
480
        lo1.value = cp0_entry_lo1_read();
480
        lo1.value = cp0_entry_lo1_read();
481
       
481
       
482
        printf("%-2u %-4u %#6x %#4x %1u %1u %1u %1u %#6x\n",
482
        printf("%-2u %-4u %#6x %#4x %1u %1u %1u %1u %#6x\n",
483
            i, hi.asid, hi.vpn2, mask.mask,
483
            i, hi.asid, hi.vpn2, mask.mask,
484
            lo0.g, lo0.v, lo0.d, lo0.c, lo0.pfn);
484
            lo0.g, lo0.v, lo0.d, lo0.c, lo0.pfn);
485
        printf("                    %1u %1u %1u %1u %#6x\n",
485
        printf("                    %1u %1u %1u %1u %#6x\n",
486
            lo1.g, lo1.v, lo1.d, lo1.c, lo1.pfn);
486
            lo1.g, lo1.v, lo1.d, lo1.c, lo1.pfn);
487
    }
487
    }
488
   
488
   
489
    cp0_entry_hi_write(hi_save.value);
489
    cp0_entry_hi_write(hi_save.value);
490
}
490
}
491
 
491
 
492
/** Invalidate all not wired TLB entries. */
492
/** Invalidate all not wired TLB entries. */
493
void tlb_invalidate_all(void)
493
void tlb_invalidate_all(void)
494
{
494
{
495
    ipl_t ipl;
495
    ipl_t ipl;
496
    entry_lo_t lo0, lo1;
496
    entry_lo_t lo0, lo1;
497
    entry_hi_t hi_save;
497
    entry_hi_t hi_save;
498
    int i;
498
    int i;
499
 
499
 
500
    hi_save.value = cp0_entry_hi_read();
500
    hi_save.value = cp0_entry_hi_read();
501
    ipl = interrupts_disable();
501
    ipl = interrupts_disable();
502
 
502
 
503
    for (i = TLB_WIRED; i < TLB_ENTRY_COUNT; i++) {
503
    for (i = TLB_WIRED; i < TLB_ENTRY_COUNT; i++) {
504
        cp0_index_write(i);
504
        cp0_index_write(i);
505
        tlbr();
505
        tlbr();
506
 
506
 
507
        lo0.value = cp0_entry_lo0_read();
507
        lo0.value = cp0_entry_lo0_read();
508
        lo1.value = cp0_entry_lo1_read();
508
        lo1.value = cp0_entry_lo1_read();
509
 
509
 
510
        lo0.v = 0;
510
        lo0.v = 0;
511
        lo1.v = 0;
511
        lo1.v = 0;
512
 
512
 
513
        cp0_entry_lo0_write(lo0.value);
513
        cp0_entry_lo0_write(lo0.value);
514
        cp0_entry_lo1_write(lo1.value);
514
        cp0_entry_lo1_write(lo1.value);
515
               
515
               
516
        tlbwi();
516
        tlbwi();
517
    }
517
    }
518
   
518
   
519
    interrupts_restore(ipl);
519
    interrupts_restore(ipl);
520
    cp0_entry_hi_write(hi_save.value);
520
    cp0_entry_hi_write(hi_save.value);
521
}
521
}
522
 
522
 
523
/** Invalidate all TLB entries belonging to specified address space.
523
/** Invalidate all TLB entries belonging to specified address space.
524
 *
524
 *
525
 * @param asid Address space identifier.
525
 * @param asid Address space identifier.
526
 */
526
 */
527
void tlb_invalidate_asid(asid_t asid)
527
void tlb_invalidate_asid(asid_t asid)
528
{
528
{
529
    ipl_t ipl;
529
    ipl_t ipl;
530
    entry_lo_t lo0, lo1;
530
    entry_lo_t lo0, lo1;
531
    entry_hi_t hi, hi_save;
531
    entry_hi_t hi, hi_save;
532
    int i;
532
    int i;
533
 
533
 
534
    ASSERT(asid != ASID_INVALID);
534
    ASSERT(asid != ASID_INVALID);
535
 
535
 
536
    hi_save.value = cp0_entry_hi_read();
536
    hi_save.value = cp0_entry_hi_read();
537
    ipl = interrupts_disable();
537
    ipl = interrupts_disable();
538
   
538
   
539
    for (i = 0; i < TLB_ENTRY_COUNT; i++) {
539
    for (i = 0; i < TLB_ENTRY_COUNT; i++) {
540
        cp0_index_write(i);
540
        cp0_index_write(i);
541
        tlbr();
541
        tlbr();
542
       
542
       
543
        hi.value = cp0_entry_hi_read();
543
        hi.value = cp0_entry_hi_read();
544
       
544
       
545
        if (hi.asid == asid) {
545
        if (hi.asid == asid) {
546
            lo0.value = cp0_entry_lo0_read();
546
            lo0.value = cp0_entry_lo0_read();
547
            lo1.value = cp0_entry_lo1_read();
547
            lo1.value = cp0_entry_lo1_read();
548
 
548
 
549
            lo0.v = 0;
549
            lo0.v = 0;
550
            lo1.v = 0;
550
            lo1.v = 0;
551
 
551
 
552
            cp0_entry_lo0_write(lo0.value);
552
            cp0_entry_lo0_write(lo0.value);
553
            cp0_entry_lo1_write(lo1.value);
553
            cp0_entry_lo1_write(lo1.value);
554
 
554
 
555
            tlbwi();
555
            tlbwi();
556
        }
556
        }
557
    }
557
    }
558
   
558
   
559
    interrupts_restore(ipl);
559
    interrupts_restore(ipl);
560
    cp0_entry_hi_write(hi_save.value);
560
    cp0_entry_hi_write(hi_save.value);
561
}
561
}
562
 
562
 
563
/** Invalidate TLB entries for specified page range belonging to specified
563
/** Invalidate TLB entries for specified page range belonging to specified
564
 * address space.
564
 * address space.
565
 *
565
 *
566
 * @param asid      Address space identifier.
566
 * @param asid      Address space identifier.
567
 * @param page      First page whose TLB entry is to be invalidated.
567
 * @param page      First page whose TLB entry is to be invalidated.
568
 * @param cnt       Number of entries to invalidate.
568
 * @param cnt       Number of entries to invalidate.
569
 */
569
 */
570
void tlb_invalidate_pages(asid_t asid, uintptr_t page, count_t cnt)
570
void tlb_invalidate_pages(asid_t asid, uintptr_t page, count_t cnt)
571
{
571
{
572
    unsigned int i;
572
    unsigned int i;
573
    ipl_t ipl;
573
    ipl_t ipl;
574
    entry_lo_t lo0, lo1;
574
    entry_lo_t lo0, lo1;
575
    entry_hi_t hi, hi_save;
575
    entry_hi_t hi, hi_save;
576
    tlb_index_t index;
576
    tlb_index_t index;
577
 
577
 
578
    ASSERT(asid != ASID_INVALID);
578
    ASSERT(asid != ASID_INVALID);
579
 
579
 
580
    hi_save.value = cp0_entry_hi_read();
580
    hi_save.value = cp0_entry_hi_read();
581
    ipl = interrupts_disable();
581
    ipl = interrupts_disable();
582
 
582
 
583
    for (i = 0; i < cnt + 1; i += 2) {
583
    for (i = 0; i < cnt + 1; i += 2) {
584
        hi.value = 0;
584
        hi.value = 0;
585
        tlb_prepare_entry_hi(&hi, asid, page + i * PAGE_SIZE);
585
        tlb_prepare_entry_hi(&hi, asid, page + i * PAGE_SIZE);
586
        cp0_entry_hi_write(hi.value);
586
        cp0_entry_hi_write(hi.value);
587
 
587
 
588
        tlbp();
588
        tlbp();
589
        index.value = cp0_index_read();
589
        index.value = cp0_index_read();
590
 
590
 
591
        if (!index.p) {
591
        if (!index.p) {
592
            /*
592
            /*
593
             * Entry was found, index register contains valid
593
             * Entry was found, index register contains valid
594
             * index.
594
             * index.
595
             */
595
             */
596
            tlbr();
596
            tlbr();
597
 
597
 
598
            lo0.value = cp0_entry_lo0_read();
598
            lo0.value = cp0_entry_lo0_read();
599
            lo1.value = cp0_entry_lo1_read();
599
            lo1.value = cp0_entry_lo1_read();
600
 
600
 
601
            lo0.v = 0;
601
            lo0.v = 0;
602
            lo1.v = 0;
602
            lo1.v = 0;
603
 
603
 
604
            cp0_entry_lo0_write(lo0.value);
604
            cp0_entry_lo0_write(lo0.value);
605
            cp0_entry_lo1_write(lo1.value);
605
            cp0_entry_lo1_write(lo1.value);
606
 
606
 
607
            tlbwi();
607
            tlbwi();
608
        }
608
        }
609
    }
609
    }
610
   
610
   
611
    interrupts_restore(ipl);
611
    interrupts_restore(ipl);
612
    cp0_entry_hi_write(hi_save.value);
612
    cp0_entry_hi_write(hi_save.value);
613
}
613
}
614
 
614
 
615
/** @}
615
/** @}
616
 */
616
 */
617
 
617