WebSVN – HelenOS – Diff – /trunk/kernel/arch/mips32/src/mm/frame.c


/*
 * Copyright (c) 2005 Jakub Jermar
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the distribution.
 * - The name of the author may not be used to endorse or promote products
 *   derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */
 
/** @addtogroup mips32mm   
 * @{
 */
/** @file
 */
 
#include <macros.h>
#include <arch/mm/frame.h>
#include <arch/mm/tlb.h>
#include <interrupt.h>
#include <mm/frame.h>
#include <mm/asid.h>
#include <config.h>
#include <arch/drivers/msim.h>
#include <arch/drivers/serial.h>
#include <print.h>
 
#define ZERO_PAGE_MASK      TLB_PAGE_MASK_256K
#define ZERO_FRAMES         2048
#define ZERO_PAGE_WIDTH     18  /* 256K */
#define ZERO_PAGE_SIZE      (1 << ZERO_PAGE_WIDTH)
#define ZERO_PAGE_ASID      ASID_INVALID
#define ZERO_PAGE_TLBI      0
#define ZERO_PAGE_ADDR      0
#define ZERO_PAGE_OFFSET    (ZERO_PAGE_SIZE / sizeof(uint32_t) - 1)
#define ZERO_PAGE_VALUE     (((volatile uint32_t *) ZERO_PAGE_ADDR)[ZERO_PAGE_OFFSET])
 
#define ZERO_PAGE_VALUE_KSEG1(frame) (((volatile uint32_t *) (0xa0000000 + (frame << ZERO_PAGE_WIDTH)))[ZERO_PAGE_OFFSET])
 
#define MAX_REGIONS         32
 
typedef struct {
    pfn_t start;
    pfn_t count;
} phys_region_t;
 
static count_t phys_regions_count = 0;
static phys_region_t phys_regions[MAX_REGIONS];
 
 
/** Check whether frame is available
 *
 * Returns true if given frame is generally available for use.
 * Returns false if given frame is used for physical memory
 * mapped devices and cannot be used.
 *
 */
static bool frame_available(pfn_t frame)
{
#ifdef msim
    /* MSIM device (dprinter) */
    if (frame == (KA2PA(MSIM_VIDEORAM) >> ZERO_PAGE_WIDTH))
        return false;
   
    /* MSIM device (dkeyboard) */
    if (frame == (KA2PA(MSIM_KBD_ADDRESS) >> ZERO_PAGE_WIDTH))
        return false;
#endif
 
#ifdef simics
    /* Simics device (serial line) */
    if (frame == (KA2PA(SERIAL_ADDRESS) >> ZERO_PAGE_WIDTH))
        return false;
#endif
 
#if defined(lgxemul) || defined(bgxemul)
    /* gxemul devices */
    if (overlaps(frame << ZERO_PAGE_WIDTH, ZERO_PAGE_SIZE,
        0x10000000, MB2SIZE(256)))
        return false;
#endif
   
    return true;
}
 
 
/** Check whether frame is safe to write
 *
 * Returns true if given frame is safe for read/write test.
 * Returns false if given frame should not be touched.
 *
 */
static bool frame_safe(pfn_t frame)
{
    /* Kernel structures */
    if ((frame << ZERO_PAGE_WIDTH) < KA2PA(config.base))
        return false;
   
    /* Kernel */
    if (overlaps(frame << ZERO_PAGE_WIDTH, ZERO_PAGE_SIZE,
        KA2PA(config.base), config.kernel_size))
        return false;
   
    /* Kernel stack */
    if (overlaps(frame << ZERO_PAGE_WIDTH, ZERO_PAGE_SIZE,
        KA2PA(config.stack_base), config.stack_size))
        return false;
   
    /* Init tasks */
    bool safe = true;
    count_t i;
    for (i = 0; i < init.cnt; i++)
        if (overlaps(frame << ZERO_PAGE_WIDTH, ZERO_PAGE_SIZE,
            KA2PA(init.tasks[i].addr), init.tasks[i].size)) {
            safe = false;
            break;
        }
   
    return safe;
}
 
static void frame_add_region(pfn_t start_frame, pfn_t end_frame)
{
    if (end_frame > start_frame) {
        /* Convert 1M frames to 16K frames */
        pfn_t first = ADDR2PFN(start_frame << ZERO_PAGE_WIDTH);
        pfn_t count = ADDR2PFN((end_frame - start_frame) << ZERO_PAGE_WIDTH);
       
        /* Interrupt vector frame is blacklisted */
        pfn_t conf_frame;
        if (first == 0)
            conf_frame = 1;
        else
            conf_frame = first;
       
        zone_create(first, count, conf_frame, 0);
       
        if (phys_regions_count < MAX_REGIONS) {
            phys_regions[phys_regions_count].start = first;
            phys_regions[phys_regions_count].count = count;
            phys_regions_count++;
        }
    }
}
 
 
/** Create memory zones
 *
 * Walk through available 256 KB chunks of physical
 * memory and create zones.
 *
 * Note: It is assumed that the TLB is not yet being
 * used in any way, thus there is no interference.
 *
 */
void frame_arch_init(void)
{
    ipl_t ipl = interrupts_disable();
   
    /* Clear and initialize TLB */
    cp0_pagemask_write(ZERO_PAGE_MASK);
    cp0_entry_lo0_write(0);
    cp0_entry_lo1_write(0);
    cp0_entry_hi_write(0);
 
    count_t i;
    for (i = 0; i < TLB_ENTRY_COUNT; i++) {
        cp0_index_write(i);
        tlbwi();
    }
       
    pfn_t start_frame = 0;
    pfn_t frame;
    bool avail = true;
   
    /* Walk through all 1 MB frames */
    for (frame = 0; frame < ZERO_FRAMES; frame++) {
        if (!frame_available(frame))
            avail = false;
        else {
            if (frame_safe(frame)) {
                entry_lo_t lo0;
                entry_lo_t lo1;
                entry_hi_t hi;
                tlb_prepare_entry_lo(&lo0, false, true, true, false, frame << (ZERO_PAGE_WIDTH - 12));
                tlb_prepare_entry_lo(&lo1, false, false, false, false, 0);
                tlb_prepare_entry_hi(&hi, ZERO_PAGE_ASID, ZERO_PAGE_ADDR);
               
                cp0_pagemask_write(ZERO_PAGE_MASK);
                cp0_entry_lo0_write(lo0.value);
                cp0_entry_lo1_write(lo1.value);
                cp0_entry_hi_write(hi.value);
                cp0_index_write(ZERO_PAGE_TLBI);
                tlbwi();
               
                ZERO_PAGE_VALUE = 0;
                if (ZERO_PAGE_VALUE != 0)
                    avail = false;
                else {
                    ZERO_PAGE_VALUE = 0xdeadbeef;
                    if (ZERO_PAGE_VALUE != 0xdeadbeef)
                        avail = false;
#if defined(lgxemul) || defined(bgxemul)
                    else {
                        ZERO_PAGE_VALUE_KSEG1(frame) = 0xaabbccdd;
                        if (ZERO_PAGE_VALUE_KSEG1(frame) != 0xaabbccdd)
                            avail = false;
                    }
#endif
                }
            }
        }
       
        if (!avail) {
            frame_add_region(start_frame, frame);
            start_frame = frame + 1;
            avail = true;
        }
    }
   
    frame_add_region(start_frame, frame);
   
    /* Blacklist interrupt vector frame */
    frame_mark_unavailable(0, 1);
   
    /* Cleanup */
    cp0_pagemask_write(ZERO_PAGE_MASK);
    cp0_entry_lo0_write(0);
    cp0_entry_lo1_write(0);
    cp0_entry_hi_write(0);
    cp0_index_write(ZERO_PAGE_TLBI);
    tlbwi();
   
    interrupts_restore(ipl);
}
 
 
void physmem_print(void)
{
    printf("Base       Size\n");
    printf("---------- ----------\n");
   
    count_t i;
    for (i = 0; i < phys_regions_count; i++) {
        printf("%#010x %10u\n",
            PFN2ADDR(phys_regions[i].start), PFN2ADDR(phys_regions[i].count));
    }  
}
 
/** @}
 */
 

Rev 3236	Rev 3880
1	/*	1	/*
2	* Copyright (c) 2005 Jakub Jermar	2	* Copyright (c) 2005 Jakub Jermar
3	* All rights reserved.	3	* All rights reserved.
4	*	4	*
5	* Redistribution and use in source and binary forms, with or without	5	* Redistribution and use in source and binary forms, with or without
6	* modification, are permitted provided that the following conditions	6	* modification, are permitted provided that the following conditions
7	* are met:	7	* are met:
8	*	8	*
9	* - Redistributions of source code must retain the above copyright	9	* - Redistributions of source code must retain the above copyright
10	* notice, this list of conditions and the following disclaimer.	10	* notice, this list of conditions and the following disclaimer.
11	* - Redistributions in binary form must reproduce the above copyright	11	* - Redistributions in binary form must reproduce the above copyright
12	* notice, this list of conditions and the following disclaimer in the	12	* notice, this list of conditions and the following disclaimer in the
13	* documentation and/or other materials provided with the distribution.	13	* documentation and/or other materials provided with the distribution.
14	* - The name of the author may not be used to endorse or promote products	14	* - The name of the author may not be used to endorse or promote products
15	* derived from this software without specific prior written permission.	15	* derived from this software without specific prior written permission.
16	*	16	*
17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR	17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES	18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.	19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,	20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT	21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,	22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY	23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT	24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF	25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.	26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27	*/	27	*/
28		28
29	/** @addtogroup mips32mm	29	/** @addtogroup mips32mm
30	* @{	30	* @{
31	*/	31	*/
32	/** @file	32	/** @file
33	*/	33	*/
34		34
35	#include <macros.h>	35	#include <macros.h>
36	#include <arch/mm/frame.h>	36	#include <arch/mm/frame.h>
37	#include <arch/mm/tlb.h>	37	#include <arch/mm/tlb.h>
38	#include <interrupt.h>	38	#include <interrupt.h>
39	#include <mm/frame.h>	39	#include <mm/frame.h>
40	#include <mm/asid.h>	40	#include <mm/asid.h>
41	#include <config.h>	41	#include <config.h>
42	#include <arch/drivers/msim.h>	42	#include <arch/drivers/msim.h>
43	#include <arch/drivers/serial.h>	43	#include <arch/drivers/serial.h>
44	#include <print.h>	44	#include <print.h>
45		45
46	#define ZERO_PAGE_MASK TLB_PAGE_MASK_256K	46	#define ZERO_PAGE_MASK TLB_PAGE_MASK_256K
47	#define ZERO_FRAMES 2048	47	#define ZERO_FRAMES 2048
48	#define ZERO_PAGE_WIDTH 18 /* 256K */	48	#define ZERO_PAGE_WIDTH 18 /* 256K */
49	#define ZERO_PAGE_SIZE (1 << ZERO_PAGE_WIDTH)	49	#define ZERO_PAGE_SIZE (1 << ZERO_PAGE_WIDTH)
50	#define ZERO_PAGE_ASID ASID_INVALID	50	#define ZERO_PAGE_ASID ASID_INVALID
51	#define ZERO_PAGE_TLBI 0	51	#define ZERO_PAGE_TLBI 0
52	#define ZERO_PAGE_ADDR 0	52	#define ZERO_PAGE_ADDR 0
53	#define ZERO_PAGE_OFFSET (ZERO_PAGE_SIZE / sizeof(uint32_t) - 1)	53	#define ZERO_PAGE_OFFSET (ZERO_PAGE_SIZE / sizeof(uint32_t) - 1)
54	#define ZERO_PAGE_VALUE (((volatile uint32_t *) ZERO_PAGE_ADDR)[ZERO_PAGE_OFFSET])	54	#define ZERO_PAGE_VALUE (((volatile uint32_t *) ZERO_PAGE_ADDR)[ZERO_PAGE_OFFSET])
55		55
56	#define ZERO_PAGE_VALUE_KSEG1(frame) (((volatile uint32_t *) (0xa0000000 + (frame << ZERO_PAGE_WIDTH)))[ZERO_PAGE_OFFSET])	56	#define ZERO_PAGE_VALUE_KSEG1(frame) (((volatile uint32_t *) (0xa0000000 + (frame << ZERO_PAGE_WIDTH)))[ZERO_PAGE_OFFSET])
57		57
58	#define MAX_REGIONS 32	58	#define MAX_REGIONS 32
59		59
60	typedef struct {	60	typedef struct {
61	pfn_t start;	61	pfn_t start;
62	pfn_t count;	62	pfn_t count;
63	} phys_region_t;	63	} phys_region_t;
64		64
65	static count_t phys_regions_count = 0;	65	static count_t phys_regions_count = 0;
66	static phys_region_t phys_regions[MAX_REGIONS];	66	static phys_region_t phys_regions[MAX_REGIONS];
67		67
68		68
69	/** Check whether frame is available	69	/** Check whether frame is available
70	*	70	*
71	* Returns true if given frame is generally available for use.	71	* Returns true if given frame is generally available for use.
72	* Returns false if given frame is used for physical memory	72	* Returns false if given frame is used for physical memory
73	* mapped devices and cannot be used.	73	* mapped devices and cannot be used.
74	*	74	*
75	*/	75	*/
76	static bool frame_available(pfn_t frame)	76	static bool frame_available(pfn_t frame)
77	{	77	{
78	#if MACHINE == msim	78	#ifdef msim
79	/* MSIM device (dprinter) */	79	/* MSIM device (dprinter) */
80	if (frame == (KA2PA(MSIM_VIDEORAM) >> ZERO_PAGE_WIDTH))	80	if (frame == (KA2PA(MSIM_VIDEORAM) >> ZERO_PAGE_WIDTH))
81	return false;	81	return false;
82		82
83	/* MSIM device (dkeyboard) */	83	/* MSIM device (dkeyboard) */
84	if (frame == (KA2PA(MSIM_KBD_ADDRESS) >> ZERO_PAGE_WIDTH))	84	if (frame == (KA2PA(MSIM_KBD_ADDRESS) >> ZERO_PAGE_WIDTH))
85	return false;	85	return false;
86	#endif	86	#endif
87		87
88	#if MACHINE == simics	88	#ifdef simics
89	/* Simics device (serial line) */	89	/* Simics device (serial line) */
90	if (frame == (KA2PA(SERIAL_ADDRESS) >> ZERO_PAGE_WIDTH))	90	if (frame == (KA2PA(SERIAL_ADDRESS) >> ZERO_PAGE_WIDTH))
91	return false;	91	return false;
92	#endif	92	#endif
93		93
94	#if (MACHINE == lgxemul) \|\| (MACHINE == bgxemul)	94	#if defined(lgxemul) \|\| defined(bgxemul)
95	/* gxemul devices */	95	/* gxemul devices */
96	if (overlaps(frame << ZERO_PAGE_WIDTH, ZERO_PAGE_SIZE,	96	if (overlaps(frame << ZERO_PAGE_WIDTH, ZERO_PAGE_SIZE,
97	0x10000000, MB2SIZE(256)))	97	0x10000000, MB2SIZE(256)))
98	return false;	98	return false;
99	#endif	99	#endif
100		100
101	return true;	101	return true;
102	}	102	}
103		103
104		104
105	/** Check whether frame is safe to write	105	/** Check whether frame is safe to write
106	*	106	*
107	* Returns true if given frame is safe for read/write test.	107	* Returns true if given frame is safe for read/write test.
108	* Returns false if given frame should not be touched.	108	* Returns false if given frame should not be touched.
109	*	109	*
110	*/	110	*/
111	static bool frame_safe(pfn_t frame)	111	static bool frame_safe(pfn_t frame)
112	{	112	{
113	/* Kernel structures */	113	/* Kernel structures */
114	if ((frame << ZERO_PAGE_WIDTH) < KA2PA(config.base))	114	if ((frame << ZERO_PAGE_WIDTH) < KA2PA(config.base))
115	return false;	115	return false;
116		116
117	/* Kernel */	117	/* Kernel */
118	if (overlaps(frame << ZERO_PAGE_WIDTH, ZERO_PAGE_SIZE,	118	if (overlaps(frame << ZERO_PAGE_WIDTH, ZERO_PAGE_SIZE,
119	KA2PA(config.base), config.kernel_size))	119	KA2PA(config.base), config.kernel_size))
120	return false;	120	return false;
121		121
122	/* Kernel stack */	122	/* Kernel stack */
123	if (overlaps(frame << ZERO_PAGE_WIDTH, ZERO_PAGE_SIZE,	123	if (overlaps(frame << ZERO_PAGE_WIDTH, ZERO_PAGE_SIZE,
124	KA2PA(config.stack_base), config.stack_size))	124	KA2PA(config.stack_base), config.stack_size))
125	return false;	125	return false;
126		126
127	/* Init tasks */	127	/* Init tasks */
128	bool safe = true;	128	bool safe = true;
129	count_t i;	129	count_t i;
130	for (i = 0; i < init.cnt; i++)	130	for (i = 0; i < init.cnt; i++)
131	if (overlaps(frame << ZERO_PAGE_WIDTH, ZERO_PAGE_SIZE,	131	if (overlaps(frame << ZERO_PAGE_WIDTH, ZERO_PAGE_SIZE,
132	KA2PA(init.tasks[i].addr), init.tasks[i].size)) {	132	KA2PA(init.tasks[i].addr), init.tasks[i].size)) {
133	safe = false;	133	safe = false;
134	break;	134	break;
135	}	135	}
136		136
137	return safe;	137	return safe;
138	}	138	}
139		139
140	static void frame_add_region(pfn_t start_frame, pfn_t end_frame)	140	static void frame_add_region(pfn_t start_frame, pfn_t end_frame)
141	{	141	{
142	if (end_frame > start_frame) {	142	if (end_frame > start_frame) {
143	/* Convert 1M frames to 16K frames */	143	/* Convert 1M frames to 16K frames */
144	pfn_t first = ADDR2PFN(start_frame << ZERO_PAGE_WIDTH);	144	pfn_t first = ADDR2PFN(start_frame << ZERO_PAGE_WIDTH);
145	pfn_t count = ADDR2PFN((end_frame - start_frame) << ZERO_PAGE_WIDTH);	145	pfn_t count = ADDR2PFN((end_frame - start_frame) << ZERO_PAGE_WIDTH);
146		146
147	/* Interrupt vector frame is blacklisted */	147	/* Interrupt vector frame is blacklisted */
148	pfn_t conf_frame;	148	pfn_t conf_frame;
149	if (first == 0)	149	if (first == 0)
150	conf_frame = 1;	150	conf_frame = 1;
151	else	151	else
152	conf_frame = first;	152	conf_frame = first;
153		153
154	zone_create(first, count, conf_frame, 0);	154	zone_create(first, count, conf_frame, 0);
155		155
156	if (phys_regions_count < MAX_REGIONS) {	156	if (phys_regions_count < MAX_REGIONS) {
157	phys_regions[phys_regions_count].start = first;	157	phys_regions[phys_regions_count].start = first;
158	phys_regions[phys_regions_count].count = count;	158	phys_regions[phys_regions_count].count = count;
159	phys_regions_count++;	159	phys_regions_count++;
160	}	160	}
161	}	161	}
162	}	162	}
163		163
164		164
165	/** Create memory zones	165	/** Create memory zones
166	*	166	*
167	* Walk through available 256 KB chunks of physical	167	* Walk through available 256 KB chunks of physical
168	* memory and create zones.	168	* memory and create zones.
169	*	169	*
170	* Note: It is assumed that the TLB is not yet being	170	* Note: It is assumed that the TLB is not yet being
171	* used in any way, thus there is no interference.	171	* used in any way, thus there is no interference.
172	*	172	*
173	*/	173	*/
174	void frame_arch_init(void)	174	void frame_arch_init(void)
175	{	175	{
176	ipl_t ipl = interrupts_disable();	176	ipl_t ipl = interrupts_disable();
177		177
178	/* Clear and initialize TLB */	178	/* Clear and initialize TLB */
179	cp0_pagemask_write(ZERO_PAGE_MASK);	179	cp0_pagemask_write(ZERO_PAGE_MASK);
180	cp0_entry_lo0_write(0);	180	cp0_entry_lo0_write(0);
181	cp0_entry_lo1_write(0);	181	cp0_entry_lo1_write(0);
182	cp0_entry_hi_write(0);	182	cp0_entry_hi_write(0);
183		183
184	count_t i;	184	count_t i;
185	for (i = 0; i < TLB_ENTRY_COUNT; i++) {	185	for (i = 0; i < TLB_ENTRY_COUNT; i++) {
186	cp0_index_write(i);	186	cp0_index_write(i);
187	tlbwi();	187	tlbwi();
188	}	188	}
189		189
190	pfn_t start_frame = 0;	190	pfn_t start_frame = 0;
191	pfn_t frame;	191	pfn_t frame;
192	bool avail = true;	192	bool avail = true;
193		193
194	/* Walk through all 1 MB frames */	194	/* Walk through all 1 MB frames */
195	for (frame = 0; frame < ZERO_FRAMES; frame++) {	195	for (frame = 0; frame < ZERO_FRAMES; frame++) {
196	if (!frame_available(frame))	196	if (!frame_available(frame))
197	avail = false;	197	avail = false;
198	else {	198	else {
199	if (frame_safe(frame)) {	199	if (frame_safe(frame)) {
200	entry_lo_t lo0;	200	entry_lo_t lo0;
201	entry_lo_t lo1;	201	entry_lo_t lo1;
202	entry_hi_t hi;	202	entry_hi_t hi;
203	tlb_prepare_entry_lo(&lo0, false, true, true, false, frame << (ZERO_PAGE_WIDTH - 12));	203	tlb_prepare_entry_lo(&lo0, false, true, true, false, frame << (ZERO_PAGE_WIDTH - 12));
204	tlb_prepare_entry_lo(&lo1, false, false, false, false, 0);	204	tlb_prepare_entry_lo(&lo1, false, false, false, false, 0);
205	tlb_prepare_entry_hi(&hi, ZERO_PAGE_ASID, ZERO_PAGE_ADDR);	205	tlb_prepare_entry_hi(&hi, ZERO_PAGE_ASID, ZERO_PAGE_ADDR);
206		206
207	cp0_pagemask_write(ZERO_PAGE_MASK);	207	cp0_pagemask_write(ZERO_PAGE_MASK);
208	cp0_entry_lo0_write(lo0.value);	208	cp0_entry_lo0_write(lo0.value);
209	cp0_entry_lo1_write(lo1.value);	209	cp0_entry_lo1_write(lo1.value);
210	cp0_entry_hi_write(hi.value);	210	cp0_entry_hi_write(hi.value);
211	cp0_index_write(ZERO_PAGE_TLBI);	211	cp0_index_write(ZERO_PAGE_TLBI);
212	tlbwi();	212	tlbwi();
213		213
214	ZERO_PAGE_VALUE = 0;	214	ZERO_PAGE_VALUE = 0;
215	if (ZERO_PAGE_VALUE != 0)	215	if (ZERO_PAGE_VALUE != 0)
216	avail = false;	216	avail = false;
217	else {	217	else {
218	ZERO_PAGE_VALUE = 0xdeadbeef;	218	ZERO_PAGE_VALUE = 0xdeadbeef;
219	if (ZERO_PAGE_VALUE != 0xdeadbeef)	219	if (ZERO_PAGE_VALUE != 0xdeadbeef)
220	avail = false;	220	avail = false;
221	#if (MACHINE == lgxemul) \|\| (MACHINE == bgxemul)	221	#if defined(lgxemul) \|\| defined(bgxemul)
222	else {	222	else {
223	ZERO_PAGE_VALUE_KSEG1(frame) = 0xaabbccdd;	223	ZERO_PAGE_VALUE_KSEG1(frame) = 0xaabbccdd;
224	if (ZERO_PAGE_VALUE_KSEG1(frame) != 0xaabbccdd)	224	if (ZERO_PAGE_VALUE_KSEG1(frame) != 0xaabbccdd)
225	avail = false;	225	avail = false;
226	}	226	}
227	#endif	227	#endif
228	}	228	}
229	}	229	}
230	}	230	}
231		231
232	if (!avail) {	232	if (!avail) {
233	frame_add_region(start_frame, frame);	233	frame_add_region(start_frame, frame);
234	start_frame = frame + 1;	234	start_frame = frame + 1;
235	avail = true;	235	avail = true;
236	}	236	}
237	}	237	}
238		238
239	frame_add_region(start_frame, frame);	239	frame_add_region(start_frame, frame);
240		240
241	/* Blacklist interrupt vector frame */	241	/* Blacklist interrupt vector frame */
242	frame_mark_unavailable(0, 1);	242	frame_mark_unavailable(0, 1);
243		243
244	/* Cleanup */	244	/* Cleanup */
245	cp0_pagemask_write(ZERO_PAGE_MASK);	245	cp0_pagemask_write(ZERO_PAGE_MASK);
246	cp0_entry_lo0_write(0);	246	cp0_entry_lo0_write(0);
247	cp0_entry_lo1_write(0);	247	cp0_entry_lo1_write(0);
248	cp0_entry_hi_write(0);	248	cp0_entry_hi_write(0);
249	cp0_index_write(ZERO_PAGE_TLBI);	249	cp0_index_write(ZERO_PAGE_TLBI);
250	tlbwi();	250	tlbwi();
251		251
252	interrupts_restore(ipl);	252	interrupts_restore(ipl);
253	}	253	}
254		254
255		255
256	void physmem_print(void)	256	void physmem_print(void)
257	{	257	{
258	printf("Base Size\n");	258	printf("Base Size\n");
259	printf("---------- ----------\n");	259	printf("---------- ----------\n");
260		260
261	count_t i;	261	count_t i;
262	for (i = 0; i < phys_regions_count; i++) {	262	for (i = 0; i < phys_regions_count; i++) {
263	printf("%#010x %10u\n",	263	printf("%#010x %10u\n",
264	PFN2ADDR(phys_regions[i].start), PFN2ADDR(phys_regions[i].count));	264	PFN2ADDR(phys_regions[i].start), PFN2ADDR(phys_regions[i].count));
265	}	265	}
266	}	266	}
267		267
268	/** @}	268	/** @}
269	*/	269	*/
270		270

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(root)/trunk/kernel/arch/mips32/src/mm/frame.c – Rev 3236 → 3880