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 */
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 */
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#include <macros.h>
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#include <macros.h>
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#include <arch/mm/frame.h>
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#include <arch/mm/frame.h>
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#include <arch/mm/tlb.h>
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#include <arch/mm/tlb.h>
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#include <interrupt.h>
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#include <mm/frame.h>
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#include <mm/frame.h>
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#include <mm/asid.h>
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#include <mm/asid.h>
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#include <config.h>
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#include <config.h>
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#include <arch/drivers/msim.h>
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#include <arch/drivers/msim.h>
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#include <arch/drivers/serial.h>
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#include <arch/drivers/serial.h>
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#include <print.h>
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#include <print.h>
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#include <debug.h>
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#define TLB_PAGE_MASK_1M    (0xff << 13)
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#define ZERO_PAGE_MASK      TLB_PAGE_MASK_1M
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#define ZERO_FRAMES         4096
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#define ZERO_FRAMES         4096
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#define ZERO_PAGE_WIDTH     20  /* 1M */
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#define ZERO_PAGE_WIDTH     20  /* 1M */
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#define ZERO_PAGE_SIZE      (1 << ZERO_PAGE_WIDTH)
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#define ZERO_PAGE_SIZE      (1 << ZERO_PAGE_WIDTH)
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#define ZERO_PAGE_ASID      ASID_INVALID
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#define ZERO_PAGE_ASID      ASID_INVALID
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#define ZERO_PAGE_TLBI      0
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#define ZERO_PAGE_TLBI      0
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#define ZERO_PAGE_ADDR      0
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#define ZERO_PAGE_ADDR      0
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#define ZERO_PAGE_OFFSET    (ZERO_PAGE_SIZE / sizeof(uint32_t) - 1)
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#define ZERO_PAGE_OFFSET    (ZERO_PAGE_SIZE / sizeof(uint32_t) - 1)
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#define ZERO_PAGE_VALUE     (*((volatile uint32_t *) ZERO_PAGE_ADDR + ZERO_PAGE_OFFSET))
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#define ZERO_PAGE_VALUE     (((volatile uint32_t *) ZERO_PAGE_ADDR)[ZERO_PAGE_OFFSET])
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#define MAX_REGIONS         32
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#define MAX_REGIONS         32
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typedef struct {
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typedef struct {
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    pfn_t start;
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    pfn_t start;
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static void frame_add_region(pfn_t start_frame, pfn_t end_frame)
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static void frame_add_region(pfn_t start_frame, pfn_t end_frame)
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{
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{
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    if (end_frame > start_frame) {
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    if (end_frame > start_frame) {
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        /* Convert 1M frames to 16K frames */
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        /* Convert 1M frames to 16K frames */
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        pfn_t first = ADDR2PFN(start_frame << ZERO_PAGE_WIDTH);
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        pfn_t first = ADDR2PFN(start_frame << ZERO_PAGE_WIDTH);
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        pfn_t count = ADDR2PFN((end_frame - start_frame - 1) << ZERO_PAGE_WIDTH);
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        pfn_t count = ADDR2PFN((end_frame - start_frame) << ZERO_PAGE_WIDTH);
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        /* Interrupt vector frame is blacklisted */
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        /* Interrupt vector frame is blacklisted */
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        pfn_t conf_frame;
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        pfn_t conf_frame;
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        if (start_frame == 0)
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        if (start_frame == 0)
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            conf_frame = 1;
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            conf_frame = 1;
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/** Create memory zones
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/** Create memory zones
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 *
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 *
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 * Walk through available 1 MB chunks of physical
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 * Walk through available 1 MB chunks of physical
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 * memory and create zones.
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 * memory and create zones.
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 *
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 *
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 * Note: It is assumed that the TLB is not yet being
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 * used in any way, thus there is no interference.
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 *
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 */
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 */
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void frame_arch_init(void)
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void frame_arch_init(void)
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{
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{
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    cp0_index_write(ZERO_PAGE_TLBI);
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    ipl_t ipl = interrupts_disable();
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    tlbr();
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    /* Clear and initialize TLB */
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    uint32_t orig_pagemask = cp0_pagemask_read();
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    cp0_pagemask_write(ZERO_PAGE_MASK);
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    uint32_t orig_lo0 = cp0_entry_lo0_read();
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    cp0_entry_lo0_write(0);
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    uint32_t orig_lo1 = cp0_entry_lo1_read();
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    cp0_entry_lo1_write(0);
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    uint32_t orig_hi = cp0_entry_hi_read();
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    cp0_entry_hi_write(0);
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    count_t i;
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    for (i = 0; i < TLB_ENTRY_COUNT; i++) {
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        cp0_index_write(i);
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        tlbwi();
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    }
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    pfn_t start_frame = 0;
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    pfn_t start_frame = 0;
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    pfn_t frame;
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    pfn_t frame;
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    bool avail = true;
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    bool avail = true;
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                entry_hi_t hi;
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                entry_hi_t hi;
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                tlb_prepare_entry_lo(&lo0, false, true, true, false, frame << (ZERO_PAGE_WIDTH - 12));
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                tlb_prepare_entry_lo(&lo0, false, true, true, false, frame << (ZERO_PAGE_WIDTH - 12));
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                tlb_prepare_entry_lo(&lo1, false, false, false, false, 0);
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                tlb_prepare_entry_lo(&lo1, false, false, false, false, 0);
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                tlb_prepare_entry_hi(&hi, ZERO_PAGE_ASID, ZERO_PAGE_ADDR);
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                tlb_prepare_entry_hi(&hi, ZERO_PAGE_ASID, ZERO_PAGE_ADDR);
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                cp0_index_write(ZERO_PAGE_TLBI);
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                cp0_pagemask_write(TLB_PAGE_MASK_1M);
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                cp0_pagemask_write(ZERO_PAGE_MASK);
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                cp0_entry_lo0_write(lo0.value);
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                cp0_entry_lo0_write(lo0.value);
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                cp0_entry_lo1_write(lo1.value);
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                cp0_entry_lo1_write(lo1.value);
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                cp0_entry_hi_write(hi.value);
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                cp0_entry_hi_write(hi.value);
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                cp0_index_write(ZERO_PAGE_TLBI);
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                tlbwi();
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                tlbwi();
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                ZERO_PAGE_VALUE = 0;
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                ZERO_PAGE_VALUE = 0;
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                if (ZERO_PAGE_VALUE != 0)
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                if (ZERO_PAGE_VALUE != 0)
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                    avail = false;
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                    avail = false;
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        }
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        }
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    }
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    }
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    frame_add_region(start_frame, frame);
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    frame_add_region(start_frame, frame);
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    /* Blacklist interrupt vector frame */
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    frame_mark_unavailable(0, 1);
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    /* Cleanup TLB */
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    /* Cleanup */
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    cp0_pagemask_write(ZERO_PAGE_MASK);
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    cp0_entry_lo0_write(0);
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    cp0_entry_lo1_write(0);
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    cp0_entry_hi_write(0);
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    cp0_index_write(ZERO_PAGE_TLBI);
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    cp0_index_write(ZERO_PAGE_TLBI);
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    cp0_pagemask_write(orig_pagemask);
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    cp0_entry_lo0_write(orig_lo0);
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    cp0_entry_lo1_write(orig_lo1);
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    cp0_entry_hi_write(orig_hi);
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    tlbwi();
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    tlbwi();
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    /* Blacklist interrupt vector frame */
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    interrupts_restore(ipl);
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    frame_mark_unavailable(0, 1);
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}
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}
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void physmem_print(void)
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void physmem_print(void)
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{
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{