WebSVN – HelenOS – Diff – /trunk/kernel/arch/mips32/src/mips32.c


/*
 * Copyright (c) 2003-2004 Jakub Jermar
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the distribution.
 * - The name of the author may not be used to endorse or promote products
 *   derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */
 
/** @addtogroup mips32
 * @{
 */
/** @file
 */
 
#include <arch.h>
#include <arch/boot.h>
#include <arch/cp0.h>
#include <arch/exception.h>
 
#include <mm/as.h>
 
#include <userspace.h>
#include <arch/console.h>
#include <memstr.h>
#include <proc/thread.h>
#include <proc/uarg.h>
#include <print.h>
#include <syscall/syscall.h>
#include <sysinfo/sysinfo.h>
 
#include <arch/interrupt.h>
#include <arch/drivers/arc.h>
#include <console/chardev.h>
#include <arch/debugger.h>
#include <genarch/fb/fb.h>
#include <genarch/fb/visuals.h>
#include <macros.h>
#include <ddi/device.h>
 
#include <arch/asm/regname.h>
 
/* Size of the code jumping to the exception handler code
 * - J+NOP
 */
#define EXCEPTION_JUMP_SIZE    8
 
#define TLB_EXC ((char *) 0x80000000)
#define NORM_EXC ((char *) 0x80000180)
#define CACHE_EXC ((char *) 0x80000100)
 
 
/* Why the linker moves the variable 64K away in assembler
 * when not in .text section ????????
 */
uintptr_t supervisor_sp __attribute__ ((section (".text")));
/* Stack pointer saved when entering user mode */
/* TODO: How do we do it on SMP system???? */
bootinfo_t bootinfo __attribute__ ((section (".text")));
 
void arch_pre_main(void)
{
    /* Setup usermode */
    init.cnt = bootinfo.cnt;
   
    uint32_t i;
   
    for (i = 0; i < bootinfo.cnt; i++) {
        init.tasks[i].addr = bootinfo.tasks[i].addr;
        init.tasks[i].size = bootinfo.tasks[i].size;
    }
}
 
void arch_pre_mm_init(void)
{
    /* It is not assumed by default */
    interrupts_disable();
   
    /* Initialize dispatch table */
    exception_init();
    arc_init();
 
    /* Copy the exception vectors to the right places */
    memcpy(TLB_EXC, (char *) tlb_refill_entry, EXCEPTION_JUMP_SIZE);
    memcpy(NORM_EXC, (char *) exception_entry, EXCEPTION_JUMP_SIZE);
    memcpy(CACHE_EXC, (char *) cache_error_entry, EXCEPTION_JUMP_SIZE);
   
    /*
     * Switch to BEV normal level so that exception vectors point to the kernel.
     * Clear the error level.
     */
    cp0_status_write(cp0_status_read() & ~(cp0_status_bev_bootstrap_bit|cp0_status_erl_error_bit));
 
    /*
     * Mask all interrupts
     */
    cp0_mask_all_int();
       
    debugger_init();
}
 
void arch_post_mm_init(void)
{
    interrupt_init();
    console_init(device_assign_devno());
#ifdef CONFIG_FB
    fb_init(0x12000000, 640, 480, 1920, VISUAL_RGB_8_8_8); // gxemul framebuffer
#endif
    sysinfo_set_item_val("machine." STRING(MACHINE), NULL, 1);
}
 
void arch_post_cpu_init(void)
{
}
 
void arch_pre_smp_init(void)
{
}
 
void arch_post_smp_init(void)
{
}
 
void userspace(uspace_arg_t *kernel_uarg)
{
    /* EXL=1, UM=1, IE=1 */
    cp0_status_write(cp0_status_read() | (cp0_status_exl_exception_bit |
                          cp0_status_um_bit |
                          cp0_status_ie_enabled_bit));
    cp0_epc_write((uintptr_t) kernel_uarg->uspace_entry);
    userspace_asm(((uintptr_t) kernel_uarg->uspace_stack+PAGE_SIZE),
              (uintptr_t) kernel_uarg->uspace_uarg,
              (uintptr_t) kernel_uarg->uspace_entry);
    while (1)
        ;
}
 
/** Perform mips32 specific tasks needed before the new task is run. */
void before_task_runs_arch(void)
{
}
 
/** Perform mips32 specific tasks needed before the new thread is scheduled. */
void before_thread_runs_arch(void)
{
    supervisor_sp = (uintptr_t) &THREAD->kstack[THREAD_STACK_SIZE-SP_DELTA];
}
 
void after_thread_ran_arch(void)
{
}
 
/** Set thread-local-storage pointer
 *
 * We have it currently in K1, it is
 * possible to have it separately in the future.
 */
unative_t sys_tls_set(unative_t addr)
{
    return 0;
}
 
/** @}
 */
 

Rev 2071	Rev 2089
1	/*	1	/*
2	* Copyright (c) 2003-2004 Jakub Jermar	2	* Copyright (c) 2003-2004 Jakub Jermar
3	* All rights reserved.	3	* All rights reserved.
4	*	4	*
5	* Redistribution and use in source and binary forms, with or without	5	* Redistribution and use in source and binary forms, with or without
6	* modification, are permitted provided that the following conditions	6	* modification, are permitted provided that the following conditions
7	* are met:	7	* are met:
8	*	8	*
9	* - Redistributions of source code must retain the above copyright	9	* - Redistributions of source code must retain the above copyright
10	* notice, this list of conditions and the following disclaimer.	10	* notice, this list of conditions and the following disclaimer.
11	* - Redistributions in binary form must reproduce the above copyright	11	* - Redistributions in binary form must reproduce the above copyright
12	* notice, this list of conditions and the following disclaimer in the	12	* notice, this list of conditions and the following disclaimer in the
13	* documentation and/or other materials provided with the distribution.	13	* documentation and/or other materials provided with the distribution.
14	* - The name of the author may not be used to endorse or promote products	14	* - The name of the author may not be used to endorse or promote products
15	* derived from this software without specific prior written permission.	15	* derived from this software without specific prior written permission.
16	*	16	*
17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR	17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES	18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.	19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,	20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT	21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,	22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY	23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT	24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF	25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.	26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27	*/	27	*/
28		28
29	/** @addtogroup mips32	29	/** @addtogroup mips32
30	* @{	30	* @{
31	*/	31	*/
32	/** @file	32	/** @file
33	*/	33	*/
34		34
35	#include <arch.h>	35	#include <arch.h>
36	#include <arch/boot.h>	36	#include <arch/boot.h>
37	#include <arch/cp0.h>	37	#include <arch/cp0.h>
38	#include <arch/exception.h>	38	#include <arch/exception.h>
39	#include <arch/asm.h>	-
40	#include <mm/as.h>	39	#include <mm/as.h>
41		40
42	#include <userspace.h>	41	#include <userspace.h>
43	#include <arch/console.h>	42	#include <arch/console.h>
44	#include <memstr.h>	43	#include <memstr.h>
45	#include <proc/thread.h>	44	#include <proc/thread.h>
46	#include <proc/uarg.h>	45	#include <proc/uarg.h>
47	#include <print.h>	46	#include <print.h>
48	#include <syscall/syscall.h>	47	#include <syscall/syscall.h>
49	#include <sysinfo/sysinfo.h>	48	#include <sysinfo/sysinfo.h>
50		49
51	#include <arch/interrupt.h>	50	#include <arch/interrupt.h>
52	#include <arch/drivers/arc.h>	51	#include <arch/drivers/arc.h>
53	#include <console/chardev.h>	52	#include <console/chardev.h>
54	#include <arch/debugger.h>	53	#include <arch/debugger.h>
55	#include <genarch/fb/fb.h>	54	#include <genarch/fb/fb.h>
56	#include <genarch/fb/visuals.h>	55	#include <genarch/fb/visuals.h>
57	#include <macros.h>	56	#include <macros.h>
58	#include <ddi/device.h>	57	#include <ddi/device.h>
59		58
60	#include <arch/asm/regname.h>	59	#include <arch/asm/regname.h>
61		60
62	/* Size of the code jumping to the exception handler code	61	/* Size of the code jumping to the exception handler code
63	* - J+NOP	62	* - J+NOP
64	*/	63	*/
65	#define EXCEPTION_JUMP_SIZE 8	64	#define EXCEPTION_JUMP_SIZE 8
66		65
67	#define TLB_EXC ((char *) 0x80000000)	66	#define TLB_EXC ((char *) 0x80000000)
68	#define NORM_EXC ((char *) 0x80000180)	67	#define NORM_EXC ((char *) 0x80000180)
69	#define CACHE_EXC ((char *) 0x80000100)	68	#define CACHE_EXC ((char *) 0x80000100)
70		69
71		70
72	/* Why the linker moves the variable 64K away in assembler	71	/* Why the linker moves the variable 64K away in assembler
73	* when not in .text section ????????	72	* when not in .text section ????????
74	*/	73	*/
75	uintptr_t supervisor_sp __attribute__ ((section (".text")));	74	uintptr_t supervisor_sp __attribute__ ((section (".text")));
76	/* Stack pointer saved when entering user mode */	75	/* Stack pointer saved when entering user mode */
77	/* TODO: How do we do it on SMP system???? */	76	/* TODO: How do we do it on SMP system???? */
78	bootinfo_t bootinfo __attribute__ ((section (".text")));	77	bootinfo_t bootinfo __attribute__ ((section (".text")));
79		78
80	void arch_pre_main(void)	79	void arch_pre_main(void)
81	{	80	{
82	/* Setup usermode */	81	/* Setup usermode */
83	init.cnt = bootinfo.cnt;	82	init.cnt = bootinfo.cnt;
84		83
85	uint32_t i;	84	uint32_t i;
86		85
87	for (i = 0; i < bootinfo.cnt; i++) {	86	for (i = 0; i < bootinfo.cnt; i++) {
88	init.tasks[i].addr = bootinfo.tasks[i].addr;	87	init.tasks[i].addr = bootinfo.tasks[i].addr;
89	init.tasks[i].size = bootinfo.tasks[i].size;	88	init.tasks[i].size = bootinfo.tasks[i].size;
90	}	89	}
91	}	90	}
92		91
93	void arch_pre_mm_init(void)	92	void arch_pre_mm_init(void)
94	{	93	{
95	/* It is not assumed by default */	94	/* It is not assumed by default */
96	interrupts_disable();	95	interrupts_disable();
97		96
98	/* Initialize dispatch table */	97	/* Initialize dispatch table */
99	exception_init();	98	exception_init();
100	arc_init();	99	arc_init();
101		100
102	/* Copy the exception vectors to the right places */	101	/* Copy the exception vectors to the right places */
103	memcpy(TLB_EXC, (char *) tlb_refill_entry, EXCEPTION_JUMP_SIZE);	102	memcpy(TLB_EXC, (char *) tlb_refill_entry, EXCEPTION_JUMP_SIZE);
104	memcpy(NORM_EXC, (char *) exception_entry, EXCEPTION_JUMP_SIZE);	103	memcpy(NORM_EXC, (char *) exception_entry, EXCEPTION_JUMP_SIZE);
105	memcpy(CACHE_EXC, (char *) cache_error_entry, EXCEPTION_JUMP_SIZE);	104	memcpy(CACHE_EXC, (char *) cache_error_entry, EXCEPTION_JUMP_SIZE);
106		105
107	/*	106	/*
108	* Switch to BEV normal level so that exception vectors point to the kernel.	107	* Switch to BEV normal level so that exception vectors point to the kernel.
109	* Clear the error level.	108	* Clear the error level.
110	*/	109	*/
111	cp0_status_write(cp0_status_read() & ~(cp0_status_bev_bootstrap_bit\|cp0_status_erl_error_bit));	110	cp0_status_write(cp0_status_read() & ~(cp0_status_bev_bootstrap_bit\|cp0_status_erl_error_bit));
112		111
113	/*	112	/*
114	* Mask all interrupts	113	* Mask all interrupts
115	*/	114	*/
116	cp0_mask_all_int();	115	cp0_mask_all_int();
117		116
118	debugger_init();	117	debugger_init();
119	}	118	}
120		119
121	void arch_post_mm_init(void)	120	void arch_post_mm_init(void)
122	{	121	{
123	interrupt_init();	122	interrupt_init();
124	console_init(device_assign_devno());	123	console_init(device_assign_devno());
125	#ifdef CONFIG_FB	124	#ifdef CONFIG_FB
126	fb_init(0x12000000, 640, 480, 1920, VISUAL_RGB_8_8_8); // gxemul framebuffer	125	fb_init(0x12000000, 640, 480, 1920, VISUAL_RGB_8_8_8); // gxemul framebuffer
127	#endif	126	#endif
128	sysinfo_set_item_val("machine." STRING(MACHINE), NULL, 1);	127	sysinfo_set_item_val("machine." STRING(MACHINE), NULL, 1);
129	}	128	}
130		129
131	void arch_post_cpu_init(void)	130	void arch_post_cpu_init(void)
132	{	131	{
133	}	132	}
134		133
135	void arch_pre_smp_init(void)	134	void arch_pre_smp_init(void)
136	{	135	{
137	}	136	}
138		137
139	void arch_post_smp_init(void)	138	void arch_post_smp_init(void)
140	{	139	{
141	}	140	}
142		141
143	void userspace(uspace_arg_t *kernel_uarg)	142	void userspace(uspace_arg_t *kernel_uarg)
144	{	143	{
145	/* EXL=1, UM=1, IE=1 */	144	/* EXL=1, UM=1, IE=1 */
146	cp0_status_write(cp0_status_read() \| (cp0_status_exl_exception_bit \|	145	cp0_status_write(cp0_status_read() \| (cp0_status_exl_exception_bit \|
147	cp0_status_um_bit \|	146	cp0_status_um_bit \|
148	cp0_status_ie_enabled_bit));	147	cp0_status_ie_enabled_bit));
149	cp0_epc_write((uintptr_t) kernel_uarg->uspace_entry);	148	cp0_epc_write((uintptr_t) kernel_uarg->uspace_entry);
150	userspace_asm(((uintptr_t) kernel_uarg->uspace_stack+PAGE_SIZE),	149	userspace_asm(((uintptr_t) kernel_uarg->uspace_stack+PAGE_SIZE),
151	(uintptr_t) kernel_uarg->uspace_uarg,	150	(uintptr_t) kernel_uarg->uspace_uarg,
152	(uintptr_t) kernel_uarg->uspace_entry);	151	(uintptr_t) kernel_uarg->uspace_entry);
153	while (1)	152	while (1)
154	;	153	;
155	}	154	}
156		155
157	/** Perform mips32 specific tasks needed before the new task is run. */	156	/** Perform mips32 specific tasks needed before the new task is run. */
158	void before_task_runs_arch(void)	157	void before_task_runs_arch(void)
159	{	158	{
160	}	159	}
161		160
162	/** Perform mips32 specific tasks needed before the new thread is scheduled. */	161	/** Perform mips32 specific tasks needed before the new thread is scheduled. */
163	void before_thread_runs_arch(void)	162	void before_thread_runs_arch(void)
164	{	163	{
165	supervisor_sp = (uintptr_t) &THREAD->kstack[THREAD_STACK_SIZE-SP_DELTA];	164	supervisor_sp = (uintptr_t) &THREAD->kstack[THREAD_STACK_SIZE-SP_DELTA];
166	}	165	}
167		166
168	void after_thread_ran_arch(void)	167	void after_thread_ran_arch(void)
169	{	168	{
170	}	169	}
171		170
172	/** Set thread-local-storage pointer	171	/** Set thread-local-storage pointer
173	*	172	*
174	* We have it currently in K1, it is	173	* We have it currently in K1, it is
175	* possible to have it separately in the future.	174	* possible to have it separately in the future.
176	*/	175	*/
177	unative_t sys_tls_set(unative_t addr)	176	unative_t sys_tls_set(unative_t addr)
178	{	177	{
179	return 0;	178	return 0;
180	}	179	}
181		180
182	/** @}	181	/** @}
183	*/	182	*/
184		183

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(root)/trunk/kernel/arch/mips32/src/mips32.c – Rev 2071 → 2089