WebSVN – HelenOS – Diff – /trunk/kernel/arch/mips32/include/mm/page.h


/*
 * Copyright (c) 2003-2004 Jakub Jermar
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the distribution.
 * - The name of the author may not be used to endorse or promote products
 *   derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */
 
/** @addtogroup mips32mm   
 * @{
 */
/** @file
 */
 
#ifndef KERN_mips32_PAGE_H_
#define KERN_mips32_PAGE_H_
 
#include <arch/mm/frame.h>
 
#define PAGE_WIDTH  FRAME_WIDTH
#define PAGE_SIZE   FRAME_SIZE
 
#define PAGE_COLOR_BITS 0           /* dummy */
 
#ifndef __ASM__
#   define KA2PA(x) (((uintptr_t) (x)) - 0x80000000)
#   define PA2KA(x) (((uintptr_t) (x)) + 0x80000000)
#else
#   define KA2PA(x) ((x) - 0x80000000)
#   define PA2KA(x) ((x) + 0x80000000)
#endif
 
#ifdef KERNEL
 
/*
 * Implementation of generic 4-level page table interface.
 *
 * Page table layout:
 * - 32-bit virtual addresses
 * - Offset is 14 bits => pages are 16K long
 * - PTE's use similar format as CP0 EntryLo[01] registers => PTE is therefore 4 bytes long
 * - PTE's replace EntryLo v (valid) bit with p (present) bit
 * - PTE's use only one bit to distinguish between cacheable and uncacheable mappings
 * - PTE's define soft_valid field to ensure there is at least one 1 bit even if the p bit is cleared
 * - PTE's make use of CP0 EntryLo's two-bit reserved field for bit W (writable) and bit A (accessed)
 * - PTL0 has 64 entries (6 bits)
 * - PTL1 is not used
 * - PTL2 is not used
 * - PTL3 has 4096 entries (12 bits)
 */
 
#define PTL0_ENTRIES_ARCH   64
#define PTL1_ENTRIES_ARCH   0
#define PTL2_ENTRIES_ARCH   0
#define PTL3_ENTRIES_ARCH   4096
 
#define PTL0_SIZE_ARCH       ONE_FRAME
#define PTL1_SIZE_ARCH       0
#define PTL2_SIZE_ARCH       0
#define PTL3_SIZE_ARCH       ONE_FRAME
 
#define PTL0_INDEX_ARCH(vaddr)  ((vaddr)>>26) 
#define PTL1_INDEX_ARCH(vaddr)  0
#define PTL2_INDEX_ARCH(vaddr)  0
#define PTL3_INDEX_ARCH(vaddr)  (((vaddr)>>14) & 0xfff)
 
#define SET_PTL0_ADDRESS_ARCH(ptl0)
 
#define GET_PTL1_ADDRESS_ARCH(ptl0, i)      (((pte_t *)(ptl0))[(i)].pfn<<12)
#define GET_PTL2_ADDRESS_ARCH(ptl1, i)      (ptl1)
#define GET_PTL3_ADDRESS_ARCH(ptl2, i)      (ptl2)
#define GET_FRAME_ADDRESS_ARCH(ptl3, i)     (((pte_t *)(ptl3))[(i)].pfn<<12)
 
#define SET_PTL1_ADDRESS_ARCH(ptl0, i, a)   (((pte_t *)(ptl0))[(i)].pfn = (a)>>12)
#define SET_PTL2_ADDRESS_ARCH(ptl1, i, a)
#define SET_PTL3_ADDRESS_ARCH(ptl2, i, a)
#define SET_FRAME_ADDRESS_ARCH(ptl3, i, a)  (((pte_t *)(ptl3))[(i)].pfn = (a)>>12)
 
#define GET_PTL1_FLAGS_ARCH(ptl0, i)        get_pt_flags((pte_t *)(ptl0), (index_t)(i))
#define GET_PTL2_FLAGS_ARCH(ptl1, i)        PAGE_PRESENT
#define GET_PTL3_FLAGS_ARCH(ptl2, i)        PAGE_PRESENT
#define GET_FRAME_FLAGS_ARCH(ptl3, i)       get_pt_flags((pte_t *)(ptl3), (index_t)(i))
 
#define SET_PTL1_FLAGS_ARCH(ptl0, i, x)     set_pt_flags((pte_t *)(ptl0), (index_t)(i), (x))
#define SET_PTL2_FLAGS_ARCH(ptl1, i, x)
#define SET_PTL3_FLAGS_ARCH(ptl2, i, x)
#define SET_FRAME_FLAGS_ARCH(ptl3, i, x)    set_pt_flags((pte_t *)(ptl3), (index_t)(i), (x))
 
#define PTE_VALID_ARCH(pte)         (*((uint32_t *) (pte)) != 0)
#define PTE_PRESENT_ARCH(pte)           ((pte)->p != 0)
#define PTE_GET_FRAME_ARCH(pte)         ((pte)->pfn<<12)
#define PTE_WRITABLE_ARCH(pte)          ((pte)->w != 0)
#define PTE_EXECUTABLE_ARCH(pte)        1
 
#ifndef __ASM__
 
#include <mm/mm.h>
#include <arch/exception.h>
 
static inline int get_pt_flags(pte_t *pt, index_t i)
{
    pte_t *p = &pt[i];
   
    return (
        (p->cacheable<<PAGE_CACHEABLE_SHIFT) |
        ((!p->p)<<PAGE_PRESENT_SHIFT) |
        (1<<PAGE_USER_SHIFT) |
        (1<<PAGE_READ_SHIFT) |
        ((p->w)<<PAGE_WRITE_SHIFT) |
        (1<<PAGE_EXEC_SHIFT) |
        (p->g<<PAGE_GLOBAL_SHIFT)
    );
       
}
 
static inline void set_pt_flags(pte_t *pt, index_t i, int flags)
{
    pte_t *p = &pt[i];
   
    p->cacheable = (flags & PAGE_CACHEABLE) != 0;
    p->p = !(flags & PAGE_NOT_PRESENT);
    p->g = (flags & PAGE_GLOBAL) != 0;
    p->w = (flags & PAGE_WRITE) != 0;
   
    /*
     * Ensure that valid entries have at least one bit set.
     */
    p->soft_valid = 1;
}
 
extern void page_arch_init(void);
 
#endif /* __ASM__ */
 
#endif /* KERNEL */
 
#endif
 
/** @}
 */
 

Subversion Repositories HelenOS

(root)/trunk/kernel/arch/mips32/include/mm/page.h – Rev 2089 → 2465

Rev 2089		Rev 2465
1	/*	1	/*
2	* Copyright (c) 2003-2004 Jakub Jermar	2	* Copyright (c) 2003-2004 Jakub Jermar
3	* All rights reserved.	3	* All rights reserved.
4	*	4	*
5	* Redistribution and use in source and binary forms, with or without	5	* Redistribution and use in source and binary forms, with or without
6	* modification, are permitted provided that the following conditions	6	* modification, are permitted provided that the following conditions
7	* are met:	7	* are met:
8	*	8	*
9	* - Redistributions of source code must retain the above copyright	9	* - Redistributions of source code must retain the above copyright
10	* notice, this list of conditions and the following disclaimer.	10	* notice, this list of conditions and the following disclaimer.
11	* - Redistributions in binary form must reproduce the above copyright	11	* - Redistributions in binary form must reproduce the above copyright
12	* notice, this list of conditions and the following disclaimer in the	12	* notice, this list of conditions and the following disclaimer in the
13	* documentation and/or other materials provided with the distribution.	13	* documentation and/or other materials provided with the distribution.
14	* - The name of the author may not be used to endorse or promote products	14	* - The name of the author may not be used to endorse or promote products
15	* derived from this software without specific prior written permission.	15	* derived from this software without specific prior written permission.
16	*	16	*
17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR	17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES	18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.	19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,	20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT	21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,	22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY	23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT	24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF	25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.	26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27	*/	27	*/
28		28
29	/** @addtogroup mips32mm	29	/** @addtogroup mips32mm
30	* @{	30	* @{
31	*/	31	*/
32	/** @file	32	/** @file
33	*/	33	*/
34		34
35	#ifndef KERN_mips32_PAGE_H_	35	#ifndef KERN_mips32_PAGE_H_
36	#define KERN_mips32_PAGE_H_	36	#define KERN_mips32_PAGE_H_
37		37
38	#include <arch/mm/frame.h>	38	#include <arch/mm/frame.h>
39		39
40	#define PAGE_WIDTH FRAME_WIDTH	40	#define PAGE_WIDTH FRAME_WIDTH
41	#define PAGE_SIZE FRAME_SIZE	41	#define PAGE_SIZE FRAME_SIZE
42		42
43	#define PAGE_COLOR_BITS 0 /* dummy */	43	#define PAGE_COLOR_BITS 0 /* dummy */
44		44
45	#ifndef __ASM__	45	#ifndef __ASM__
46	# define KA2PA(x) (((uintptr_t) (x)) - 0x80000000)	46	# define KA2PA(x) (((uintptr_t) (x)) - 0x80000000)
47	# define PA2KA(x) (((uintptr_t) (x)) + 0x80000000)	47	# define PA2KA(x) (((uintptr_t) (x)) + 0x80000000)
48	#else	48	#else
49	# define KA2PA(x) ((x) - 0x80000000)	49	# define KA2PA(x) ((x) - 0x80000000)
50	# define PA2KA(x) ((x) + 0x80000000)	50	# define PA2KA(x) ((x) + 0x80000000)
51	#endif	51	#endif
52		52
53	#ifdef KERNEL	53	#ifdef KERNEL
54		54
55	/*	55	/*
56	* Implementation of generic 4-level page table interface.	56	* Implementation of generic 4-level page table interface.
57	*	57	*
58	* Page table layout:	58	* Page table layout:
59	* - 32-bit virtual addresses	59	* - 32-bit virtual addresses
60	* - Offset is 14 bits => pages are 16K long	60	* - Offset is 14 bits => pages are 16K long
61	* - PTE's use similar format as CP0 EntryLo[01] registers => PTE is therefore 4 bytes long	61	* - PTE's use similar format as CP0 EntryLo[01] registers => PTE is therefore 4 bytes long
62	* - PTE's replace EntryLo v (valid) bit with p (present) bit	62	* - PTE's replace EntryLo v (valid) bit with p (present) bit
63	* - PTE's use only one bit to distinguish between cacheable and uncacheable mappings	63	* - PTE's use only one bit to distinguish between cacheable and uncacheable mappings
64	* - PTE's define soft_valid field to ensure there is at least one 1 bit even if the p bit is cleared	64	* - PTE's define soft_valid field to ensure there is at least one 1 bit even if the p bit is cleared
65	* - PTE's make use of CP0 EntryLo's two-bit reserved field for bit W (writable) and bit A (accessed)	65	* - PTE's make use of CP0 EntryLo's two-bit reserved field for bit W (writable) and bit A (accessed)
66	* - PTL0 has 64 entries (6 bits)	66	* - PTL0 has 64 entries (6 bits)
67	* - PTL1 is not used	67	* - PTL1 is not used
68	* - PTL2 is not used	68	* - PTL2 is not used
69	* - PTL3 has 4096 entries (12 bits)	69	* - PTL3 has 4096 entries (12 bits)
70	*/	70	*/
71		71
72	#define PTL0_ENTRIES_ARCH 64	72	#define PTL0_ENTRIES_ARCH 64
73	#define PTL1_ENTRIES_ARCH 0	73	#define PTL1_ENTRIES_ARCH 0
74	#define PTL2_ENTRIES_ARCH 0	74	#define PTL2_ENTRIES_ARCH 0
75	#define PTL3_ENTRIES_ARCH 4096	75	#define PTL3_ENTRIES_ARCH 4096
76		76
-		77	#define PTL0_SIZE_ARCH ONE_FRAME
-		78	#define PTL1_SIZE_ARCH 0
-		79	#define PTL2_SIZE_ARCH 0
-		80	#define PTL3_SIZE_ARCH ONE_FRAME
-		81
77	#define PTL0_INDEX_ARCH(vaddr) ((vaddr)>>26)	82	#define PTL0_INDEX_ARCH(vaddr) ((vaddr)>>26)
78	#define PTL1_INDEX_ARCH(vaddr) 0	83	#define PTL1_INDEX_ARCH(vaddr) 0
79	#define PTL2_INDEX_ARCH(vaddr) 0	84	#define PTL2_INDEX_ARCH(vaddr) 0
80	#define PTL3_INDEX_ARCH(vaddr) (((vaddr)>>14) & 0xfff)	85	#define PTL3_INDEX_ARCH(vaddr) (((vaddr)>>14) & 0xfff)
81		86
82	#define SET_PTL0_ADDRESS_ARCH(ptl0)	87	#define SET_PTL0_ADDRESS_ARCH(ptl0)
83		88
84	#define GET_PTL1_ADDRESS_ARCH(ptl0, i) (((pte_t *)(ptl0))[(i)].pfn<<12)	89	#define GET_PTL1_ADDRESS_ARCH(ptl0, i) (((pte_t *)(ptl0))[(i)].pfn<<12)
85	#define GET_PTL2_ADDRESS_ARCH(ptl1, i) (ptl1)	90	#define GET_PTL2_ADDRESS_ARCH(ptl1, i) (ptl1)
86	#define GET_PTL3_ADDRESS_ARCH(ptl2, i) (ptl2)	91	#define GET_PTL3_ADDRESS_ARCH(ptl2, i) (ptl2)
87	#define GET_FRAME_ADDRESS_ARCH(ptl3, i) (((pte_t *)(ptl3))[(i)].pfn<<12)	92	#define GET_FRAME_ADDRESS_ARCH(ptl3, i) (((pte_t *)(ptl3))[(i)].pfn<<12)
88		93
89	#define SET_PTL1_ADDRESS_ARCH(ptl0, i, a) (((pte_t *)(ptl0))[(i)].pfn = (a)>>12)	94	#define SET_PTL1_ADDRESS_ARCH(ptl0, i, a) (((pte_t *)(ptl0))[(i)].pfn = (a)>>12)
90	#define SET_PTL2_ADDRESS_ARCH(ptl1, i, a)	95	#define SET_PTL2_ADDRESS_ARCH(ptl1, i, a)
91	#define SET_PTL3_ADDRESS_ARCH(ptl2, i, a)	96	#define SET_PTL3_ADDRESS_ARCH(ptl2, i, a)
92	#define SET_FRAME_ADDRESS_ARCH(ptl3, i, a) (((pte_t *)(ptl3))[(i)].pfn = (a)>>12)	97	#define SET_FRAME_ADDRESS_ARCH(ptl3, i, a) (((pte_t *)(ptl3))[(i)].pfn = (a)>>12)
93		98
94	#define GET_PTL1_FLAGS_ARCH(ptl0, i) get_pt_flags((pte_t *)(ptl0), (index_t)(i))	99	#define GET_PTL1_FLAGS_ARCH(ptl0, i) get_pt_flags((pte_t *)(ptl0), (index_t)(i))
95	#define GET_PTL2_FLAGS_ARCH(ptl1, i) PAGE_PRESENT	100	#define GET_PTL2_FLAGS_ARCH(ptl1, i) PAGE_PRESENT
96	#define GET_PTL3_FLAGS_ARCH(ptl2, i) PAGE_PRESENT	101	#define GET_PTL3_FLAGS_ARCH(ptl2, i) PAGE_PRESENT
97	#define GET_FRAME_FLAGS_ARCH(ptl3, i) get_pt_flags((pte_t *)(ptl3), (index_t)(i))	102	#define GET_FRAME_FLAGS_ARCH(ptl3, i) get_pt_flags((pte_t *)(ptl3), (index_t)(i))
98		103
99	#define SET_PTL1_FLAGS_ARCH(ptl0, i, x) set_pt_flags((pte_t *)(ptl0), (index_t)(i), (x))	104	#define SET_PTL1_FLAGS_ARCH(ptl0, i, x) set_pt_flags((pte_t *)(ptl0), (index_t)(i), (x))
100	#define SET_PTL2_FLAGS_ARCH(ptl1, i, x)	105	#define SET_PTL2_FLAGS_ARCH(ptl1, i, x)
101	#define SET_PTL3_FLAGS_ARCH(ptl2, i, x)	106	#define SET_PTL3_FLAGS_ARCH(ptl2, i, x)
102	#define SET_FRAME_FLAGS_ARCH(ptl3, i, x) set_pt_flags((pte_t *)(ptl3), (index_t)(i), (x))	107	#define SET_FRAME_FLAGS_ARCH(ptl3, i, x) set_pt_flags((pte_t *)(ptl3), (index_t)(i), (x))
103		108
104	#define PTE_VALID_ARCH(pte) (((uint32_t ) (pte)) != 0)	109	#define PTE_VALID_ARCH(pte) (((uint32_t ) (pte)) != 0)
105	#define PTE_PRESENT_ARCH(pte) ((pte)->p != 0)	110	#define PTE_PRESENT_ARCH(pte) ((pte)->p != 0)
106	#define PTE_GET_FRAME_ARCH(pte) ((pte)->pfn<<12)	111	#define PTE_GET_FRAME_ARCH(pte) ((pte)->pfn<<12)
107	#define PTE_WRITABLE_ARCH(pte) ((pte)->w != 0)	112	#define PTE_WRITABLE_ARCH(pte) ((pte)->w != 0)
108	#define PTE_EXECUTABLE_ARCH(pte) 1	113	#define PTE_EXECUTABLE_ARCH(pte) 1
109		114
110	#ifndef __ASM__	115	#ifndef __ASM__
111		116
112	#include <mm/mm.h>	117	#include <mm/mm.h>
113	#include <arch/exception.h>	118	#include <arch/exception.h>
114		119
115	static inline int get_pt_flags(pte_t *pt, index_t i)	120	static inline int get_pt_flags(pte_t *pt, index_t i)
116	{	121	{
117	pte_t *p = &pt[i];	122	pte_t *p = &pt[i];
118		123
119	return (	124	return (
120	(p->cacheable<<PAGE_CACHEABLE_SHIFT) \|	125	(p->cacheable<<PAGE_CACHEABLE_SHIFT) \|
121	((!p->p)<<PAGE_PRESENT_SHIFT) \|	126	((!p->p)<<PAGE_PRESENT_SHIFT) \|
122	(1<<PAGE_USER_SHIFT) \|	127	(1<<PAGE_USER_SHIFT) \|
123	(1<<PAGE_READ_SHIFT) \|	128	(1<<PAGE_READ_SHIFT) \|
124	((p->w)<<PAGE_WRITE_SHIFT) \|	129	((p->w)<<PAGE_WRITE_SHIFT) \|
125	(1<<PAGE_EXEC_SHIFT) \|	130	(1<<PAGE_EXEC_SHIFT) \|
126	(p->g<<PAGE_GLOBAL_SHIFT)	131	(p->g<<PAGE_GLOBAL_SHIFT)
127	);	132	);
128		133
129	}	134	}
130		135
131	static inline void set_pt_flags(pte_t *pt, index_t i, int flags)	136	static inline void set_pt_flags(pte_t *pt, index_t i, int flags)
132	{	137	{
133	pte_t *p = &pt[i];	138	pte_t *p = &pt[i];
134		139
135	p->cacheable = (flags & PAGE_CACHEABLE) != 0;	140	p->cacheable = (flags & PAGE_CACHEABLE) != 0;
136	p->p = !(flags & PAGE_NOT_PRESENT);	141	p->p = !(flags & PAGE_NOT_PRESENT);
137	p->g = (flags & PAGE_GLOBAL) != 0;	142	p->g = (flags & PAGE_GLOBAL) != 0;
138	p->w = (flags & PAGE_WRITE) != 0;	143	p->w = (flags & PAGE_WRITE) != 0;
139		144
140	/*	145	/*
141	* Ensure that valid entries have at least one bit set.	146	* Ensure that valid entries have at least one bit set.
142	*/	147	*/
143	p->soft_valid = 1;	148	p->soft_valid = 1;
144	}	149	}
145		150
146	extern void page_arch_init(void);	151	extern void page_arch_init(void);
147		152
148	#endif /* __ASM__ */	153	#endif /* __ASM__ */
149		154
150	#endif /* KERNEL */	155	#endif /* KERNEL */
151		156
152	#endif	157	#endif
153		158
154	/** @}	159	/** @}
155	*/	160	*/
156		161