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1
/*
1
/*
2
 * Copyright (c) 2005 Jakub Jermar
2
 * Copyright (c) 2005 Jakub Jermar
3
 * All rights reserved.
3
 * All rights reserved.
4
 *
4
 *
5
 * Redistribution and use in source and binary forms, with or without
5
 * Redistribution and use in source and binary forms, with or without
6
 * modification, are permitted provided that the following conditions
6
 * modification, are permitted provided that the following conditions
7
 * are met:
7
 * are met:
8
 *
8
 *
9
 * - Redistributions of source code must retain the above copyright
9
 * - Redistributions of source code must retain the above copyright
10
 *   notice, this list of conditions and the following disclaimer.
10
 *   notice, this list of conditions and the following disclaimer.
11
 * - Redistributions in binary form must reproduce the above copyright
11
 * - Redistributions in binary form must reproduce the above copyright
12
 *   notice, this list of conditions and the following disclaimer in the
12
 *   notice, this list of conditions and the following disclaimer in the
13
 *   documentation and/or other materials provided with the distribution.
13
 *   documentation and/or other materials provided with the distribution.
14
 * - The name of the author may not be used to endorse or promote products
14
 * - The name of the author may not be used to endorse or promote products
15
 *   derived from this software without specific prior written permission.
15
 *   derived from this software without specific prior written permission.
16
 *
16
 *
17
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
21
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
22
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
23
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
24
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
25
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27
 */
27
 */
28
 
28
 
29
/** @addtogroup ia64
29
/** @addtogroup ia64
30
 * @{
30
 * @{
31
 */
31
 */
32
/** @file
32
/** @file
33
 */
33
 */
34
 
34
 
35
#include <arch.h>
35
#include <arch.h>
36
#include <arch/ski/ski.h>
36
#include <arch/ski/ski.h>
37
#include <arch/drivers/it.h>
37
#include <arch/drivers/it.h>
38
#include <arch/interrupt.h>
38
#include <arch/interrupt.h>
39
#include <arch/barrier.h>
39
#include <arch/barrier.h>
40
#include <arch/asm.h>
40
#include <arch/asm.h>
41
#include <arch/register.h>
41
#include <arch/register.h>
42
#include <arch/types.h>
42
#include <arch/types.h>
43
#include <arch/context.h>
43
#include <arch/context.h>
44
#include <arch/stack.h>
44
#include <arch/stack.h>
45
#include <arch/mm/page.h>
45
#include <arch/mm/page.h>
46
#include <mm/as.h>
46
#include <mm/as.h>
47
#include <config.h>
47
#include <config.h>
48
#include <userspace.h>
48
#include <userspace.h>
49
#include <console/console.h>
49
#include <console/console.h>
50
#include <proc/uarg.h>
50
#include <proc/uarg.h>
51
#include <syscall/syscall.h>
51
#include <syscall/syscall.h>
52
#include <ddi/irq.h>
52
#include <ddi/irq.h>
53
#include <ddi/device.h>
53
#include <ddi/device.h>
54
#include <arch/bootinfo.h>
54
#include <arch/bootinfo.h>
55
#include <arch/drivers/ega.h>
55
#include <arch/drivers/ega.h>
56
#include <genarch/drivers/ega/ega.h>
56
#include <genarch/drivers/ega/ega.h>
57
#include <genarch/kbd/i8042.h>
57
#include <genarch/kbd/i8042.h>
58
#include <genarch/kbd/ns16550.h>
58
#include <genarch/kbd/ns16550.h>
59
#include <smp/smp.h>
59
#include <smp/smp.h>
60
#include <smp/ipi.h>
60
#include <smp/ipi.h>
61
#include <arch/atomic.h>
61
#include <arch/atomic.h>
62
#include <panic.h>
62
#include <panic.h>
63
#include <print.h>
63
#include <print.h>
64
#include <sysinfo/sysinfo.h>
64
#include <sysinfo/sysinfo.h>
65
 
65
 
66
/* NS16550 as a COM 1 */
66
/* NS16550 as a COM 1 */
67
#define NS16550_IRQ (4 + LEGACY_INTERRUPT_BASE)
67
#define NS16550_IRQ (4 + LEGACY_INTERRUPT_BASE)
68
#define NS16550_PORT    0x3f8
68
#define NS16550_PORT    0x3f8
69
 
69
 
70
bootinfo_t *bootinfo;
70
bootinfo_t *bootinfo;
71
 
71
 
72
static uint64_t iosapic_base = 0xfec00000;
72
static uint64_t iosapic_base = 0xfec00000;
73
 
73
 
74
void arch_pre_main(void)
74
void arch_pre_main(void)
75
{
75
{
76
    /* Setup usermode init tasks. */
76
    /* Setup usermode init tasks. */
77
 
77
 
78
    unsigned int i;
78
    unsigned int i;
79
   
79
   
80
    init.cnt = bootinfo->taskmap.count;
80
    init.cnt = bootinfo->taskmap.count;
81
   
81
   
82
    for (i = 0; i < init.cnt; i++) {
82
    for (i = 0; i < init.cnt; i++) {
83
        init.tasks[i].addr =
83
        init.tasks[i].addr =
84
            ((unsigned long) bootinfo->taskmap.tasks[i].addr) |
84
            ((unsigned long) bootinfo->taskmap.tasks[i].addr) |
85
            VRN_MASK;
85
            VRN_MASK;
86
        init.tasks[i].size = bootinfo->taskmap.tasks[i].size;
86
        init.tasks[i].size = bootinfo->taskmap.tasks[i].size;
87
    }
87
    }
88
}
88
}
89
 
89
 
90
void arch_pre_mm_init(void)
90
void arch_pre_mm_init(void)
91
{
91
{
92
    /*
92
    /*
93
     * Set Interruption Vector Address (i.e. location of interruption vector
93
     * Set Interruption Vector Address (i.e. location of interruption vector
94
     * table).
94
     * table).
95
     */
95
     */
96
    iva_write((uintptr_t) &ivt);
96
    iva_write((uintptr_t) &ivt);
97
    srlz_d();
97
    srlz_d();
98
   
98
   
99
}
99
}
100
 
100
 
101
static void iosapic_init(void)
101
static void iosapic_init(void)
102
{
102
{
103
    uint64_t IOSAPIC = PA2KA((unative_t)(iosapic_base)) | FW_OFFSET;
103
    uint64_t IOSAPIC = PA2KA((unative_t)(iosapic_base)) | FW_OFFSET;
104
    int i;
104
    int i;
105
   
105
   
106
    int myid, myeid;
106
    int myid, myeid;
107
   
107
   
108
    myid = ia64_get_cpu_id();
108
    myid = ia64_get_cpu_id();
109
    myeid = ia64_get_cpu_eid();
109
    myeid = ia64_get_cpu_eid();
110
 
110
 
111
    for (i = 0; i < 16; i++) {
111
    for (i = 0; i < 16; i++) {
112
        if (i == 2)
112
        if (i == 2)
113
            continue;    /* Disable Cascade interrupt */
113
            continue;    /* Disable Cascade interrupt */
114
        ((uint32_t *)(IOSAPIC + 0x00))[0] = 0x10 + 2 * i;
114
        ((uint32_t *)(IOSAPIC + 0x00))[0] = 0x10 + 2 * i;
115
        srlz_d();
115
        srlz_d();
116
        ((uint32_t *)(IOSAPIC + 0x10))[0] = LEGACY_INTERRUPT_BASE + i;
116
        ((uint32_t *)(IOSAPIC + 0x10))[0] = LEGACY_INTERRUPT_BASE + i;
117
        srlz_d();
117
        srlz_d();
118
        ((uint32_t *)(IOSAPIC + 0x00))[0] = 0x10 + 2 * i + 1;
118
        ((uint32_t *)(IOSAPIC + 0x00))[0] = 0x10 + 2 * i + 1;
119
        srlz_d();
119
        srlz_d();
120
        ((uint32_t *)(IOSAPIC + 0x10))[0] = myid << (56 - 32) |
120
        ((uint32_t *)(IOSAPIC + 0x10))[0] = myid << (56 - 32) |
121
            myeid << (48 - 32);
121
            myeid << (48 - 32);
122
        srlz_d();
122
        srlz_d();
123
    }
123
    }
124
 
124
 
125
}
125
}
126
 
126
 
127
 
127
 
128
void arch_post_mm_init(void)
128
void arch_post_mm_init(void)
129
{
129
{
130
    if (config.cpu_active == 1) {
130
    if (config.cpu_active == 1) {
131
        iosapic_init();
131
        iosapic_init();
132
        irq_init(INR_COUNT, INR_COUNT);
132
        irq_init(INR_COUNT, INR_COUNT);
133
#ifdef SKI
133
#ifdef SKI
134
        ski_init_console();
134
        ski_init_console();
135
#else   
135
#else   
136
        ega_init(EGA_BASE, EGA_VIDEORAM);
136
        ega_init(EGA_BASE, EGA_VIDEORAM);
137
#endif  
137
#endif  
138
    }
138
    }
139
    it_init();
139
    it_init();
140
       
140
       
141
}
141
}
142
 
142
 
143
void arch_post_cpu_init(void)
143
void arch_post_cpu_init(void)
144
{
144
{
145
}
145
}
146
 
146
 
147
void arch_pre_smp_init(void)
147
void arch_pre_smp_init(void)
148
{
148
{
149
}
149
}
150
 
150
 
151
 
151
 
152
#ifdef I460GX
152
#ifdef I460GX
153
#define POLL_INTERVAL       50000       /* 50 ms */
153
#define POLL_INTERVAL       50000       /* 50 ms */
154
/** Kernel thread for polling keyboard. */
154
/** Kernel thread for polling keyboard. */
155
static void i8042_kkbdpoll(void *arg)
155
static void i8042_kkbdpoll(void *arg)
156
{
156
{
157
    while (1) {
157
    while (1) {
158
#ifdef CONFIG_NS16550
158
#ifdef CONFIG_NS16550
159
    #ifndef CONFIG_NS16550_INTERRUPT_DRIVEN
159
    #ifndef CONFIG_NS16550_INTERRUPT_DRIVEN
160
        ns16550_poll();
160
        ns16550_poll();
161
    #endif  
161
    #endif  
162
#else
162
#else
163
    #ifndef CONFIG_I8042_INTERRUPT_DRIVEN
163
    #ifndef CONFIG_I8042_INTERRUPT_DRIVEN
164
        i8042_poll();
164
        i8042_poll();
165
    #endif  
165
    #endif  
166
#endif
166
#endif
167
        thread_usleep(POLL_INTERVAL);
167
        thread_usleep(POLL_INTERVAL);
168
    }
168
    }
169
}
169
}
170
#endif
170
#endif
171
 
171
 
172
void arch_post_smp_init(void)
172
void arch_post_smp_init(void)
173
{
173
{
174
    thread_t *t;
174
    thread_t *t;
175
 
175
 
176
    /*
176
    /*
177
     * Create thread that polls keyboard.
177
     * Create thread that polls keyboard.
178
     */
178
     */
179
#ifdef SKI
179
#ifdef SKI
180
    t = thread_create(kkbdpoll, NULL, TASK, 0, "kkbdpoll", true);
180
    t = thread_create(kkbdpoll, NULL, TASK, 0, "kkbdpoll", true);
181
    if (!t)
181
    if (!t)
182
        panic("cannot create kkbdpoll\n");
182
        panic("Cannot create kkbdpoll.");
183
    thread_ready(t);
183
    thread_ready(t);
184
#endif      
184
#endif      
185
 
185
 
186
#ifdef I460GX
186
#ifdef I460GX
187
    devno_t kbd = device_assign_devno();
187
    devno_t kbd = device_assign_devno();
188
 
188
 
189
#ifdef CONFIG_NS16550
189
#ifdef CONFIG_NS16550
190
    ns16550_init(kbd, NS16550_PORT, NS16550_IRQ, NULL, NULL);
190
    ns16550_init(kbd, NS16550_PORT, NS16550_IRQ, NULL, NULL);
191
#else
191
#else
192
    devno_t mouse = device_assign_devno();
192
    devno_t mouse = device_assign_devno();
193
    i8042_init(kbd, IRQ_KBD, mouse, IRQ_MOUSE);
193
    i8042_init(kbd, IRQ_KBD, mouse, IRQ_MOUSE);
194
#endif
194
#endif
195
    t = thread_create(i8042_kkbdpoll, NULL, TASK, 0, "kkbdpoll", true);
195
    t = thread_create(i8042_kkbdpoll, NULL, TASK, 0, "kkbdpoll", true);
196
    if (!t)
196
    if (!t)
197
        panic("cannot create kkbdpoll\n");
197
        panic("Cannot create kkbdpoll.");
198
    thread_ready(t);
198
    thread_ready(t);
199
#endif
199
#endif
200
 
200
 
201
    sysinfo_set_item_val("ia64_iospace", NULL, true);
201
    sysinfo_set_item_val("ia64_iospace", NULL, true);
202
    sysinfo_set_item_val("ia64_iospace.address", NULL, true);
202
    sysinfo_set_item_val("ia64_iospace.address", NULL, true);
203
    sysinfo_set_item_val("ia64_iospace.address.virtual", NULL, IO_OFFSET);
203
    sysinfo_set_item_val("ia64_iospace.address.virtual", NULL, IO_OFFSET);
204
}
204
}
205
 
205
 
206
 
206
 
207
/** Enter userspace and never return. */
207
/** Enter userspace and never return. */
208
void userspace(uspace_arg_t *kernel_uarg)
208
void userspace(uspace_arg_t *kernel_uarg)
209
{
209
{
210
    psr_t psr;
210
    psr_t psr;
211
    rsc_t rsc;
211
    rsc_t rsc;
212
 
212
 
213
    psr.value = psr_read();
213
    psr.value = psr_read();
214
    psr.cpl = PL_USER;
214
    psr.cpl = PL_USER;
215
    psr.i = true;           /* start with interrupts enabled */
215
    psr.i = true;           /* start with interrupts enabled */
216
    psr.ic = true;
216
    psr.ic = true;
217
    psr.ri = 0;         /* start with instruction #0 */
217
    psr.ri = 0;         /* start with instruction #0 */
218
    psr.bn = 1;         /* start in bank 0 */
218
    psr.bn = 1;         /* start in bank 0 */
219
 
219
 
220
    asm volatile ("mov %0 = ar.rsc\n" : "=r" (rsc.value));
220
    asm volatile ("mov %0 = ar.rsc\n" : "=r" (rsc.value));
221
    rsc.loadrs = 0;
221
    rsc.loadrs = 0;
222
    rsc.be = false;
222
    rsc.be = false;
223
    rsc.pl = PL_USER;
223
    rsc.pl = PL_USER;
224
    rsc.mode = 3;           /* eager mode */
224
    rsc.mode = 3;           /* eager mode */
225
 
225
 
226
    switch_to_userspace((uintptr_t) kernel_uarg->uspace_entry,
226
    switch_to_userspace((uintptr_t) kernel_uarg->uspace_entry,
227
        ((uintptr_t) kernel_uarg->uspace_stack) + PAGE_SIZE -
227
        ((uintptr_t) kernel_uarg->uspace_stack) + PAGE_SIZE -
228
        ALIGN_UP(STACK_ITEM_SIZE, STACK_ALIGNMENT),
228
        ALIGN_UP(STACK_ITEM_SIZE, STACK_ALIGNMENT),
229
        ((uintptr_t) kernel_uarg->uspace_stack) + PAGE_SIZE,
229
        ((uintptr_t) kernel_uarg->uspace_stack) + PAGE_SIZE,
230
        (uintptr_t) kernel_uarg->uspace_uarg, psr.value, rsc.value);
230
        (uintptr_t) kernel_uarg->uspace_uarg, psr.value, rsc.value);
231
 
231
 
232
    while (1)
232
    while (1)
233
        ;
233
        ;
234
}
234
}
235
 
235
 
236
/** Set thread-local-storage pointer.
236
/** Set thread-local-storage pointer.
237
 *
237
 *
238
 * We use r13 (a.k.a. tp) for this purpose.
238
 * We use r13 (a.k.a. tp) for this purpose.
239
 */
239
 */
240
unative_t sys_tls_set(unative_t addr)
240
unative_t sys_tls_set(unative_t addr)
241
{
241
{
242
        return 0;
242
        return 0;
243
}
243
}
244
 
244
 
245
/** Acquire console back for kernel
245
/** Acquire console back for kernel
246
 *
246
 *
247
 */
247
 */
248
void arch_grab_console(void)
248
void arch_grab_console(void)
249
{
249
{
250
#ifdef SKI
250
#ifdef SKI
251
    ski_kbd_grab();
251
    ski_kbd_grab();
252
#else
252
#else
253
#ifdef CONFIG_NS16550
253
#ifdef CONFIG_NS16550
254
    ns16550_grab();
254
    ns16550_grab();
255
#else
255
#else
256
    i8042_grab();
256
    i8042_grab();
257
#endif  
257
#endif  
258
#endif  
258
#endif  
259
}
259
}
260
 
260
 
261
/** Return console to userspace
261
/** Return console to userspace
262
 *
262
 *
263
 */
263
 */
264
void arch_release_console(void)
264
void arch_release_console(void)
265
{
265
{
266
#ifdef SKI
266
#ifdef SKI
267
    ski_kbd_release();
267
    ski_kbd_release();
268
#else   
268
#else   
269
#ifdef CONFIG_NS16550
269
#ifdef CONFIG_NS16550
270
    ns16550_release();
270
    ns16550_release();
271
#else   
271
#else   
272
    i8042_release();
272
    i8042_release();
273
#endif  
273
#endif  
274
#endif
274
#endif
275
}
275
}
276
 
276
 
277
void arch_reboot(void)
277
void arch_reboot(void)
278
{
278
{
279
    outb(0x64, 0xfe);
279
    outb(0x64, 0xfe);
280
    while (1)
280
    while (1)
281
        ;
281
        ;
282
}
282
}
283
 
283
 
284
/** @}
284
/** @}
285
 */
285
 */
286
 
286