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Line 47... Line 47...
47
 */
47
 */
48
static inline uintptr_t get_stack_base(void)
48
static inline uintptr_t get_stack_base(void)
49
{
49
{
50
    uint64_t v;
50
    uint64_t v;
51
 
51
 
52
    __asm__ volatile ("and %0 = %1, r12" : "=r" (v) : "r" (~(STACK_SIZE-1)));
52
    asm volatile ("and %0 = %1, r12" : "=r" (v) : "r" (~(STACK_SIZE-1)));
53
   
53
   
54
    return v;
54
    return v;
55
}
55
}
56
 
56
 
57
/** Return Processor State Register.
57
/** Return Processor State Register.
Line 60... Line 60...
60
 */
60
 */
61
static inline uint64_t psr_read(void)
61
static inline uint64_t psr_read(void)
62
{
62
{
63
    uint64_t v;
63
    uint64_t v;
64
   
64
   
65
    __asm__ volatile ("mov %0 = psr\n" : "=r" (v));
65
    asm volatile ("mov %0 = psr\n" : "=r" (v));
66
   
66
   
67
    return v;
67
    return v;
68
}
68
}
69
 
69
 
70
/** Read IVA (Interruption Vector Address).
70
/** Read IVA (Interruption Vector Address).
Line 73... Line 73...
73
 */
73
 */
74
static inline uint64_t iva_read(void)
74
static inline uint64_t iva_read(void)
75
{
75
{
76
    uint64_t v;
76
    uint64_t v;
77
   
77
   
78
    __asm__ volatile ("mov %0 = cr.iva\n" : "=r" (v));
78
    asm volatile ("mov %0 = cr.iva\n" : "=r" (v));
79
   
79
   
80
    return v;
80
    return v;
81
}
81
}
82
 
82
 
83
/** Write IVA (Interruption Vector Address) register.
83
/** Write IVA (Interruption Vector Address) register.
84
 *
84
 *
85
 * @param v New location of interruption vector table.
85
 * @param v New location of interruption vector table.
86
 */
86
 */
87
static inline void iva_write(uint64_t v)
87
static inline void iva_write(uint64_t v)
88
{
88
{
89
    __asm__ volatile ("mov cr.iva = %0\n" : : "r" (v));
89
    asm volatile ("mov cr.iva = %0\n" : : "r" (v));
90
}
90
}
91
 
91
 
92
 
92
 
93
/** Read IVR (External Interrupt Vector Register).
93
/** Read IVR (External Interrupt Vector Register).
94
 *
94
 *
Line 96... Line 96...
96
 */
96
 */
97
static inline uint64_t ivr_read(void)
97
static inline uint64_t ivr_read(void)
98
{
98
{
99
    uint64_t v;
99
    uint64_t v;
100
   
100
   
101
    __asm__ volatile ("mov %0 = cr.ivr\n" : "=r" (v));
101
    asm volatile ("mov %0 = cr.ivr\n" : "=r" (v));
102
   
102
   
103
    return v;
103
    return v;
104
}
104
}
105
 
105
 
106
/** Write ITC (Interval Timer Counter) register.
106
/** Write ITC (Interval Timer Counter) register.
107
 *
107
 *
108
 * @param v New counter value.
108
 * @param v New counter value.
109
 */
109
 */
110
static inline void itc_write(uint64_t v)
110
static inline void itc_write(uint64_t v)
111
{
111
{
112
    __asm__ volatile ("mov ar.itc = %0\n" : : "r" (v));
112
    asm volatile ("mov ar.itc = %0\n" : : "r" (v));
113
}
113
}
114
 
114
 
115
/** Read ITC (Interval Timer Counter) register.
115
/** Read ITC (Interval Timer Counter) register.
116
 *
116
 *
117
 * @return Current counter value.
117
 * @return Current counter value.
118
 */
118
 */
119
static inline uint64_t itc_read(void)
119
static inline uint64_t itc_read(void)
120
{
120
{
121
    uint64_t v;
121
    uint64_t v;
122
   
122
   
123
    __asm__ volatile ("mov %0 = ar.itc\n" : "=r" (v));
123
    asm volatile ("mov %0 = ar.itc\n" : "=r" (v));
124
   
124
   
125
    return v;
125
    return v;
126
}
126
}
127
 
127
 
128
/** Write ITM (Interval Timer Match) register.
128
/** Write ITM (Interval Timer Match) register.
129
 *
129
 *
130
 * @param v New match value.
130
 * @param v New match value.
131
 */
131
 */
132
static inline void itm_write(uint64_t v)
132
static inline void itm_write(uint64_t v)
133
{
133
{
134
    __asm__ volatile ("mov cr.itm = %0\n" : : "r" (v));
134
    asm volatile ("mov cr.itm = %0\n" : : "r" (v));
135
}
135
}
136
 
136
 
137
/** Read ITM (Interval Timer Match) register.
137
/** Read ITM (Interval Timer Match) register.
138
 *
138
 *
139
 * @return Match value.
139
 * @return Match value.
140
 */
140
 */
141
static inline uint64_t itm_read(void)
141
static inline uint64_t itm_read(void)
142
{
142
{
143
    uint64_t v;
143
    uint64_t v;
144
   
144
   
145
    __asm__ volatile ("mov %0 = cr.itm\n" : "=r" (v));
145
    asm volatile ("mov %0 = cr.itm\n" : "=r" (v));
146
   
146
   
147
    return v;
147
    return v;
148
}
148
}
149
 
149
 
150
/** Read ITV (Interval Timer Vector) register.
150
/** Read ITV (Interval Timer Vector) register.
Line 153... Line 153...
153
 */
153
 */
154
static inline uint64_t itv_read(void)
154
static inline uint64_t itv_read(void)
155
{
155
{
156
    uint64_t v;
156
    uint64_t v;
157
   
157
   
158
    __asm__ volatile ("mov %0 = cr.itv\n" : "=r" (v));
158
    asm volatile ("mov %0 = cr.itv\n" : "=r" (v));
159
   
159
   
160
    return v;
160
    return v;
161
}
161
}
162
 
162
 
163
/** Write ITV (Interval Timer Vector) register.
163
/** Write ITV (Interval Timer Vector) register.
164
 *
164
 *
165
 * @param v New vector and mask bit.
165
 * @param v New vector and mask bit.
166
 */
166
 */
167
static inline void itv_write(uint64_t v)
167
static inline void itv_write(uint64_t v)
168
{
168
{
169
    __asm__ volatile ("mov cr.itv = %0\n" : : "r" (v));
169
    asm volatile ("mov cr.itv = %0\n" : : "r" (v));
170
}
170
}
171
 
171
 
172
/** Write EOI (End Of Interrupt) register.
172
/** Write EOI (End Of Interrupt) register.
173
 *
173
 *
174
 * @param v This value is ignored.
174
 * @param v This value is ignored.
175
 */
175
 */
176
static inline void eoi_write(uint64_t v)
176
static inline void eoi_write(uint64_t v)
177
{
177
{
178
    __asm__ volatile ("mov cr.eoi = %0\n" : : "r" (v));
178
    asm volatile ("mov cr.eoi = %0\n" : : "r" (v));
179
}
179
}
180
 
180
 
181
/** Read TPR (Task Priority Register).
181
/** Read TPR (Task Priority Register).
182
 *
182
 *
183
 * @return Current value of TPR.
183
 * @return Current value of TPR.
184
 */
184
 */
185
static inline uint64_t tpr_read(void)
185
static inline uint64_t tpr_read(void)
186
{
186
{
187
    uint64_t v;
187
    uint64_t v;
188
 
188
 
189
    __asm__ volatile ("mov %0 = cr.tpr\n"  : "=r" (v));
189
    asm volatile ("mov %0 = cr.tpr\n"  : "=r" (v));
190
   
190
   
191
    return v;
191
    return v;
192
}
192
}
193
 
193
 
194
/** Write TPR (Task Priority Register).
194
/** Write TPR (Task Priority Register).
195
 *
195
 *
196
 * @param v New value of TPR.
196
 * @param v New value of TPR.
197
 */
197
 */
198
static inline void tpr_write(uint64_t v)
198
static inline void tpr_write(uint64_t v)
199
{
199
{
200
    __asm__ volatile ("mov cr.tpr = %0\n" : : "r" (v));
200
    asm volatile ("mov cr.tpr = %0\n" : : "r" (v));
201
}
201
}
202
 
202
 
203
/** Disable interrupts.
203
/** Disable interrupts.
204
 *
204
 *
205
 * Disable interrupts and return previous
205
 * Disable interrupts and return previous
Line 209... Line 209...
209
 */
209
 */
210
static ipl_t interrupts_disable(void)
210
static ipl_t interrupts_disable(void)
211
{
211
{
212
    uint64_t v;
212
    uint64_t v;
213
   
213
   
214
    __asm__ volatile (
214
    asm volatile (
215
        "mov %0 = psr\n"
215
        "mov %0 = psr\n"
216
        "rsm %1\n"
216
        "rsm %1\n"
217
        : "=r" (v)
217
        : "=r" (v)
218
        : "i" (PSR_I_MASK)
218
        : "i" (PSR_I_MASK)
219
    );
219
    );
Line 230... Line 230...
230
 */
230
 */
231
static ipl_t interrupts_enable(void)
231
static ipl_t interrupts_enable(void)
232
{
232
{
233
    uint64_t v;
233
    uint64_t v;
234
   
234
   
235
    __asm__ volatile (
235
    asm volatile (
236
        "mov %0 = psr\n"
236
        "mov %0 = psr\n"
237
        "ssm %1\n"
237
        "ssm %1\n"
238
        ";;\n"
238
        ";;\n"
239
        "srlz.d\n"
239
        "srlz.d\n"
240
        : "=r" (v)
240
        : "=r" (v)
Line 268... Line 268...
268
}
268
}
269
 
269
 
270
/** Disable protection key checking. */
270
/** Disable protection key checking. */
271
static inline void pk_disable(void)
271
static inline void pk_disable(void)
272
{
272
{
273
    __asm__ volatile ("rsm %0\n" : : "i" (PSR_PK_MASK));
273
    asm volatile ("rsm %0\n" : : "i" (PSR_PK_MASK));
274
}
274
}
275
 
275
 
276
extern void cpu_halt(void);
276
extern void cpu_halt(void);
277
extern void cpu_sleep(void);
277
extern void cpu_sleep(void);
278
extern void asm_delay_loop(uint32_t t);
278
extern void asm_delay_loop(uint32_t t);