WebSVN – HelenOS – Diff – /trunk/kernel/arch/ia32xen/include/mm/page.h


/*
 * Copyright (C) 2006 Martin Decky
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the distribution.
 * - The name of the author may not be used to endorse or promote products
 *   derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */
 
/** @addtogroup ia32xen_mm 
 * @{
 */
/** @file
 */
 
#ifndef KERN_ia32xen_PAGE_H_
#define KERN_ia32xen_PAGE_H_
 
#include <arch/mm/frame.h>
 
#define PAGE_WIDTH  FRAME_WIDTH
#define PAGE_SIZE   FRAME_SIZE
 
#define PAGE_COLOR_BITS 0           /* dummy */
 
#ifdef KERNEL
 
#ifndef __ASM__
#   define KA2PA(x) (((uintptr_t) (x)) - 0x80000000)
#   define PA2KA(x) (((uintptr_t) (x)) + 0x80000000)
#else
#   define KA2PA(x) ((x) - 0x80000000)
#   define PA2KA(x) ((x) + 0x80000000)
#endif
 
/*
 * Implementation of generic 4-level page table interface.
 * IA-32 has 2-level page tables, so PTL1 and PTL2 are left out.
 */
#define PTL0_ENTRIES_ARCH   1024
#define PTL1_ENTRIES_ARCH   0
#define PTL2_ENTRIES_ARCH   0
#define PTL3_ENTRIES_ARCH   1024
 
#define PTL0_INDEX_ARCH(vaddr)  (((vaddr) >> 22) & 0x3ff)
#define PTL1_INDEX_ARCH(vaddr)  0
#define PTL2_INDEX_ARCH(vaddr)  0
#define PTL3_INDEX_ARCH(vaddr)  (((vaddr) >> 12) & 0x3ff)
 
#define GET_PTL1_ADDRESS_ARCH(ptl0, i)      ((pte_t *) MA2PA((((pte_t *) (ptl0))[(i)].frame_address) << 12))
#define GET_PTL2_ADDRESS_ARCH(ptl1, i)      (ptl1)
#define GET_PTL3_ADDRESS_ARCH(ptl2, i)      (ptl2)
#define GET_FRAME_ADDRESS_ARCH(ptl3, i)     ((uintptr_t) MA2PA((((pte_t *) (ptl3))[(i)].frame_address) << 12))
 
#define SET_PTL0_ADDRESS_ARCH(ptl0) { \
    mmuext_op_t mmu_ext; \
    \
    mmu_ext.cmd = MMUEXT_NEW_BASEPTR; \
    mmu_ext.mfn = ADDR2PFN(PA2MA(ptl0)); \
    ASSERT(xen_mmuext_op(&mmu_ext, 1, NULL, DOMID_SELF) == 0); \
}
 
#define SET_PTL1_ADDRESS_ARCH(ptl0, i, a) { \
    mmuext_op_t mmu_ext; \
    \
    mmu_ext.cmd = MMUEXT_PIN_L1_TABLE; \
    mmu_ext.mfn = ADDR2PFN(PA2MA(a)); \
    ASSERT(xen_mmuext_op(&mmu_ext, 1, NULL, DOMID_SELF) == 0); \
    \
    mmu_update_t update; \
    \
    update.ptr = PA2MA(KA2PA(&((pte_t *) (ptl0))[(i)])); \
    update.val = PA2MA(a); \
    ASSERT(xen_mmu_update(&update, 1, NULL, DOMID_SELF) == 0); \
}
 
#define SET_PTL2_ADDRESS_ARCH(ptl1, i, a)
#define SET_PTL3_ADDRESS_ARCH(ptl2, i, a)
#define SET_FRAME_ADDRESS_ARCH(ptl3, i, a) { \
    mmu_update_t update; \
    \
    update.ptr = PA2MA(KA2PA(&((pte_t *) (ptl3))[(i)])); \
    update.val = PA2MA(a); \
    ASSERT(xen_mmu_update(&update, 1, NULL, DOMID_SELF) == 0); \
}
 
#define GET_PTL1_FLAGS_ARCH(ptl0, i)        get_pt_flags((pte_t *) (ptl0), (index_t)(i))
#define GET_PTL2_FLAGS_ARCH(ptl1, i)        PAGE_PRESENT
#define GET_PTL3_FLAGS_ARCH(ptl2, i)        PAGE_PRESENT
#define GET_FRAME_FLAGS_ARCH(ptl3, i)       get_pt_flags((pte_t *) (ptl3), (index_t)(i))
 
#define SET_PTL1_FLAGS_ARCH(ptl0, i, x)     set_pt_flags((pte_t *) (ptl0), (index_t)(i), (x))
#define SET_PTL2_FLAGS_ARCH(ptl1, i, x)
#define SET_PTL3_FLAGS_ARCH(ptl2, i, x)
#define SET_FRAME_FLAGS_ARCH(ptl3, i, x)        set_pt_flags((pte_t *) (ptl3), (index_t)(i), (x))
 
#define PTE_VALID_ARCH(p)           (*((uint32_t *) (p)) != 0)
#define PTE_PRESENT_ARCH(p)         ((p)->present != 0)
#define PTE_GET_FRAME_ARCH(p)           ((p)->frame_address << FRAME_WIDTH)
#define PTE_WRITABLE_ARCH(p)            ((p)->writeable != 0)
#define PTE_EXECUTABLE_ARCH(p)          1
 
#ifndef __ASM__
 
#include <mm/page.h>
#include <arch/types.h>
#include <arch/mm/frame.h>
#include <typedefs.h>
#include <arch/hypercall.h>
 
/* Page fault error codes. */
 
/** When bit on this position is 0, the page fault was caused by a not-present page. */
#define PFERR_CODE_P        (1 << 0)
 
/** When bit on this position is 1, the page fault was caused by a write. */
#define PFERR_CODE_RW       (1 << 1)
 
/** When bit on this position is 1, the page fault was caused in user mode. */
#define PFERR_CODE_US       (1 << 2)
 
/** When bit on this position is 1, a reserved bit was set in page directory. */
#define PFERR_CODE_RSVD     (1 << 3)
 
/** Page Table Entry. */
struct page_specifier {
    unsigned present : 1;
    unsigned writeable : 1;
    unsigned uaccessible : 1;
    unsigned page_write_through : 1;
    unsigned page_cache_disable : 1;
    unsigned accessed : 1;
    unsigned dirty : 1;
    unsigned pat : 1;
    unsigned global : 1;
    unsigned soft_valid : 1;    /**< Valid content even if the present bit is not set. */
    unsigned avl : 2;
    unsigned frame_address : 20;
} __attribute__ ((packed));
 
typedef struct {
    uint64_t ptr;      /**< Machine address of PTE */
    union {            /**< New contents of PTE */
        uint64_t val;
        pte_t pte;
    };
} mmu_update_t;
 
typedef struct {
    unsigned int cmd;
    union {
        unsigned long mfn;
        unsigned long linear_addr;
    };
    union {
        unsigned int nr_ents;
        void *vcpumask;
    };
} mmuext_op_t;
 
static inline int xen_update_va_mapping(const void *va, const pte_t pte, const unsigned int flags)
{
    return hypercall4(XEN_UPDATE_VA_MAPPING, va, pte, 0, flags);
}
 
static inline int xen_mmu_update(const mmu_update_t *req, const unsigned int count, unsigned int *success_count, domid_t domid)
{
    return hypercall4(XEN_MMU_UPDATE, req, count, success_count, domid);
}
 
static inline int xen_mmuext_op(const mmuext_op_t *op, const unsigned int count, unsigned int *success_count, domid_t domid)
{
    return hypercall4(XEN_MMUEXT_OP, op, count, success_count, domid);
}
 
static inline int get_pt_flags(pte_t *pt, index_t i)
{
    pte_t *p = &pt[i];
   
    return (
        (!p->page_cache_disable)<<PAGE_CACHEABLE_SHIFT |
        (!p->present)<<PAGE_PRESENT_SHIFT |
        p->uaccessible<<PAGE_USER_SHIFT |
        1<<PAGE_READ_SHIFT |
        p->writeable<<PAGE_WRITE_SHIFT |
        1<<PAGE_EXEC_SHIFT |
        p->global<<PAGE_GLOBAL_SHIFT
    );
}
 
static inline void set_pt_flags(pte_t *pt, index_t i, int flags)
{
    pte_t p = pt[i];
   
    p.page_cache_disable = !(flags & PAGE_CACHEABLE);
    p.present = !(flags & PAGE_NOT_PRESENT);
    p.uaccessible = (flags & PAGE_USER) != 0;
    p.writeable = (flags & PAGE_WRITE) != 0;
    p.global = (flags & PAGE_GLOBAL) != 0;
   
    /*
     * Ensure that there is at least one bit set even if the present bit is cleared.
     */
    p.soft_valid = true;
   
    mmu_update_t update;
   
    update.ptr = PA2MA(KA2PA(&(pt[i])));
    update.pte = p;
    xen_mmu_update(&update, 1, NULL, DOMID_SELF);
}
 
extern void page_arch_init(void);
extern void page_fault(int n, istate_t *istate);
 
#endif /* __ASM__ */
 
#endif /* KERNEL */
 
#endif
 
/** @}
 */
 

Rev 2007	Rev 2017
1	/*	1	/*
2	* Copyright (C) 2006 Martin Decky	2	* Copyright (C) 2006 Martin Decky
3	* All rights reserved.	3	* All rights reserved.
4	*	4	*
5	* Redistribution and use in source and binary forms, with or without	5	* Redistribution and use in source and binary forms, with or without
6	* modification, are permitted provided that the following conditions	6	* modification, are permitted provided that the following conditions
7	* are met:	7	* are met:
8	*	8	*
9	* - Redistributions of source code must retain the above copyright	9	* - Redistributions of source code must retain the above copyright
10	* notice, this list of conditions and the following disclaimer.	10	* notice, this list of conditions and the following disclaimer.
11	* - Redistributions in binary form must reproduce the above copyright	11	* - Redistributions in binary form must reproduce the above copyright
12	* notice, this list of conditions and the following disclaimer in the	12	* notice, this list of conditions and the following disclaimer in the
13	* documentation and/or other materials provided with the distribution.	13	* documentation and/or other materials provided with the distribution.
14	* - The name of the author may not be used to endorse or promote products	14	* - The name of the author may not be used to endorse or promote products
15	* derived from this software without specific prior written permission.	15	* derived from this software without specific prior written permission.
16	*	16	*
17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR	17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES	18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.	19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,	20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT	21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,	22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY	23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT	24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF	25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.	26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27	*/	27	*/
28		28
29	/** @addtogroup ia32xen_mm	29	/** @addtogroup ia32xen_mm
30	* @{	30	* @{
31	*/	31	*/
32	/** @file	32	/** @file
33	*/	33	*/
34		34
35	#ifndef KERN_ia32xen_PAGE_H_	35	#ifndef KERN_ia32xen_PAGE_H_
36	#define KERN_ia32xen_PAGE_H_	36	#define KERN_ia32xen_PAGE_H_
37		37
38	#include <arch/mm/frame.h>	38	#include <arch/mm/frame.h>
39		39
40	#define PAGE_WIDTH FRAME_WIDTH	40	#define PAGE_WIDTH FRAME_WIDTH
41	#define PAGE_SIZE FRAME_SIZE	41	#define PAGE_SIZE FRAME_SIZE
42		42
43	#define PAGE_COLOR_BITS 0 /* dummy */	43	#define PAGE_COLOR_BITS 0 /* dummy */
44		44
45	#ifdef KERNEL	45	#ifdef KERNEL
46		46
47	#ifndef __ASM__	47	#ifndef __ASM__
48	# define KA2PA(x) (((uintptr_t) (x)) - 0x80000000)	48	# define KA2PA(x) (((uintptr_t) (x)) - 0x80000000)
49	# define PA2KA(x) (((uintptr_t) (x)) + 0x80000000)	49	# define PA2KA(x) (((uintptr_t) (x)) + 0x80000000)
50	#else	50	#else
51	# define KA2PA(x) ((x) - 0x80000000)	51	# define KA2PA(x) ((x) - 0x80000000)
52	# define PA2KA(x) ((x) + 0x80000000)	52	# define PA2KA(x) ((x) + 0x80000000)
53	#endif	53	#endif
54		54
55	/*	55	/*
56	* Implementation of generic 4-level page table interface.	56	* Implementation of generic 4-level page table interface.
57	* IA-32 has 2-level page tables, so PTL1 and PTL2 are left out.	57	* IA-32 has 2-level page tables, so PTL1 and PTL2 are left out.
58	*/	58	*/
59	#define PTL0_ENTRIES_ARCH 1024	59	#define PTL0_ENTRIES_ARCH 1024
60	#define PTL1_ENTRIES_ARCH 0	60	#define PTL1_ENTRIES_ARCH 0
61	#define PTL2_ENTRIES_ARCH 0	61	#define PTL2_ENTRIES_ARCH 0
62	#define PTL3_ENTRIES_ARCH 1024	62	#define PTL3_ENTRIES_ARCH 1024
63		63
64	#define PTL0_INDEX_ARCH(vaddr) (((vaddr) >> 22) & 0x3ff)	64	#define PTL0_INDEX_ARCH(vaddr) (((vaddr) >> 22) & 0x3ff)
65	#define PTL1_INDEX_ARCH(vaddr) 0	65	#define PTL1_INDEX_ARCH(vaddr) 0
66	#define PTL2_INDEX_ARCH(vaddr) 0	66	#define PTL2_INDEX_ARCH(vaddr) 0
67	#define PTL3_INDEX_ARCH(vaddr) (((vaddr) >> 12) & 0x3ff)	67	#define PTL3_INDEX_ARCH(vaddr) (((vaddr) >> 12) & 0x3ff)
68		68
69	#define GET_PTL1_ADDRESS_ARCH(ptl0, i) ((pte_t ) MA2PA((((pte_t ) (ptl0))[(i)].frame_address) << 12))	69	#define GET_PTL1_ADDRESS_ARCH(ptl0, i) ((pte_t ) MA2PA((((pte_t ) (ptl0))[(i)].frame_address) << 12))
70	#define GET_PTL2_ADDRESS_ARCH(ptl1, i) (ptl1)	70	#define GET_PTL2_ADDRESS_ARCH(ptl1, i) (ptl1)
71	#define GET_PTL3_ADDRESS_ARCH(ptl2, i) (ptl2)	71	#define GET_PTL3_ADDRESS_ARCH(ptl2, i) (ptl2)
72	#define GET_FRAME_ADDRESS_ARCH(ptl3, i) ((uintptr_t) MA2PA((((pte_t *) (ptl3))[(i)].frame_address) << 12))	72	#define GET_FRAME_ADDRESS_ARCH(ptl3, i) ((uintptr_t) MA2PA((((pte_t *) (ptl3))[(i)].frame_address) << 12))
73		73
74	#define SET_PTL0_ADDRESS_ARCH(ptl0) { \	74	#define SET_PTL0_ADDRESS_ARCH(ptl0) { \
75	mmuext_op_t mmu_ext; \	75	mmuext_op_t mmu_ext; \
76	\	76	\
77	mmu_ext.cmd = MMUEXT_NEW_BASEPTR; \	77	mmu_ext.cmd = MMUEXT_NEW_BASEPTR; \
78	mmu_ext.mfn = ADDR2PFN(PA2MA(ptl0)); \	78	mmu_ext.mfn = ADDR2PFN(PA2MA(ptl0)); \
79	xen_mmuext_op(&mmu_ext, 1, NULL, DOMID_SELF); \	79	ASSERT(xen_mmuext_op(&mmu_ext, 1, NULL, DOMID_SELF) == 0); \
80	}	80	}
81		81
82	#define SET_PTL1_ADDRESS_ARCH(ptl0, i, a) { \	82	#define SET_PTL1_ADDRESS_ARCH(ptl0, i, a) { \
-		83	mmuext_op_t mmu_ext; \
-		84	\
-		85	mmu_ext.cmd = MMUEXT_PIN_L1_TABLE; \
-		86	mmu_ext.mfn = ADDR2PFN(PA2MA(a)); \
-		87	ASSERT(xen_mmuext_op(&mmu_ext, 1, NULL, DOMID_SELF) == 0); \
-		88	\
83	mmu_update_t update; \	89	mmu_update_t update; \
84	\	90	\
85	update.ptr = PA2MA(KA2PA(&((pte_t *) (ptl0))[(i)])); \	91	update.ptr = PA2MA(KA2PA(&((pte_t *) (ptl0))[(i)])); \
86	update.val = PA2MA(a) \| 0x0003; \	92	update.val = PA2MA(a); \
87	xen_mmu_update(&update, 1, NULL, DOMID_SELF); \	93	ASSERT(xen_mmu_update(&update, 1, NULL, DOMID_SELF) == 0); \
88	}	94	}
-		95
89	#define SET_PTL2_ADDRESS_ARCH(ptl1, i, a)	96	#define SET_PTL2_ADDRESS_ARCH(ptl1, i, a)
90	#define SET_PTL3_ADDRESS_ARCH(ptl2, i, a)	97	#define SET_PTL3_ADDRESS_ARCH(ptl2, i, a)
91	#define SET_FRAME_ADDRESS_ARCH(ptl3, i, a) (((pte_t *) (ptl3))[(i)].frame_address = PA2MA(a) >> 12)	98	#define SET_FRAME_ADDRESS_ARCH(ptl3, i, a) { \
-		99	mmu_update_t update; \
-		100	\
-		101	update.ptr = PA2MA(KA2PA(&((pte_t *) (ptl3))[(i)])); \
-		102	update.val = PA2MA(a); \
-		103	ASSERT(xen_mmu_update(&update, 1, NULL, DOMID_SELF) == 0); \
-		104	}
92		105
93	#define GET_PTL1_FLAGS_ARCH(ptl0, i) get_pt_flags((pte_t *) (ptl0), (index_t)(i))	106	#define GET_PTL1_FLAGS_ARCH(ptl0, i) get_pt_flags((pte_t *) (ptl0), (index_t)(i))
94	#define GET_PTL2_FLAGS_ARCH(ptl1, i) PAGE_PRESENT	107	#define GET_PTL2_FLAGS_ARCH(ptl1, i) PAGE_PRESENT
95	#define GET_PTL3_FLAGS_ARCH(ptl2, i) PAGE_PRESENT	108	#define GET_PTL3_FLAGS_ARCH(ptl2, i) PAGE_PRESENT
96	#define GET_FRAME_FLAGS_ARCH(ptl3, i) get_pt_flags((pte_t *) (ptl3), (index_t)(i))	109	#define GET_FRAME_FLAGS_ARCH(ptl3, i) get_pt_flags((pte_t *) (ptl3), (index_t)(i))
97		110
98	#define SET_PTL1_FLAGS_ARCH(ptl0, i, x) set_pt_flags((pte_t *) (ptl0), (index_t)(i), (x))	111	#define SET_PTL1_FLAGS_ARCH(ptl0, i, x) set_pt_flags((pte_t *) (ptl0), (index_t)(i), (x))
99	#define SET_PTL2_FLAGS_ARCH(ptl1, i, x)	112	#define SET_PTL2_FLAGS_ARCH(ptl1, i, x)
100	#define SET_PTL3_FLAGS_ARCH(ptl2, i, x)	113	#define SET_PTL3_FLAGS_ARCH(ptl2, i, x)
101	#define SET_FRAME_FLAGS_ARCH(ptl3, i, x) set_pt_flags((pte_t *) (ptl3), (index_t)(i), (x))	114	#define SET_FRAME_FLAGS_ARCH(ptl3, i, x) set_pt_flags((pte_t *) (ptl3), (index_t)(i), (x))
102		115
103	#define PTE_VALID_ARCH(p) (((uint32_t ) (p)) != 0)	116	#define PTE_VALID_ARCH(p) (((uint32_t ) (p)) != 0)
104	#define PTE_PRESENT_ARCH(p) ((p)->present != 0)	117	#define PTE_PRESENT_ARCH(p) ((p)->present != 0)
105	#define PTE_GET_FRAME_ARCH(p) ((p)->frame_address << FRAME_WIDTH)	118	#define PTE_GET_FRAME_ARCH(p) ((p)->frame_address << FRAME_WIDTH)
106	#define PTE_WRITABLE_ARCH(p) ((p)->writeable != 0)	119	#define PTE_WRITABLE_ARCH(p) ((p)->writeable != 0)
107	#define PTE_EXECUTABLE_ARCH(p) 1	120	#define PTE_EXECUTABLE_ARCH(p) 1
108		121
109	#ifndef __ASM__	122	#ifndef __ASM__
110		123
111	#include <mm/page.h>	124	#include <mm/page.h>
112	#include <arch/types.h>	125	#include <arch/types.h>
113	#include <arch/mm/frame.h>	126	#include <arch/mm/frame.h>
114	#include <typedefs.h>	127	#include <typedefs.h>
115	#include <arch/hypercall.h>	128	#include <arch/hypercall.h>
116		129
117	/* Page fault error codes. */	130	/* Page fault error codes. */
118		131
119	/** When bit on this position is 0, the page fault was caused by a not-present page. */	132	/** When bit on this position is 0, the page fault was caused by a not-present page. */
120	#define PFERR_CODE_P (1 << 0)	133	#define PFERR_CODE_P (1 << 0)
121		134
122	/** When bit on this position is 1, the page fault was caused by a write. */	135	/** When bit on this position is 1, the page fault was caused by a write. */
123	#define PFERR_CODE_RW (1 << 1)	136	#define PFERR_CODE_RW (1 << 1)
124		137
125	/** When bit on this position is 1, the page fault was caused in user mode. */	138	/** When bit on this position is 1, the page fault was caused in user mode. */
126	#define PFERR_CODE_US (1 << 2)	139	#define PFERR_CODE_US (1 << 2)
127		140
128	/** When bit on this position is 1, a reserved bit was set in page directory. */	141	/** When bit on this position is 1, a reserved bit was set in page directory. */
129	#define PFERR_CODE_RSVD (1 << 3)	142	#define PFERR_CODE_RSVD (1 << 3)
130		143
131	/** Page Table Entry. */	144	/** Page Table Entry. */
132	struct page_specifier {	145	struct page_specifier {
133	unsigned present : 1;	146	unsigned present : 1;
134	unsigned writeable : 1;	147	unsigned writeable : 1;
135	unsigned uaccessible : 1;	148	unsigned uaccessible : 1;
136	unsigned page_write_through : 1;	149	unsigned page_write_through : 1;
137	unsigned page_cache_disable : 1;	150	unsigned page_cache_disable : 1;
138	unsigned accessed : 1;	151	unsigned accessed : 1;
139	unsigned dirty : 1;	152	unsigned dirty : 1;
140	unsigned pat : 1;	153	unsigned pat : 1;
141	unsigned global : 1;	154	unsigned global : 1;
142	unsigned soft_valid : 1; /*< Valid content even if the present bit is not set. /	155	unsigned soft_valid : 1; /*< Valid content even if the present bit is not set. /
143	unsigned avl : 2;	156	unsigned avl : 2;
144	unsigned frame_address : 20;	157	unsigned frame_address : 20;
145	} __attribute__ ((packed));	158	} __attribute__ ((packed));
146		159
147	typedef struct {	160	typedef struct {
148	uint64_t ptr; /*< Machine address of PTE /	161	uint64_t ptr; /*< Machine address of PTE /
149	union { /*< New contents of PTE /	162	union { /*< New contents of PTE /
150	uint64_t val;	163	uint64_t val;
151	pte_t pte;	164	pte_t pte;
152	};	165	};
153	} mmu_update_t;	166	} mmu_update_t;
154		167
155	typedef struct {	168	typedef struct {
156	unsigned int cmd;	169	unsigned int cmd;
157	union {	170	union {
158	unsigned long mfn;	171	unsigned long mfn;
159	unsigned long linear_addr;	172	unsigned long linear_addr;
160	};	173	};
161	union {	174	union {
162	unsigned int nr_ents;	175	unsigned int nr_ents;
163	void *vcpumask;	176	void *vcpumask;
164	};	177	};
165	} mmuext_op_t;	178	} mmuext_op_t;
166		179
167	static inline int xen_update_va_mapping(const void *va, const pte_t pte, const unsigned int flags)	180	static inline int xen_update_va_mapping(const void *va, const pte_t pte, const unsigned int flags)
168	{	181	{
169	return hypercall4(XEN_UPDATE_VA_MAPPING, va, pte, 0, flags);	182	return hypercall4(XEN_UPDATE_VA_MAPPING, va, pte, 0, flags);
170	}	183	}
171		184
172	static inline int xen_mmu_update(const mmu_update_t req, const unsigned int count, unsigned int success_count, domid_t domid)	185	static inline int xen_mmu_update(const mmu_update_t req, const unsigned int count, unsigned int success_count, domid_t domid)
173	{	186	{
174	return hypercall4(XEN_MMU_UPDATE, req, count, success_count, domid);	187	return hypercall4(XEN_MMU_UPDATE, req, count, success_count, domid);
175	}	188	}
176		189
177	static inline int xen_mmuext_op(const mmuext_op_t op, const unsigned int count, unsigned int success_count, domid_t domid)	190	static inline int xen_mmuext_op(const mmuext_op_t op, const unsigned int count, unsigned int success_count, domid_t domid)
178	{	191	{
179	return hypercall4(XEN_MMUEXT_OP, op, count, success_count, domid);	192	return hypercall4(XEN_MMUEXT_OP, op, count, success_count, domid);
180	}	193	}
181		194
182	static inline int get_pt_flags(pte_t *pt, index_t i)	195	static inline int get_pt_flags(pte_t *pt, index_t i)
183	{	196	{
184	pte_t *p = &pt[i];	197	pte_t *p = &pt[i];
185		198
186	return (	199	return (
187	(!p->page_cache_disable)<<PAGE_CACHEABLE_SHIFT \|	200	(!p->page_cache_disable)<<PAGE_CACHEABLE_SHIFT \|
188	(!p->present)<<PAGE_PRESENT_SHIFT \|	201	(!p->present)<<PAGE_PRESENT_SHIFT \|
189	p->uaccessible<<PAGE_USER_SHIFT \|	202	p->uaccessible<<PAGE_USER_SHIFT \|
190	1<<PAGE_READ_SHIFT \|	203	1<<PAGE_READ_SHIFT \|
191	p->writeable<<PAGE_WRITE_SHIFT \|	204	p->writeable<<PAGE_WRITE_SHIFT \|
192	1<<PAGE_EXEC_SHIFT \|	205	1<<PAGE_EXEC_SHIFT \|
193	p->global<<PAGE_GLOBAL_SHIFT	206	p->global<<PAGE_GLOBAL_SHIFT
194	);	207	);
195	}	208	}
196		209
197	static inline void set_pt_flags(pte_t *pt, index_t i, int flags)	210	static inline void set_pt_flags(pte_t *pt, index_t i, int flags)
198	{	211	{
199	pte_t *p = &pt[i];	212	pte_t p = pt[i];
200		213
201	p->page_cache_disable = !(flags & PAGE_CACHEABLE);	214	p.page_cache_disable = !(flags & PAGE_CACHEABLE);
202	p->present = !(flags & PAGE_NOT_PRESENT);	215	p.present = !(flags & PAGE_NOT_PRESENT);
203	p->uaccessible = (flags & PAGE_USER) != 0;	216	p.uaccessible = (flags & PAGE_USER) != 0;
204	p->writeable = (flags & PAGE_WRITE) != 0;	217	p.writeable = (flags & PAGE_WRITE) != 0;
205	p->global = (flags & PAGE_GLOBAL) != 0;	218	p.global = (flags & PAGE_GLOBAL) != 0;
206		219
207	/*	220	/*
208	* Ensure that there is at least one bit set even if the present bit is cleared.	221	* Ensure that there is at least one bit set even if the present bit is cleared.
209	*/	222	*/
210	p->soft_valid = true;	223	p.soft_valid = true;
-		224
-		225	mmu_update_t update;
-		226
-		227	update.ptr = PA2MA(KA2PA(&(pt[i])));
-		228	update.pte = p;
-		229	xen_mmu_update(&update, 1, NULL, DOMID_SELF);
211	}	230	}
212		231
213	extern void page_arch_init(void);	232	extern void page_arch_init(void);
214	extern void page_fault(int n, istate_t *istate);	233	extern void page_fault(int n, istate_t *istate);
215		234
216	#endif /* __ASM__ */	235	#endif /* __ASM__ */
217		236
218	#endif /* KERNEL */	237	#endif /* KERNEL */
219		238
220	#endif	239	#endif
221		240
222	/** @}	241	/** @}
223	*/	242	*/
224		243

Subversion Repositories HelenOS

(root)/trunk/kernel/arch/ia32xen/include/mm/page.h @ 2071 – Rev 2007 → 2017